Patent application number | Description | Published |
20090057769 | CMOS DEVICE HAVING GATE INSULATION LAYERS OF DIFFERENT TYPE AND THICKNESS AND A METHOD OF FORMING THE SAME - In the process sequence for replacing conventional gate electrode structures by high-k metal gate structures, the number of additional masking steps may be maintained at a low level, for instance by using highly selective etch steps, thereby maintaining a high degree of compatibility with conventional CMOS techniques. Furthermore, the techniques disclosed herein enable compatibility to front-end process techniques and back-end process techniques, thereby allowing the integration of well-established strain-inducing mechanisms in the transistor level as well as in the contact level. | 03-05-2009 |
20090321843 | CMOS DEVICE COMPRISING MOS TRANSISTORS WITH RECESSED DRAIN AND SOURCE AREAS AND A SI/GE MATERIAL IN THE DRAIN AND SOURCE AREAS OF THE PMOS TRANSISTOR - The present disclosure relates to semiconductor devices and a process sequence in which a semiconductor alloy, such as silicon/germanium, may be formed in an early manufacturing stage, wherein other performance-increasing mechanisms, such as a recessed drain and source configuration, possibly in combination with high-k dielectrics and metal gates, may be incorporated in an efficient manner while still maintaining a high degree of compatibility with conventional process techniques. | 12-31-2009 |
20100025742 | TRANSISTOR HAVING A STRAINED CHANNEL REGION CAUSED BY HYDROGEN-INDUCED LATTICE DEFORMATION - A lattice distortion may be achieved by incorporating a hydrogen species into a semiconductor material, such as silicon, without destroying the lattice structure. For example, by incorporating the hydrogen species on the basis of an electron shower, a tensile strain component may be obtained in the channel of N-channel transistors. | 02-04-2010 |
20100136762 | ENHANCING INTEGRITY OF A HIGH-K GATE STACK BY PROTECTING A LINER AT THE GATE BOTTOM DURING GATE HEAD EXPOSURE - Sophisticated gate stacks including a high-k dielectric material and a metal-containing electrode material may be covered by a protection liner, such as a silicon nitride liner, which may be maintained throughout the entire manufacturing sequence at the bottom of the gate stacks. For this purpose, a mask material may be applied prior to removing cap materials and spacer layers that may be used for encapsulating the gate stacks during the selective epitaxial growth of a strain-inducing semiconductor alloy. Consequently, enhanced integrity may be maintained throughout the entire manufacturing sequence, while at the same time one or more lithography processes may be avoided. | 06-03-2010 |
20110024805 | USING HIGH-K DIELECTRICS AS HIGHLY SELECTIVE ETCH STOP MATERIALS IN SEMICONDUCTOR DEVICES - A spacer structure in sophisticated semiconductor devices is formed on the basis of a high-k dielectric material, which provides superior etch resistivity compared to conventionally used silicon dioxide liners. Consequently, a reduced thickness of the etch stop material may nevertheless provide superior etch resistivity, thereby reducing negative effects, such as dopant loss in the drain and source extension regions, creating a pronounced surface topography and the like, as are typically associated with conventional spacer material systems. | 02-03-2011 |
20130109174 | Methods of Forming Conductive Structures Using a Spacer Erosion Technique | 05-02-2013 |
20130157432 | ENHANCING INTEGRITY OF A HIGH-K GATE STACK BY PROTECTING A LINER AT THE GATE BOTTOM DURING GATE HEAD EXPOSURE - Sophisticated gate stacks including a high-k dielectric material and a metal-containing electrode material may be covered by a protection liner, such as a silicon nitride liner, which may be maintained throughout the entire manufacturing sequence at the bottom of the gate stacks. For this purpose, a mask material may be applied prior to removing cap materials and spacer layers that may be used for encapsulating the gate stacks during the selective epitaxial growth of a strain-inducing semiconductor alloy. Consequently, enhanced integrity may be maintained throughout the entire manufacturing sequence, while at the same time one or more lithography processes may be avoided. | 06-20-2013 |
20130181265 | Methods of Forming a Gate Cap Layer Above a Replacement Gate Structure and a Semiconductor Device That Includes Such a Gate Structure and Cap Layer - Disclosed herein are various methods of forming a gate cap layer above a replacement gate structure, and a device having such a cap layer. In one example, a device disclosed herein includes a replacement gate structure having a dished upper surface, sidewall spacers positioned proximate the replacement gate structure and a gate cap layer positioned above the replacement gate structure, wherein the gate cap layer has a bottom surface that corresponds to the dished upper surface of the replacement gate structure. | 07-18-2013 |
Patent application number | Description | Published |
20080278785 | MICROMECHANICAL DEVICE, MICROMECHANICAL SYSTEM, APPARATUS FOR ADJUSTING SENSITIVITY OF A MICROMECHANICAL DEVICE, METHOD FOR PRODUCING A MICROMECHANICAL DEVICE - A micromechanical device has a layer; at least a first slot formed in the layer to define a first oscillation element oscillatably suspended via a first spring portion of the layer; and at least a second slot formed in the layer to define a second oscillation element oscillatably suspended via a second spring portion of the layer, wherein a trench is formed in the spring portion pair in a main surface of the layer, wherein a resonance frequency of the first oscillation element is different from that of the second oscillation element, and the first and second spring portions and the trench are formed such that, in an anisotropic lateral material removal and/or addition of the first and second spring portions, a ratio of a relative change of the resonance frequency of the second oscillation element to that of the first oscillation element ranges from 0.8 to 1.2. | 11-13-2008 |
20100097681 | MICROMECHANICAL ELEMENT AND SENSOR FOR MONITORING A MICROMECHANICAL ELEMENT - A micromechanical element includes a movable functional element, a first retaining element, a second retaining element, a third retaining element, and a fourth retaining element. The first retaining element and the functional element are connected at a first junction, the second retaining element and the functional element are connected at a second junction, the third retaining element and the functional element are connected at a third junction, and the fourth retaining element and the functional element are connected at a fourth junction. In addition, the first retaining element and the second retaining element each include a piezoelectric driving element, the driving element of the first retaining element and the driving element of the second retaining element being configured to move the functional element in accordance with electric excitation. | 04-22-2010 |
20120099175 | REDUCTION OF THE DYNAMIC DEFORMATION OF TRANSLATIONAL MIRRORS USING INERTIAL MASSES - A micromechanical mirror arrangement comprising a mirror plate ( | 04-26-2012 |