Patent application number | Description | Published |
20100301818 | VOLTAGE LEVEL SHIFTER AND SEMICONDUCTOR DEVICE HAVING THE SAME THEREIN - A voltage level shifter and a semiconductor device having the same are presented. The voltage level shifter includes a swing width transformer and a power supply controller. The swing width transformer receives an input signal that ranges between a first level power voltage and a ground voltage and is configured to generate a signal that ranges between a second level power voltage and that of the ground voltage. The power supply controller is configured to control power supply to the swing width transformer in response to an enable signal activated in an active mode. | 12-02-2010 |
20110102024 | DATA OUTPUT CIRCUIT - The data output circuit includes a pull-up signal generator, a pull-down signal generator and a driver. The pull-up signal generator is configured to generate a pull-up signal that is driven to a first level state when a pre-pull-up signal is activated and driven to a second level state after a first delay period. The pull-down signal generator is configured to generate a pull-down signal that is driven to a third level state when a pre-pull-down signal is activated and driven to a fourth level state after a second delay period. The driver is configured to drive output data in response to receiving either the pull-up signal and the pull-down signal. | 05-05-2011 |
20110234194 | INTERNAL VOLTAGE GENERATOR - A internal voltage generator includes a plurality of voltage level detection units, each configured to detect a voltage level of a corresponding internal voltage terminal, based on a predetermined target voltage level assigned to the corresponding internal voltage terminal, and generate a detection signal, a common internal voltage generation unit configured to generate an internal voltage through a pumping operation in response to the detection signal outputted from the voltage level detection units, and a path multiplexing unit configured to selectively output the internal voltage to one of the internal voltage terminals. | 09-29-2011 |
20110242917 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR OPERATING THE SAME - A semiconductor memory device includes: a repair address generation unit configured to generate a repair address signal in response to a first address signal; a line choice address generation unit configured to generate a line choice address signal by combining the first address signal and the repair address signal according to a determination as to whether the repair address signal is to be used; and a cell line decoding unit configured to select one of a normal cell region and a redundancy cell region according to the determination, and select one of a plurality of local cell lines provided in the selected cell region in response to the line choice address signal. | 10-06-2011 |
20120273843 | SEMICONDUCTOR MEMORY DEVICE AND REPAIR METHOD THEREOF - A semiconductor memory device includes at least one first semiconductor chip including a plurality of memory cells and a second semiconductor chip including a fuse circuit configured to repair defective cells among the memory cells of the at least one first semiconductor chip. | 11-01-2012 |
Patent application number | Description | Published |
20090116317 | Block repair apparatus and method thereof - A block repair apparatus includes a plurality of cell blocks, a block repair fuse, a block isolation control unit, and a block repair selector. The block repair fuse outputs a repair signal of the plurality of cell blocks. The block isolation control unit outputs a control signal for activating the plurality of cell blocks or electrically isolating a defective cell block of the plurality of cell blocks, in response to the block repair signal. The block repair selector outputs a block repair selection signal for replacing the defective cell block with another cell block in response to a cell block address signal. | 05-07-2009 |
20090261884 | Level shifter using coupling phenomenon - A level shifter removes delay, which is generated at the time of transition of an input signal level, by adjusting a size of NMOS transistors to perform pull-down and pull-up operations. The level shifter includes a coupling unit for setting up a voltage level of a first node according to a voltage level of an input signal, a first buffer for transferring an output signal by buffering a signal from the first node, and a driving unit configured to receive the input signal and the output signal and drive the first node. | 10-22-2009 |
20090302924 | Level shifter capable of improving current drivability - A level shifter circuit is provided that is capable of improving current drivability and executing stable operation with a low voltage by boosting a voltage level of an input signal. The level shifter circuit includes a level shifting unit for producing a boosted voltage by boosting an input signal and shifting a voltage level of the boosted voltage to output an output signal. | 12-10-2009 |
20100201411 | Semiconductor memory device - A semiconductor memory device includes a first power switch for interrupting supply of a first power voltage to a first node in a standby mode, and a second power switch connected between the first node and a second node applied with a second power voltage. | 08-12-2010 |
20110134707 | BLOCK ISOLATION CONTROL CIRCUIT - A block isolation control circuit includes: a control signal generation unit configured to generate a control signal which is disabled when a defect occurs in a cell block and it is necessary to replace a defective cell block with a redundant cell block, or when the cell block is not selected in a test mode; and at least one switch element connected between the cell block and a bit line sense amplifier, wherein the switch element isolates the cell block from the bit line sense amplifier when the control signal is disabled. | 06-09-2011 |
20110208471 | SYNCHRONOUS MULTI-TEMPERATURE SENSOR FOR SEMICONDUCTOR INTEGRATED CIRCUITS - A temperature sensor includes a counting signal generation unit, a counting signal decoding unit, an input reference voltage selection unit, and a latch pulse generation unit. The counting signal generation unit is configured to generate one or more counting signals in response to an oscillation signal. The counting signal decoding unit is configured to decode the one or more counting signals and to generate one or more test selection signals and an end signal. The input reference voltage selection unit is configured to output a first selection reference voltage or a second selection reference voltage as an input reference voltage in response to the one or more test selection signals. The latch pulse generation unit is configured to generate one or more latch pulses in response to the one or more test selection signals. | 08-25-2011 |
20110279168 | TEMPERATURE SENSOR - A temperature sensor includes a selection signal generation unit and a reference voltage selection unit. The selection signal generation unit is configured to generate first and second selection signals in response to a fuse cutting or an input of a test mode pulse in a test mode. The reference voltage selection unit is configured to output a first reference voltage or a second reference voltage as a first selection reference voltage, and output a third reference voltage or a fourth reference voltage as a second selection reference voltage in response to the first and second selection signals. | 11-17-2011 |
20120257648 | TEMPERATURE SENSOR - A temperature sensor includes: a gate voltage generation unit including a bias resistor, a first source resistor, and a first MOS transistor and configured to generate a gate voltage; and a variable voltage output unit including an output resistor, a second source resistor, and a second MOS transistor and configured to generate the variable voltage. | 10-11-2012 |