Patent application number | Description | Published |
20080201396 | Signal processing apparatus and the correcting method - A signal processing apparatus, comprising: a first filter on an in-phase signal channel; a second filter on a quadrature signal channel; a plurality of filter stages having each of more than one signal paths crossing each other which connects the first filter and the second filter; and at least more than one of the filter stages of more than one of a plurality of the filter stages comprises a switching circuit disconnecting more than one of the signal paths and a correction unit correcting direct current offsets of the first filter and the second filter by using the switching circuit. | 08-21-2008 |
20080218244 | Analog switch - An analog switch comprises a first transistor, a second transistor, the drain and the source thereof being connected between said first input terminal and a second output terminal whereto said second signal is output and the gate thereof being grounded or connected to a supply voltage node, a third transistor, the drain and the source thereof being connected between a second input terminal whereto said second signal is input and said second output terminal and said third transistor being turned on and off by a control signal provided to the gate thereof; and a fourth transistor, the drain and the source thereof being connected between said second input terminal and said first output terminal and the gate thereof being grounded or connected to a supply voltage node. | 09-11-2008 |
20080297392 | SIGNAL PROCESSING METHOD AND DEVICE, AND ANALOG/DIGITAL CONVERTING DEVICE - The first and second time-domain signals are received, and a difference between the pulse width of the first time-domain signal and the pulse width of the second time-domain signal within a unit time for carrying one item of analog signal information is obtained. The obtained difference is treated as positive information if the pulse width of the first time-domain signal is greater than the pulse width of the second time-domain signal, or as negative information if the pulse width of the first time-domain signal is smaller than the pulse width of the second time-domain signal. | 12-04-2008 |
20090045869 | SEMICONDUCTOR CIRCUIT AND CONTROLLING METHOD THEREOF - A semiconductor circuit including a bias circuit ( | 02-19-2009 |
20090160420 | DIFFERENTIAL CURRENT MIRROR CIRCUIT - A differential current mirror circuit includes: a first branching unit that branches current through a first current input terminal to a first current path and a second current path; a second branching unit that branches current through a second current input terminal to a third current path and a fourth current path; and a current mirror that copies current. The current copied by the current mirror is a combination of the current flowing through the second current path and the fourth current path and removal of the in-phase component from current through the first current path enables only the differential component flowing through the first current path to flow to a first current output terminal. Similarly, the in-phase component from current through the third current path is removed, enabling only the differential component flowing through the third current path to flow to a second current output terminal. | 06-25-2009 |
20090184752 | BIAS CIRCUIT - A bias circuit includes a first and a second transistors to which a common gate voltage is supplied, a load circuit coupled to drains of the first and the second transistors, a control circuit generating a control signal based on a signal from the load circuit, a current source controlled based on the control signal and coupled to the first and the second transistors, and a first impedance circuit coupled between the second transistor and the current source. | 07-23-2009 |
20100033249 | DIFFERENTIAL AMPLIFIER - A differential amplifier includes first and second transistors having source terminals coupled to each other at a first common node, a first common current source coupled to the first common node, and an in-phase signal input terminal configured to input, to the first common node, an in-phase signal of first and second input signals inputted to gate terminals of the first and second transistors. | 02-11-2010 |
20100039178 | AMPLIFIER CIRCUIT - An amplifier circuit includes an amplifier unit and a current control circuit as means for achieving the aforementioned object. The amplifier unit includes a gain compensation MOS transistor compensating for gain of an output characteristic and a linearity compensation MOS transistor compensating for linearity of an output characteristic. A source of the gain compensation MOS transistor is connected to a drain of the linearity compensation MOS transistor. An input signal is applied to a gate of the linearity compensation MOS transistor. A drain of the gain compensation MOS transistor is set as an output. The current control circuit performs control so as to pass predetermined current between the drain and the source of the gain compensation MOS transistor and pass predetermined current between the drain and the source of the linearity compensation MOS transistor. | 02-18-2010 |
20100117619 | Current-Mirror Circuit - In a cascode current-mirror circuit which reproduces a reference current generated by a current source and outputs the reproduced reference current: the control electrodes of first and second transistors are connected; a third transistor is cascode-connected to the first transistor through a current electrode; a fourth transistor is cascode-connected to the second transistor; the control electrodes of the third and fourth transistors are connected; the control electrode of a fifth transistor is connected to the control electrode of the first transistor and another current electrode of the third transistor, and is to be connected to the current source; and a bias-voltage generation circuit generates bias voltages for the third and fourth transistors on the basis of voltages of the control electrodes of the first and the fifth transistors. | 05-13-2010 |
20100207692 | BIAS CIRCUIT AND CONTROL METHOD FOR BIAS CIRCUIT - A bias circuit for applying a bias voltage to a nonlinear amplification circuit, including a constant-current source; and a first, second, third, and fourth transistors, wherein a current mirror circuit is configured by the first transistor and the second transistor, and the bias voltage is outputted from the drain of the second transistor, gate lengths and gate widths of the first and second transistor are the same, gate lengths of the first to fourth transistor are the same, and gate lengths and gate widths of the first, second, third, and fourth transistor are configured so that k | 08-19-2010 |
20100283527 | Analog Switch - An analog switch comprises a first transistor, a second transistor, the drain and the source thereof being connected between said first input terminal and a second output terminal whereto said second signal is output and the gate thereof being grounded or connected to a supply voltage node, a third transistor, the drain and the source thereof being connected between a second input terminal whereto said second signal is input and said second output terminal and said third transistor being turned on and off by a control signal provided to the gate thereof; and a fourth transistor, the drain and the source thereof being connected between said second input terminal and said first output terminal and the gate thereof being grounded or connected to a supply voltage node. | 11-11-2010 |
20140285250 | SIGNAL GENERATION CIRCUIT - A signal generation circuit includes a limiter and a mixer. The limiter receives an input signal, allows the input signal to be off a scale at a limit voltage, and generates a phase signal indicating a phase component of the input signal. The mixer receives the input signal and the phase signal, and generates an amplitude signal indicating an amplitude component of the input signal. | 09-25-2014 |