Lingam
Aparna Lingam, Santa Clara, CA US
Patent application number | Description | Published |
---|---|---|
20140207530 | FAIRLY CALIBRATED DISTRIBUTION MATRIX MODELING - The present disclosure provides for evaluating and managing multi-dimensional performance data of individual entities and their group as a whole by producing unbiased bell curved distributions according to organizational, product, manufacturing, or other goals and/or guidelines. An exemplary two dimensional performance management model may display a grid with potential along a first axis and performance along a second axis. Individual entities are placed into boxes defined by an evaluation metric grid matrix. Unbiased and evenly distributed performance rankings are produced with automated bell curve distribution simulation from the matrix data. A user may view the bell curve distributions as a holistic result or according to one or more independently calculated factors or criteria(s). The bell curve distribution simulation method will alert the manager if the operational and strategic guide lines of the organization are not followed. | 07-24-2014 |
Gopi Lingam, Sunnyvale, CA US
Patent application number | Description | Published |
---|---|---|
20130092361 | HEAT EXCHANGE FLUID PURIFICATION FOR DIALYSIS SYSTEM - Disclosed herein are small, lightweight, portable, systems that have the capability of reliably, reproducibly, highly efficiently and relatively inexpensively providing a source of purified water of sufficient volumes for home dialysis. In addition, the systems disclosed herein require much less purified water at any one time than the volumes typically needed for dialysis today, thereby further reducing the expense of running the system at home. | 04-18-2013 |
Gopi Lingam, San Jose, CA US
Patent application number | Description | Published |
---|---|---|
20150314055 | DIALYSIS SYSTEM AND METHODS - Dialysis systems and methods are described which can include a number of features. The dialysis systems described can be to provide dialysis therapy to a patient in the comfort of their own home. The dialysis system can be configured to prepare purified water from a tap water source in real-time that is used for creating a dialysate solution. The dialysis systems described also include features that make it easy for a patient to self-administer therapy. For example, the dialysis systems include disposable cartridge and patient tubing sets that are easily installed on the dialysis system and automatically align the tubing set, sensors, venous drip chamber, and other features with the corresponding components on the dialysis system. Methods of use are also provided, including automated priming sequences, blood return sequences, and dynamic balancing methods for controlling a rate of fluid transfer during different types of dialysis, including hemodialysis, ultrafiltration, and hemodiafiltration. | 11-05-2015 |
Jegan Lingam, Bellevue, WA US
Patent application number | Description | Published |
---|---|---|
20130156168 | TECHNIQUES FOR DYNAMIC VOICE MENUS - Techniques for dynamic voice menus are described. An apparatus may comprise an endpoint component operative on a processor circuit to receive an incoming call from a user, and identify an incoming phone number for the incoming call, a menu retrieval component operative on the processor circuit to determine a voice menu based on the incoming phone number, and a menu performance component operative on the processor circuit to perform the voice menu for the user. Other embodiments are described and claimed. | 06-20-2013 |
Prasada Rao V.s. Lingam, Navi Mumbai IN
Patent application number | Description | Published |
---|---|---|
20120108813 | FUSED PYRIMIDINEONE COMPOUNDS AS TRPV3 MODULATORS - The present invention provides transient receptor potential vanilloid (TRPV) modulators. In particular, compounds described herein are useful for treating or preventing diseases, conditions and/or disorders modulated by TRPV3. Also provided herein are processes for preparing compounds described herein, intermediates used in their synthesis, pharmaceutical compositions thereof, and methods for treating or preventing diseases, conditions and/or disorders modulated by TRPV3. | 05-03-2012 |
Sandeep Lingam, Bellevue, WA US
Patent application number | Description | Published |
---|---|---|
20110184915 | CLUSTER RESTORE AND REBUILD - Architecture that facilitates the restoration of a cluster database in a scalable way using backups (e.g., SQL database backups) and a partition rebuild mechanism to achieve a high level of partition level data consistency, even when restore fails on individual machines and/or machine failure occurs. The architecture restores replicas of the partitions in consideration that the backups may be created at different points and at different times. Optimized parallelism is achieved in restoring each database machine using local backups, which eliminates cross-machine network traffic. Thus, fast recovery of the distributed database can be accomplished on the order of hours over thousands of machines and terabytes of data. | 07-28-2011 |
20120109852 | REACTIVE LOAD BALANCING FOR DISTRIBUTED SYSTEMS - The subject disclosure relates to load balancing systems and methods. In one embodiment, a reactive load balancer can receive feedback from a first database node, and allocate resources to the first database node based, at least, on the feedback. The feedback is dynamic and comprises information indicative of a load level at the first database node. In some embodiments, the feedback includes information indicative of a load level at a second, under loaded, database node. In other embodiments, load balancing is performed by an overloaded node polling a set of devices (e.g., cell phone, personal computer, PDA) at which resources may be available. Specifically, the method includes polling devices for resource availability at the devices, and receiving price information for resources provided by at least one device. The overloaded node utilizes the resource in response to providing payment of the price. Auction models or offer/counteroffer approaches can be employed. | 05-03-2012 |
Srinivas Lingam, Richardson, TX US
Patent application number | Description | Published |
---|---|---|
20090280857 | Method and Apparatus for Transmit Power Control in Wireless Data Communication Systems - The distance between a first Multi Band Orthogonal Frequency Division Multiplex (MB-OFDM) data transceiver and a second or more such transceiver is determined using known techniques. The radio frequency path loss between transceivers is estimated given said distance, using a known relationship between distance and path loss, and further accounting for line-of-sight or non-line-of-sight conditions if desired. This path loss value is added to the typically minimum transmit power level, absent path loss, needed for reliable data communication. This modified initial transmit power level is then used by the first transceiver to begin the known iterative feedback process of transmit power control (TPC). Because this modified initial transmit power level, based on distance, is closer to the final optimum level, convergence in the TPC process occurs in fewer steps and less time than had the initial transmit power been maximum power as is typical in known TPC systems. | 11-12-2009 |
Srinivas Lingam, Dallas, TX US
Patent application number | Description | Published |
---|---|---|
20090110126 | REDUCED COMPLEXITY VITERBI DECODER - A Viterbi decoder includes a branch metric unit, an add-compare select unit coupled to the branch metric unit, and a trace-back unit coupled to the add-compare select unit. The branch metric unit includes a branch metric computation unit coupled to a thresholder unit. The branch metric computation unit is configured to compute a branch metric. The thresholder unit is configured to compare the branch metric with a threshold value. If the branch metric is greater than the threshold value, the thresholder unit is configured to forward the threshold value to the add-compare select and not forward the branch metric to the add-compare select unit. Implementing such a branch metric ceiling allows for a predictable reduction in the significant bits of calculations in the Viterbi decoder, which allows for reduction of complexity via elimination of gates and storage elements. | 04-30-2009 |
20090273361 | LOCALIZED CALIBRATION OF PROGRAMMABLE DIGITAL LOGIC CELLS - An integrated circuit (IC) includes self-calibrating programmable digital logic circuitry. The IC includes at least one programmable digital logic cell, wherein the first programmable digital logic cell provides (i) a plurality of different accessible circuit configurations or (ii) a voltage level controller. A self-calibration system is provided that includes at least one reference device, a measurement device for measuring at least one electrical performance parameter that can affect a processing speed of the first programmable digital logic cell or at least one parameter that can affect the electrical performance parameter using the reference device to obtain calibration data. A processing device maps the calibration data or a parameter derived therefrom to generate a control signal that is operable to select from the plurality of different accessible circuit configurations or a voltage level output to change the processing speed of the programmable digital logic cell. | 11-05-2009 |
20090273367 | IC HAVING PROGRAMMABLE DIGITAL LOGIC CELLS - An integrated circuit (IC) includes at least one programmable digital logic cell that includes first dedicated digital logic cell having a plurality of transistors including at least one PMOS transistor and at least one NMOS transistor configured to perform at least one digital logical function. The first dedicated digital logic cell includes a plurality of nodes including at least one input node and at least one output node that reflects performance of a digital logical function. Programmable tuning circuitry includes at least one tuning input and at least one tuning circuit output. Circuitry for coupling or decoupling the tuning input or tuning circuit output to at least one of the plurality of nodes of the first dedicated digital logical cell is provided, wherein the coupling or decoupling is operable to change the processing speed for the first reprogrammable digital logic cell. | 11-05-2009 |
20090282316 | Memory Access in Low-Density Parity Check Decoders - Low Density Parity Check (LDPC) decoder circuitry in which memory resources are realized as single-port memory. The decoder circuitry includes a single port memory for storing log-likelihood ratio (LLR) estimates of input node data states for individual rows of a parity check matrix. The decoder circuitry also includes multiple instances of single-port column sum memories, which store updated LLR estimates for each input node. In each case, the memory resources include logic circuitry that executes at least one write cycle and one read cycle to the memory within each decoder cycle. Because the decoder cycle time is much longer than the necessary memory cycle time, particularly in LDPC decoding, data can be written to and read from single-port memory resources in ample time for the decoding operation. | 11-12-2009 |
20090313399 | DIRECT MEMORY ACCESS CHANNEL - A system and method for using a direct memory access (“DMA”) channel to reorganize data during transfer from one device to another are disclosed herein. A DMA channel includes demultiplexing logic and multiplexing logic. The demultiplexing logic is configurable to distribute each data value read into the DMA channel to a different one of a plurality of data streams than an immediately preceding value. The multiplexing logic is configurable to select a given one of the plurality of data streams. The DMA channel is configurable to write a value from the given data stream to a storage location external to the DMA channel. | 12-17-2009 |
20150236670 | OUTPUT RANGE FOR INTERPOLATION ARCHITECTURES EMPLOYING A CASCADED INTEGRATOR-COMB (CIC) FILTER WITH A MULTIPLIER - A cascaded integrator-comb filter (CIC) that includes a differentiator, a rate changer, an integrator, and a multiplier. The differentiator is configured to differentiate an input signal to produce a differentiated input signal. The rate changer is coupled to the differentiator and is configured to interpolate the differentiated input signal based on an interpolation rate to produce an upsample signal. The integrator is coupled to the rate changer and is configured to integrate the upsample signal to produce an output signal. The multiplier is coupled to the differentiator, rate changer, and integrator and is configured to increase the output signal amplitude based on the interpolation rate. | 08-20-2015 |
V.p. Prasada Rao Lingam, Navi Mumbai IN
Patent application number | Description | Published |
---|---|---|
20110098316 | CHROMANE DERIVATIVES AS TRPV3 MODULATORS - The present invention provides chromane derivatives as transient receptor potential vanilloid (TRPV) modulators. In particular, the compounds described herein are useful for treating or preventing diseases, conditions and/or disorders modulated by TRPV3. Also provided herein are processes for preparing compounds described herein, intermediates used in their synthesis, pharmaceutical compositions thereof, and methods for treating or preventing diseases, conditions and/or disorders modulated by TRPV3. | 04-28-2011 |
V S Prasadarao Lingam, Koparkhairane IN
Patent application number | Description | Published |
---|---|---|
20100292254 | Fused Pyrimidine Derivatives as Trpv3 Modulators - The present invention related to fused pyrimidine derivatives, which are useful as Transient Receptor Potential Vanilloid 3 (TRPV3) receptors, methods of treating deseases, disorders, conditions modulated by TRPV3. The present invention having the formula (I) and its pharmaceutically acceptable salts thereof, and its processes thereof, wherein all variables are as described herein. | 11-18-2010 |
V. S. Prasadarao Lingam, Navi Mumbai IN
Patent application number | Description | Published |
---|---|---|
20110257193 | FUSED IMIDAZOLE DERIVATIVES AS TRPV3 ANTAGONIST - The present invention provides transient receptor potential vanilloid (TRPV) modulators of formula (I). In particular, compounds described herein are useful for treating or preventing diseases, conditions and/or disorders modulated by TRPV3. Also provided herein are processes for preparing compounds described herein, intermediates used in their synthesis, pharmaceutical compositions thereof, and methods for treating or preventing diseases, conditions and/or disorders modulated by TRPV3. | 10-20-2011 |
V. S. Prasada Rao Lingam, Navi Mumbai IN
Patent application number | Description | Published |
---|---|---|
20120115886 | FUSED PYRIMIDINEONE COMPOUNDS AS TRPV3 MODULATORS - The present invention provides transient receptor potential vanilloid (TRPV) modulators. In particular, compounds described herein are useful for treating or preventing diseases, conditions and/or disorders modulated by TRPV3. Also provided herein are processes for preparing compounds described herein, intermediates used in their synthesis, pharmaceutical compositions thereof, and methods for treating or preventing diseases, conditions and/or disorders modulated by TRPV3. | 05-10-2012 |