Patent application number | Description | Published |
20090108874 | Limited Switch Dynamic Logic Cell Based Register - A circuit that has a limited switch dynamic logic gate having a front end logic circuit and a latch. The output of the front end logic circuit is connected to an input of the latch, and the front end logic circuit evaluates a set of input signals applied to the front end logic circuit to generate an output signal. The latch receives and holds the output signal. The circuit also has a logic circuit having an output connected to a clock input in the front end logic circuit. The logic circuit generates a modified clock signal in response to receiving a clock signal from a clock source, and the modified clock signal has a duration that provides a minimum period of time for the front end logic to evaluate the set of input signals and generate the output signal. | 04-30-2009 |
20090108875 | Structure for a Limited Switch Dynamic Logic Cell Based Register - A design structure for a circuit that has a limited switch dynamic logic gate having a front end logic circuit and a latch. The output of the front end logic circuit is connected to an input of the latch, and the front end logic circuit evaluates a set of input signals applied to the front end logic circuit to generate an output signal. The latch receives and holds the output signal. The circuit also has a logic circuit having an output connected to a clock input in the front end logic circuit. The logic circuit generates a modified clock signal in response to receiving a clock signal from a clock source, and the modified clock signal has a duration that provides a minimum period of time for the front end logic to evaluate the set of input signals and generate the output signal. | 04-30-2009 |
20090108888 | Switched-Capacitor Charge Pumps - A switched-capacitor charge pump comprises a two-phase charging circuit, cross-coupled transistors connected to output nodes of the switched capacitors, and a pump output connected to source terminals of the cross-coupled transistors. The charge pump has side transistors for boosting charge transfer, and gating logic of the side transistors includes level shifters which control connections to the pump output or a reference voltage. Negative and positive charge pump embodiments are provided. The charging circuit advantageously utilizes non-overlapping wide and narrow clock signals to generate multiple gating signals. The pump clock circuit preferably provides independent, programmable adjustment of the widths of the wide and narrow clock signals. An override mode can be provided using clamping circuits which shunt the pump output to the second nodes of the switched capacitors. | 04-30-2009 |
20090174441 | Peak Power Reduction Methods in Distributed Charge Pump Systems - A distributed charge pump system uses a delay element and frequency dividers to generate out of phase pump clock signals that drive different charge pumps, to offset peak current clock edges for each charge pump and thereby reduce overall peak power. Clock signal division and phase offset may be extended to multiple levels for further smoothing of the pump clock signal transitions. A dual frequency divider may be used which receives the clock signal and its complement, and generates two divided signals that are 90° out of phase. In an illustrative embodiment the clock generator comprises a variable-frequency clock source, and a voltage regulator senses an output voltage of the charge pumps, generates a reference voltage based on a currently selected frequency of the variable-frequency clock source, and temporarily disables the charge pumps (by turning off local pump clocks) when the output voltage is greater than the reference voltage. | 07-09-2009 |
20100220541 | SWITCHED-CAPACITOR CHARGE PUMPS - A switched-capacitor charge pump comprises a two-phase charging circuit, cross-coupled transistors connected to output nodes of the switched capacitors, and a pump output connected to source terminals of the cross-coupled transistors. The charge pump has side transistors for boosting charge transfer, and gating logic of the side transistors includes level shifters which control connections to the pump output or a reference voltage. Negative and positive charge pump embodiments are provided. The charging circuit advantageously utilizes non-overlapping wide and narrow clock signals to generate multiple gating signals. The pump clock circuit preferably provides independent, programmable adjustment of the widths of the wide and narrow clock signals. An override mode can be provided using clamping circuits which shunt the pump output to the second nodes of the switched capacitors. | 09-02-2010 |
20100315132 | PEAK POWER REDUCTION METHODS IN DISTRIBUTED CHARGE PUMP SYSTEMS - A distributed charge pump system uses a delay element and frequency dividers to generate out of phase pump clock signals that drive different charge pumps, to offset peak current clock edges for each charge pump and thereby reduce overall peak power. Clock signal division and phase offset may be extended to multiple levels for further smoothing of the pump clock signal transitions. A dual frequency divider may be used which receives the clock signal and its complement, and generates two divided signals that are 90° out of phase. In an illustrative embodiment the clock generator comprises a variable-frequency clock source, and a voltage regulator senses an output voltage of the charge pumps, generates a reference voltage based on a currently selected frequency of the variable-frequency clock source, and temporarily disables the charge pumps (by turning off local pump clocks) when the output voltage is greater than the reference voltage. | 12-16-2010 |
20110204931 | PEAK POWER REDUCTION METHODS IN DISTRIBUTED CHARGE PUMP SYSTEMS - A distributed charge pump system uses a delay element and frequency dividers to generate out of phase pump clock signals that drive different charge pumps, to offset peak current clock edges for each charge pump and thereby reduce overall peak power. Clock signal division and phase offset may be extended to multiple levels for further smoothing of the pump clock signal transitions. A dual frequency divider may be used which receives the clock signal and its complement, and generates two divided signals that are 90° out of phase. In an illustrative embodiment the clock generator comprises a variable-frequency clock source, and a voltage regulator senses an output voltage of the charge pumps, generates a reference voltage based on a currently selected frequency of the variable-frequency clock source, and temporarily disables the charge pumps (by turning off local pump clocks) when the output voltage is greater than the reference voltage. | 08-25-2011 |
20150029803 | Single-Ended Low-Swing Power-Savings Mechanism with Process Compensation - A single-ended low-swing power-savings mechanism is provided. The mechanism comprises a precharge device that turns off in an evaluation phase and a first biasing device is always on. Within the mechanism, a strength of a keeper device is changed to a first level in response to an input of the second biasing device being at a first voltage level. Within the mechanism the strength of the keeper device is changed to a second level in response to the input of the second biasing device being at a second voltage level. Responsive to receiving a (precharged voltage level read data line signal, a precharged voltage level of the first node falls faster when the keeper device is weakened to a first level. The keeper device turns on in response to receiving a LOW signal and pulls up the voltage at the first node so that a HIGH signal is output. | 01-29-2015 |
20150117120 | GATED-FEEDBACK SENSE AMPLIFIER FOR SINGLE-ENDED LOCAL BIT-LINE MEMORIES - A single-ended input sense amplifier uses a pass device to couple the input local bit-line to a global bit-line evaluation node. The sense amplifier also includes a pair of cross-coupled inverters, a first inverter of which has an input that coupled directly to the global bit-line evaluation node. The output of the second inverter is selectively coupled to the global bit-line evaluation node in response to a control signal, so that when the pass device is active, the local bit line charges or discharges the global bit-line evaluation node without being affected substantially by a state of the output of the second inverter. When the control signal is in the other state, the cross-coupled inverter forms a latch. An internal output control circuit of the second inverter interrupts the feedback provided by the second inverter in response to the control signal. | 04-30-2015 |
20150162059 | DYNAMIC CASCODE-MANAGED HIGH-VOLTAGE WORD-LINE DRIVER CIRCUIT - A method of operation of a high-voltage word-line driver circuit for a memory device prevents any single transistor of the driver from having the full power supply voltage from which the word-line output signal is generated, from being applied across any single transistor of the word-line driver circuit. A pair of cascode devices are connected in series with the pull-down device of the input stage and a pull-up device of the input stage, and biased using reference voltages to control the maximum voltage drop across the pull-down device when the pull-down device is off and the pull-up device is active, and to control the maximum voltage drop across the pull-up device when the pull-down device is active. The output stage also includes cascode devices that protect the output pull-down and pull-up devices, and the reference voltages that bias the input and output cascode pairs may be the same reference voltages. | 06-11-2015 |
Patent application number | Description | Published |
20090233480 | ELECTRICAL CONNECTOR ASSEMBLY - An electrical connector assembly includes an organizer plate having a plurality of apertures for receiving termination devices. Each termination device includes a shield box, an insulator, and a socket contact. The shield box has at least one outwardly extending ground contact element and a latch member. When the termination device is inserted into an aperture of the organizer plate, the latch member on the shield box engage a surface of the organizer plate to prevent withdrawal of the termination device. | 09-17-2009 |
20140342596 | Electrical Connector Strain Relief - A strain relief for an electrical cable includes a longitudinal base portion including curved side portions extending upwardly from opposing longitudinal sides thereof, and first and second opposing strain relief latches extending from opposing lateral sides of the base portion. Each latch includes a curved connecting portion extending from a lateral side of the base portion first curving upwardly and then curving downwardly and terminating at an arm portion that extends downwardly. The arm portion is configured to resiliently deflect outwardly to accommodate secure attachment of the strain relief to an electrical connector. | 11-20-2014 |
20140349513 | Wire Mount Electrical Connector - An electrical connector includes an insulative connector housing including a longitudinal body portion and first and second pairs of opposing end portions. The body portion has a plurality of contact openings extending therein in an insertion direction for supporting a plurality of electrical contact terminals. The first and second pairs of opposing end portions extend from opposing ends of the body portion in the insertion direction. At least one end portion in each pair of opposing end portions includes a ridge extending in the insertion direction for guiding a cover latch along a side surface of the ridge and guiding a strain relief latch along an opposing side surface of the ridge. The ridge has an inclined top surface for resiliently deflecting a cover latch and an inclined side surface for resiliently deflecting a strain relief latch. The ridge has an end portion for latching onto a cover latch and a strain relief latch. | 11-27-2014 |
20140370734 | Electrical Connector Latch - A latch for securing and ejecting a mating connector from a connector housing includes a hinge portion configured to pivotably attach the latch to a connector housing, an arm portion extending from a first side of the hinge portion along a first direction, and a pair of discrete spaced apart hinge arms extending from an opposite second side of the hinge portion along a second direction different than the first direction. The hinge arms are configured to eject the mating connector through a pair of corresponding spaced apart latch openings extending through a bottom wall and through side walls of the connector housing. | 12-18-2014 |
20140377971 | Board Mount Electrical Connector - An electrical connector includes an insulative connector housing. The connector housing includes a longitudinal bottom wall having a plurality of contact openings, first and second side walls extending upwardly from the bottom wall at opposing sides of the bottom wall, first and second end walls extending upwardly from the bottom wall at opposing ends of the bottom wall, and first and second pairs of latch openings at opposing ends of the bottom wall. Each latch opening extends through the bottom wall and through a side wall and is configured to allow a latch to eject a mating connector by moving within the opening. | 12-25-2014 |
20140377980 | Electrical Connector Contact Terminal - An electrical contact terminal includes a base portion for positioning and retaining the electrical contact terminal within a connector housing, an insulation displacement connecting portion extending upwardly from the base portion and comprising a pair of spaced apart arms defining an opening therebetween for receiving and making electrical contact with an electrical conductor, and a contact portion extending downwardly from the base portion and configured to float when the electrical contact terminal is retained and positioned within a connector housing. The contact portion includes a first arm, a second arm, and an arcuate base portion. The first arm extends downwardly and includes a first end attached to the base portion and an opposite second end. The second arm extends downwardly and includes a free first end closer to the base portion and an opposite second end farther from the base portion. The second arm is configured to deflect when making electrical contact with a mating contact pin. The arcuate base portion connects the second ends of the first and second arms. | 12-25-2014 |
20150205054 | UNITARY OPTICAL FERRRULE - A ferrule ( | 07-23-2015 |
20150219863 | OPTICAL CONNECTOR - Optical connectors are provided for connecting sets of optical waveguides, such as optical fiber ribbons to each other, to printed circuit boards, or to backplanes. The provided connectors utilize expanded beam optics with non-contact optical mating resulting in relaxed mechanical precision requirements. The provided connectors can have low optical loss, are easily scalable to high channel count (optical fibers per connector) and can be compatible with low insertion force blind mating. | 08-06-2015 |
20150222029 | BOARD MOUNT ELECTRICAL CONNECTOR ASSEMBLY - An electrical connector includes an insulative connector housing including a longitudinal bottom wall defining a plurality of contact openings for receiving a plurality of contacts, first and second side walls extending upwardly from the bottom wall at opposing sides thereof, first and second end walls extending upwardly from the bottom wall at opposing ends thereof, first and second pairs of latch openings at opposing ends of the bottom wall, and first and second protrusions extending upwardly from the bottom wall and disposed between respective first and second pairs of latch openings. Each latch opening extends through the bottom wall and through a side wall and is configured to allow a latch to eject a mating connector by moving within the opening. Each of the protrusions is configured to engage a corresponding opening in a latch of a mating connector cover or strain relief assembled to the electrical connector. | 08-06-2015 |
20150234126 | Optical Connector - Optical connectors are provided for connecting sets of optical waveguides ( | 08-20-2015 |
20150301295 | MULTI-CHANNEL OPTICAL CONNECTOR WITH COUPLING LENSES - Optical connectors are provided for connecting sets of optical waveguides ( | 10-22-2015 |
20150327357 | FLOATING CONNECTOR SHIELD - The disclosure generally relates to shielded transmission lines, electrical systems including the shielded transmission lines, cables using shielded transmission lines, and electrical connectors using shielded transmission lines. In particular, the present disclosure provides transmission lines that include floating shields capable of isolating interference between conductors that can result in reduced crosstalk. | 11-12-2015 |
Patent application number | Description | Published |
20080275998 | SOFTWARE DOWNLOADING USING A TELEVISION BROADCAST CHANNEL - A software distribution architecture having a television broadcast system as its infrastructure. Software from a software repository ( | 11-06-2008 |
20080301265 | METHOD FOR INTERFACING SCANNED PRODUCT INFORMATION WITH A SOURCE FOR THE PRODUCT OVER A GLOBAL NETWORK - A method for interfacing scanned product information with a source for the product over a global network. A method is provided for obtaining information regarding the source of a product from a remote information source location on a global communication network utilizing a product code associated with the product and unique thereto. The product code associated with the product is scanned with a scanner at a user location on the global communication network to extract the information contained in the unique product code therefrom. A unique scan ID code is associated with the scanning operation and a packet of information assembled that is comprised of the extracted product code and the unique scan ID code to provide a routing packet. The user location is then connected to the remote information source location utilizing the routing packet and in response to the step of scanning, wherein the routing packet is representative of the location of the remote information source location on the global communication network through an association with a routing table. | 12-04-2008 |
20090106450 | INPUT DEVICE FOR ALLOWING INTERFACE TO A WEB SITE IN ASSOCIATION WITH A UNIQUE INPUT CODE - An input device for allowing interface to a web site in association with a unique input code. A method for interconnecting a first location on a global communication network with a second location thereon is disclosed. An input device is provided at the first location on the global communication network having associated therewith a unique input device ID. A product code disposed on a product is scanned with the input device, which product code is representative of the product in commercial transactions, the operation of scanning operable to extract the information contained in the product code to provide a unique value as an output. The unique value is then associated with the unique input device ID. In response to the operation of scanning and associating, the first location is connected to the second location. | 04-23-2009 |
20090248892 | METHOD AND APPARATUS FOR LAUNCHING A WEB BROWSER IN RESPONSE TO SCANNING OF PRODUCT INFORMATION - A method for interconnecting a user's location to a destination location on a network. The unique information is received at the user's location, which unique information has no associated routing information embedded therein. Network routing information is associated with the received unique information in response to receipt thereof. The user's location is then interconnected to the destination location across the network in accordance with the routing associated therewith in the step of associating. | 10-01-2009 |
20090254673 | SOFTWARE DOWNLOADING USING A TELEVISION BROADCAST CHANNEL - A software distribution architecture having a television broadcast system as its infrastructure. Software from a software repository ( | 10-08-2009 |
Patent application number | Description | Published |
20090268605 | Method and System for Network Backbone Analysis - A method and system of an embodiment may include receiving network path information identifying one or more network paths, receiving network traffic information specifying a network ingress and a network egress for the network traffic on a first network path of the one or more identified network paths and the network traffic information specifying one or more attributes of the network traffic, emulating failure of one or more components of the first network path, determining a second network path between the specified network ingress and the specified network egress to accommodate the network traffic from the first network path, and providing information associated with the second network path. | 10-29-2009 |
20100061264 | METHOD AND SYSTEM FOR IDENTIFYING NETWORK PATHS - A method and system of an embodiment may include receiving network information associated with one or more network links, one or more network nodes, and a network hub, identifying at least two network paths from at least one of the one or more network nodes to the network hub based on the network information. Identifying at least two network paths from at least one of the one or more network nodes to the network hub based on the network information may include determining a number of hops for each identified network path, determining a latency of each link for each identified network path, summing the latencies of each link for each identified network path to calculate a total network path latency, and determining a ranking of the network paths based at least in part on the number of hops and the total network path latency. | 03-11-2010 |
20140086576 | DETERMINING LEAST-LATENCY PATHS ACROSS A PROVIDER NETWORK UTILIZING AVAILABLE CAPACITY - A computer device may include logic configured to receive a selection of a start node and an end node in an optical network and obtain network topology information relating to the optical network. The logic may be further configured to determine link latencies for particular links in the optical network; determine a least latency path between the start node and the end node based on the obtained network topology information and the determined link latencies, and wherein the least latency path includes one or more of the particular links; determine one or more alternate paths to the determined least latency path; determine channel availability for the least latency path and the one or more alternate paths; and generate a user interface that relates the least latency path and the one or more alternate paths to the determined channel availability. | 03-27-2014 |
Patent application number | Description | Published |
20080282640 | CABLE ANCHOR - A cable anchor has ball surfaces that permit misalignment between the cable and a stem of the anchor, and a fitting that permits the introduction of a corrosion inhibitor to the interior of the anchor. | 11-20-2008 |
20120031035 | Cable Anchor - A cable anchor has ball surfaces that permit misalignment between the cable and a stem of the anchor, and a fitting that permits the introduction of a corrosion inhibitor to the interior of the anchor. | 02-09-2012 |
20140245678 | High Performance Wedge Design for Post-Tension Anchorage - A wedge for a concrete post-tension reinforcement anchorage system is shaped such that the compressive force on the tendon after tensioning of the anchorage system is substantially evenly distributed over a length of the outer surface of the tendon that is engaged by the internal surface of the wedge. The external surface of the wedge may have a first section with a first taper angle and a second section with a second taper angle, the second taper angle being larger than the first taper angle. The internal surface of the wedge may have a first section with a first taper angle and a second section with a second taper angle, the second taper angle being greater than the first taper angle. An anchor with a bore with two taper angles and tooth profiles of threading patterns on the internal surface of the wedge are also disclosed. | 09-04-2014 |
20150345142 | Post-Tensioned Concrete Reinforcement Anchor Assembly With Radiused Tooth Tips - A wedge for a concrete post-tension reinforcement anchorage system is shaped such that the compressive force on the tendon after tensioning of the anchorage system is substantially evenly distributed over a length of the outer surface of the tendon that is engaged by the internal surface of the wedge. The external surface of the wedge may have a first section with a first taper angle and a second section with a second taper angle, the second taper angle being larger than the first taper angle. The internal surface of the wedge may have a first section with a first taper angle and a second section with a second taper angle, the second taper angle being greater than the first taper angle. An anchor with a bore with two taper angles and tooth profiles of threading patterns on the internal surface of the wedge are also disclosed. | 12-03-2015 |
Patent application number | Description | Published |
20080263301 | KEY-CONTROLLED OBJECT-BASED MEMORY PROTECTION - A method, system, and program key-controlled object-based memory protection are provided. A processing unit includes an authority check for controlling access by the processing unit to pages of memory according to whether a hardware protection key set currently loaded in an authority mask register allows access to the pages. In particular, each page of memory is assigned a page key number that indexes into the hardware protection key set. The currently loaded hardware protection key set specifies those page key numbers that are currently accessible to the processing unit for the execution context. Each hardware key within the hardware protection key set may be associated with a particular data object or group of data objects. Thus, effectively, the currently loaded hardware protection key set identifies which data objects or groups of data objects are currently accessible. Software keys are assigned to data objects and dynamically mapped to hardware protection key sets, such that when a module is called, the software keys assigned to that module are mapped to the hardware protection key set to be loaded for controlling current access to memory. | 10-23-2008 |
20090113165 | Method and System for Automatically Distributing Real Memory Between Virtual Memory Page Sizes - A method, system and computer program product for allocating real memory to virtual memory page sizes when all real memory is in use is disclosed. In response to a page fault, a page frame for a virtual page is selected. In response to determining that said page does not represent a new page, a page is paged-in into said page frame a repaging rate for a page size of the page is modified in a repaging rates data structure. | 04-30-2009 |
20120284230 | Importing Pre-Existing Data of a Prior Storage Solution into a Storage Pool for Use with a New Storage Solution - Mechanisms are provided for importing pre-existing data into a storage system utilizing a current storage management system that is different from an original storage management system used to create the pre-existing data. One or more data storage devices are integrated into the storage system in-place without modification of the pre-existing data stored on the one or more data storage devices. Metadata for the pre-existing data is created based on a linear progression of data in the pre-existing data. Read access requests targeting the pre-existing data are executed using the created metadata. Write access requests targeting the pre-existing data are executed by redirecting the write access requests to a copy of the pre-existing data created in another storage location. | 11-08-2012 |
20120284309 | Importing Pre-Existing Data of a Prior Storage Solution into a Storage Pool for Use with a New Storage Solution - Mechanisms are provided for importing pre-existing data into a storage system utilizing a current storage management system that is different from an original storage management system used to create the pre-existing data. One or more data storage devices are integrated into the storage system in-place without modification of the pre-existing data stored on the one or more data storage devices. Metadata for the pre-existing data is created based on a linear progression of data in the pre-existing data. Read access requests targeting the pre-existing data are executed using the created metadata. Write access requests targeting the pre-existing data are executed by redirecting the write access requests to a copy of the pre-existing data created in another storage location. | 11-08-2012 |
Patent application number | Description | Published |
20090272126 | Transporting and Managing Liquefield Natural Gas - The present application is directed to methods and systems for transporting or importing LNG via vessels. Under the present techniques, SRTs, which are equipped with regasification equipment, LNG offloading equipment (e.g. marinized mechanical loading arms), LNG storage tanks, and equipment to transfer natural gas to an import terminal are utilized as temporary interchangeable FSRUs (TIFs). Two or more TIFs in conjunction with transport vessels (e.g. LNGCs) are utilized to transfer LNG between an export terminal and an import terminal. A first of the TIFs is utilized at an import terminal to offload LNG from LNGCs, while the second of the TIFs is utilized as a LNGC, carrying LNG between the export terminal and import terminal. The first of the TIFs may be replaced by the second of the TIFs to maintain operations for the import terminal. The use of multiple TIFs in combination with LNGCs provides an alterative LNG delivery approach in comparison to having a permanently moored FSRU located at the import terminal or using a fleet of SRT vessels to transport LNG between an export terminal and an import terminal. | 11-05-2009 |
20110297346 | Methods and Systems of Regenerative Heat Exchange - The present disclosure teaches apparatuses, systems, and methods for improving energy efficiency using high heat capacity materials. Some embodiments include a phase change material (PCMs). Particularly, the systems may include a re-gasification system, a liquefaction system, or an integrated system utilizing a heat exchanger with a regenerator matrix, a shell and tube arrangement, or cross-flow channels (e.g. a plate-fin arrangement) to store cold energy from a liquefied gas in a re-gasification system at a first location for use in a liquefaction process at a second location. The regenerator matrix may include a plurality of PCMs stacked sequentially or may include a continuous phase material comprised of multiple PCMs. Various encapsulation approaches may be utilized. Reliquefaction may be accomplished with such a system. Natural gas in remote locations may be made commercially viable by converting it to liquefied natural gas (LNG), transporting, and delivering it utilizing the disclosed systems and methods. | 12-08-2011 |