Patent application number | Description | Published |
20100234752 | EEG control of devices using sensory evoked potentials - An EEG control of devices using Sensory Evoked Potentials (SEPs) (e.g., visually-evoked potentials), is disclosed. In some embodiments, a system receives a plurality of EEG signal samples; generates a stimulus locked average signal using the plurality of EEG signal samples; and determines whether the plurality of EEG signal samples are evoked in response to a pattern of stimulus. | 09-16-2010 |
20110040202 | SENSORY-EVOKED POTENTIAL (SEP) CLASSIFICATION/DETECTION IN THE TIME DOMAIN - Techniques are disclosed for sensory-evoked potential (SEPs, e.g., visual-evoked potentials) signal detection/classification by synchronizing EEG to the repeated presentation of sensory stimuli in the time domain. In some embodiments, a system receives a plurality of EEG signal samples, generates a stimulus-locked EEG and determines whether the plurality of EEG signal samples are evoked in response to a pattern of stimulus. In some embodiments, no prior knowledge about the update pattern (such as the flashing frequency of a visual stimulus) of the stimulus and no prior knowledge about an individual user's EEG pattern are required. | 02-17-2011 |
20120197092 | DRY SENSOR EEG/EMG AND MOTION SENSING SYSTEM FOR SEIZURE DETECTION AND MONITORING - A dry sensor EEG/EMG and motion sensing system for seizure detection and monitoring is disclosed. In some embodiments, a system for seizure detection/monitoring is provided that can measure a user's EEG/EMG and motor activity, automatically detect an epileptic seizure and perform actions, such as triggering an alarm and/or turning off the provoking stimulation. In some embodiments, a system for seizure detection/monitoring is provided that can be used to continuously monitor and store a user's EEG/EMG and motor activity for doctor evaluation. In some embodiments, a system for seizure detection/monitoring is provided that can be mounted directly on a user's head using active dry EEG sensors. In some embodiments, a system for seizure detection/monitoring is provided that can be mounted into/onto a pair of glasses (e.g., 3D glasses), and the user's eyes can be automatically covered by the glasses if a seizure is detected. | 08-02-2012 |
20120220889 | EEG CONTROL OF DEVICES USING SENSORY EVOKED POTENTIALS - An EEG control of devices using Sensory Evoked Potentials (SEPs) (e.g., visually-evoked potentials), is disclosed. In some embodiments, a system receives a plurality of EEG signal samples; generates a stimulus locked average signal using the plurality of EEG signal samples; and determines whether the plurality of EEG signal samples are evoked in response to a pattern of stimulus. | 08-30-2012 |
20130211276 | SENSORY-EVOKED POTENTIAL (SEP) CLASSIFICATION/DETECTION IN THE TIME DOMAIN - Techniques are disclosed for sensory-evoked potential (SEPs, e.g., visual-evoked potentials) signal detection/classification by synchronizing EEG to the repeated presentation of sensory stimuli in the time domain. In some embodiments, a system receives a plurality of EEG signal samples, generates a stimulus-locked EEG and determines whether the plurality of EEG signal samples are evoked in response to a pattern of stimulus. In some embodiments, no prior knowledge about the update pattern (such as the flashing frequency of a visual stimulus) of the stimulus and no prior knowledge about an individual user's EEG pattern are required. | 08-15-2013 |
20140073969 | MOBILE CARDIAC HEALTH MONITORING - Techniques for mobile cardiac health monitoring are disclosed. In some embodiments, a system for mobile cardiac health monitoring includes a mobile device that includes a processor configured to receive a first set of data from an optical sensor; receive a second set of data from an electrical sensor; and perform a plurality of cardiac health measurements using the first set of data from the optical sensor and the second set of data from the electrical sensor. | 03-13-2014 |
Patent application number | Description | Published |
20080198824 | SYSTEM AND METHOD FOR QOS PROVISIONING IN BROADBAND WIRELESS MESH NETWORKS - A method and system for QoS provisioning in broadband wireless mesh networks are disclosed. According to one embodiment, a computer-implemented method, comprises providing a dual mode mesh router having a plurality of radios, wherein the mesh router is used in a cell of a plurality of cells that covers a geographic region. The mesh router includes one or more WiMAX backhaul radios, one or more WiFi backhaul radios, one or more WiMAX access radios, one or more WiFi access radios, and three or more intra-mesh radios. Traffic is received at the dual mode mesh router. A minimum quality of service requirement is identified for the traffic. The traffic is routed via the one or more WiMAX backhaul radio when the minimum quality of service meets a predetermined value. | 08-21-2008 |
20090187983 | METHOD AND SYSTEM FOR DISTRIBUTED, LOCALIZED AUTHENTICATION IN THE FRAMEWORK OF 802.11 - A method for controlling Internet access of a mobile device by using a communication system having a number of access points includes the steps of performing a certificate-based authentication between an authentication access point and a mobile device seeking access to the Internet; transmitting a certificate from the mobile device to the authentication access point; verifying the certificate by the authentication access point; determining whether the authenticating mobile device's certificate has been revoked prior to the expiration of its lifetime; and granting the authenticating mobile device access to the Internet, if the certificate has been verified successfully and not revoked prior to the expiration of its lifetime. | 07-23-2009 |
20100027464 | Method & apparatus for minimizing packet transmission loss in a wireless network - A wireless communication device, such as a wireless router or access point, transmits and receives signals according any one of several standard or proprietary wireless protocols and automatically adapts its transmission rate according to the condition of a link or channel over which it is sending and receiving signals. A packet delay value is used to calculate the maximum number of packet retransmissions that are acceptable given a particular application. The packet retransmission value is used to calculate a maximum acceptable packet loss value which is then compared against actual packet losses to determine whether or not to change the packet transmission rate. If it is determined that the actual packet losses are less than the maximum acceptable value, then the packet transmission rate can be changed to a higher rate and if it is determined that the actual packet losses are greater than the maximum acceptable value, then the packet transmission rate can be changed to be a lower rate. | 02-04-2010 |
Patent application number | Description | Published |
20080315918 | Thin film transistor logic - A thin-film logic circuit, which can be fabricated entirely of TFTs of the same conductivity type, includes a logic stage connected to a supply voltage and a level shifter connected to a wider voltage range provided by the supply voltage and ground. The logic circuit produces output signals with full rail-to-rail signal range from ground to the supply voltage and can implement or include a basic logic component such as an inverter, a NAND gate, or a NOR gate or more complicated circuits in which many basic logic components are cascaded together. Such logic circuits can be fabricated directly on flexible structures or large areas such as in flat panel displays. | 12-25-2008 |
20100078640 | Thin Film Transistor Backplane - A fabrication process for a device such as a backplane for a flat panel display includes depositing thin film layers on a substrate, forming a 3D template overlying the thin film layers, and etching the 3D template and the thin film layers to form gate lines and transistors from the thin film layers. An insulating or passivation layer can then be deposited on the gate lines and the transistors, so that column or data lines can be formed on the insulating layer. | 04-01-2010 |
20110309365 | THIN FILM TRANSISTOR BACKPLANE - A fabrication process for a device such as a backplane for a flat panel display includes depositing thin film layers on a substrate, forming a 3D template overlying the thin film layers, and etching the 3D template and the thin film layers to form gate lines and transistors from the thin film layers. An insulating or passivation layer can then be deposited on the gate lines and the transistors, so that column or data lines can be formed on the insulating layer. | 12-22-2011 |
20120043470 | X-RAY IMAGING APPARATUS - An X-ray imaging apparatus includes a top transparent conductive layer and a bottom transparent conductive layer electrically connected to the top transparent conductive layer. The apparatus also includes an X-ray field modulator positioned adjacent to the bottom transparent conductive layer and an electro-optic layer positioned between the X-ray field modulator and the top transparent conductive layer. The X-ray field modulator is configured to modulate one of a resistance and a charge level therethrough when exposed to different X-ray levels to thereby create different levels of voltage drop across the electro-optic layer. In addition, the different levels of voltage drop causes varying optical properties to appear in the electro-optic layer. | 02-23-2012 |
Patent application number | Description | Published |
20110106421 | NAVIGATION SYSTEM WITH SINGLE SELECTION MILEAGE SINGLE CAPTURE MECHANISM AND METHOD OF OPERATION THEREOF - A method of operation of a navigation system includes: generating a travel route having a business location for displaying on a device; calculating a current location along the travel route; identifying a travel segment with the current location; calculating a travel distance for the travel segment; and verifying the travel distance based on where the business location is within the travel segment. | 05-05-2011 |
20110246057 | HYBRID NAVIGATION SYSTEM WITH LOCATION BASED SERVICES AND METHOD OF OPERATION THEREOF - A method of operation of a hybrid navigation system includes: providing a position information for locating a first device; linking a second position to the position information, the second position for locating a second device; generating a planned route with the position information refined by the second position for transferring over a regional network to the first device or the second device; and storing saved route information from the planned route for displaying on the first device when the regional network is not available. | 10-06-2011 |
20110246068 | HYBRID NAVIGATION SYSTEM WITH NON-NETWORK UPDATE AND METHOD OF OPERATION THEREOF - A method of operation of a hybrid navigation system includes: providing a peer-to-peer communication controller for communicating with a first vehicle; linking a second peer-to-peer communication controller for communicating between a second vehicle and the first vehicle; providing a communication and navigation controller for monitoring a regional network for the first vehicle or the second vehicle including storing saved route information; and preparing a first route history file for transferring from first vehicle to the second vehicle including providing the first route history file from the saved route information for displaying in the second vehicle when the regional network is not available. | 10-06-2011 |
20110296392 | NAVIGATION SYSTEM WITH DYNAMIC APPLICATION EXECUTION MECHANISM AND METHOD OF OPERATION THEREOF - A method of operation of a navigation system includes: detecting a source application for registering the source application to a target device; generating a first application portion for partitioning the source application for running the first application portion; and operating the first application portion for interacting with the source application for partially controlling an execution of the source application. | 12-01-2011 |
20120089328 | NAVIGATION SYSTEM WITH DISTANCE LIMITATION MECHANISM AND METHOD OF OPERATION THEREOF - A method of operation of a navigation system includes: executing a distance bounded function for displaying on a device; setting a reference location; receiving a user location for monitoring a location of the device; measuring a distance travelled with the user location from the reference location only when the distance bounded function is executing; and deactivating the distance bounded function when the distance travelled equals or exceeds a distance limit. | 04-12-2012 |
20120130630 | NAVIGATION SYSTEM WITH DESTINATION TRAVEL CATEGORY EXTRACTION MEASUREMENT CAPTURE MECHANISM AND METHOD OF OPERATION THEREOF - A method of operation of a navigation system includes: generating a travel route having a first destination; assigning a first travel category for the first destination; detecting a detour to a second destination separate from the travel route; assigning a second travel category for the second destination; and capturing a mileage measurement for the travel route where the detour to the second destination is excluded based on the first travel category not being the same as the second travel category for displaying on a device. | 05-24-2012 |
20120131212 | NAVIGATION SYSTEM WITH SESSION TRANSFER MECHANISM AND METHOD OF OPERATION THEREOF - A method of operation of a navigation system includes: establishing a navigation session for routing from a starting point to a destination on a device; setting a transfer condition for continuing the navigation session between the device and a further device; and transferring the navigation session when the transfer condition is satisfied for routing with the further device for displaying on the further device. | 05-24-2012 |
20130201077 | NAVIGATION SYSTEM WITH DISPLAY CONTROL MECHANISM AND METHOD OF OPERATION THEREOF - A method of operation of a navigation system includes: determining a frame of a map based on a current travel-direction for tracking a movement of a first device; generating a directional-tile from the frame based on the current travel-direction; and transferring the directional-tile for displaying a navigation map on a second device using the directional-tile from the first device. | 08-08-2013 |
Patent application number | Description | Published |
20140138735 | JUNCTION-ISOLATED BLOCKING VOLTAGE DEVICES WITH INTEGRATED PROTECTION STRUCTURES AND METHODS OF FORMING THE SAME - Junction-isolated blocking voltage devices and methods of forming the same are provided. In certain implementations, a blocking voltage device includes an anode terminal electrically connected to a first p-well, a cathode terminal electrically connected to a first n-well, a ground terminal electrically connected to a second p-well, and an n-type isolation layer for isolating the first p-well from a p-type substrate. The first p-well and the first n-well operate as a blocking diode. The blocking voltage device further includes a PNPN silicon controlled rectifier (SCR) associated with a P+ region formed in the first n-well, the first n-well, the first p-well, and an N+ region formed in the first p-well. Additionally, the blocking voltage device further includes an NPNPN bidirectional SCR associated with an N+ region formed in the first p-well, the first p-well, the n-type isolation layer, the second p-well, and an N+ region formed in the second p-well. | 05-22-2014 |
20140332843 | JUNCTION-ISOLATED BLOCKING VOLTAGE STRUCTURES WITH INTEGRATED PROTECTION STRUCTURES - Junction-isolated blocking voltage devices and methods of forming the same are provided. In certain implementations, a blocking voltage device includes an anode terminal electrically connected to a first p-well, a cathode terminal electrically connected to a first n-well, a ground terminal electrically connected to a second p-well, and an n-type isolation layer for isolating the first p-well from a p-type substrate. The first p-well and the first n-well operate as a blocking diode. The blocking voltage device further includes a PNPN silicon controlled rectifier (SCR) associated with a P+ region formed in the first n-well, the first n-well, the first p-well, and an N+ region formed in the first p-well. Additionally, the blocking voltage device further includes an NPNPN bidirectional SCR associated with an N+ region formed in the first p-well, the first p-well, the n-type isolation layer, the second p-well, and an N+ region formed in the second p-well. | 11-13-2014 |
Patent application number | Description | Published |
20080311690 | ELIMINATE RELEASE ETCH ATTACK BY INTERFACE MODIFICATION IN SACRIFICIAL LAYERS - Methods of making a microelectromechanical system (MEMS) device are described. In some embodiments, the method includes forming a sacrificial layer over a substrate, treating at least a portion of the sacrificial layer to form a treated sacrificial portion, forming an overlying layer over at least a part of the treated sacrificial portion, and at least partially removing the treated sacrificial portion to form a cavity situated between the substrate and the overlying layer, the overlying layer being exposed to the cavity. | 12-18-2008 |
20090212935 | Anti-collision Emergency Braking System - An anti-collision emergency braking system enables emergency information transferring from leading vehicle to trailing vehicle and enables emergency automatic braking. It comprises a central commanding element which takes input from a number of sensing elements and gives commands to other acting elements: a receiver which receives emergency signals from the leading vehicle, a transmitter which sends out emergency signals toward the trailing vehicle, an accelerometer which senses the acceleration extents of the present vehicle, an automatic braking element which applies certain amount of braking power after receiving the commands from the central commanding element, and one or more warning elements. | 08-27-2009 |
20090257105 | DEVICE HAVING THIN BLACK MASK AND METHOD OF FABRICATING THE SAME - A thin black mask is created using a single mask process. A dielectric layer is deposited over a substrate. An absorber layer is deposited over the dielectric layer and a reflector layer is deposited over the absorber layer. The absorber layer and the reflector layer are patterned using a single mask process. | 10-15-2009 |
20120117799 | Miniaturized Spring Contact - A method of manufacturing an array of miniaturized spring contacts is disclosed. The invention teaches a symmetric design of the spring contact with two anchoring traces at each side of the spring contact, and teaches a method of forming the spring contact with a continuo us, zero-stress core member throughout the entire body of the spring contact; besides these, the invention enables easy manufacturing of integrated fine pitch spring contact arrays, allows fabrication of such spring contact arrays with extremely uniform spring height and good electrical and mechanical properties. | 05-17-2012 |
Patent application number | Description | Published |
20090059048 | IMAGE SENSOR WITH HIGH DYNAMIC RANGE IN DOWN-SAMPLING MODE - An image sensor has an array of photo-sensitive pixels and supports a line-by-line read out of rows. In a normal resolution each row has the same nominal gain and exposure time. In a down-sampling mode the exposure times of the rows are varied according to an alternating sequence having at least two different exposure times. During down-sampling, raw pixel data from rows with different exposure times is combined to simultaneously achieve down-sampling and a high dynamic range. | 03-05-2009 |
20090109305 | One-step black level calibration for image sensors - Embodiments of a process comprising receiving a plurality of offset analog signals, each corresponding to one of a plurality of black pixels in a pixel array; obtaining a corresponding digital value for each offset analog signal; computing an average of the digital values; and computing a black-level offset that, if applied to the digital values, would make the average of the digital values equal to a target value. Also disclosed are embodiments of an apparatus comprising an analog-to-digital converter coupled to an analog channel to receive offset analog black pixel signals from the analog channel and to obtain a corresponding digital value for each offset analog signal; circuitry and logic coupled to the analog-to-digital converter to average the digital values corresponding to the black pixels and compute a black-level offset that, if applied to the digital values of the black pixels, would make the average of the digital values of the black pixels equal to a target value. | 04-30-2009 |
20120194735 | System And Method For An Image Sensor Operable In Multiple Video Standards - An image sensor system and associated method supporting multiple video output standards, such as NTSC and PAL, including a pixel array corresponding in size to the frame size having a smaller line number of the video standards, is described. System and method for resolving discrepancies between standards includes multiple crystal oscillators or frequency synthesis to derive a dot clock, and a standard-specific pixel read-out scheme that provides additional lines when outputting according to the frame size having a larger line number of the video standards. In an embodiment, additional line video data is derived by duplicating a line of image data, and in an alternative embodiment additional line video data is derived by digital vertical interpolation. | 08-02-2012 |
20120274808 | IMAGE OVERLAY IN A MOBILE DEVICE - Image overlay in a mobile device is described. In one embodiment an imaging system of a mobile communications device includes a first camera having a control interface to a controller and a data interface to the controller, a second camera having a data interface to the first camera, and a processor to combine an image from the second camera received through the second camera data interface with an image from the first camera and to send the combined image to the controller through the data interface. | 11-01-2012 |
Patent application number | Description | Published |
20090108337 | Method of and circuit for protecting a transistor formed on a die - A method of protecting a transistor formed on a die of an integrated circuit is disclosed. The method comprises forming an active region of the transistor on the die; forming a gate of the transistor over the active region; coupling a primary contact to the gate of the transistor; coupling a programmable element between the gate of the transistor and a protection element; and decoupling the protection element from the gate of the transistor by way of the programmable element. Circuits for protecting a transistor formed on a die of an integrated circuit are also disclosed. | 04-30-2009 |
20110061711 | BUILDING-INTEGRATED SOLAR PHOTOVOLTAIC PANEL - A device to generate electricity from solar rays is provided. A photovoltaic solar cell unit comprises a first cover and a second cover. The second cover is generally parallel to the first cover and the second cover is spaced from the first cover. The first and the second cover have a longitudinal axis. The photovoltaic solar cell unit also includes a solar cell disposed between the first cover and the second cover with the solar cell being disposed at a predetermined angle relative to the longitudinal axis. | 03-17-2011 |
20110065226 | METHOD TO BREAK AND ASSEMBLE SOLAR CELLS - The present disclosure relates generally to a method to break and assemble solar cells to make solar panel. The present disclosure provides a method to produce solar pieces from solar cell, as well as assemble them together. The present disclosure device is unique when compared with other known devices and solutions because the present disclosure provides a high speed method to break scribed cells into pieces. A method of forming a string of solar cells includes providing a scribe line on a solar cell and placing a first ribbon on the solar cell. The method then includes placing the solar cell on a supporter and then breaking the solar cell into a plurality of solar cell pieces. The method then has the step of placing a second ribbon on the solar cell pieces and soldering the first and second ribbons and the solar cell pieces and then assembling the solar cell pieces into a string of solar cells. | 03-17-2011 |
20110088743 | METHOD TO MANAGE A PHOTOVOLTAIC SYSTEM - An apparatus and method relates to managing and controlling a photovoltaic system, especially for the safety, maintenance, alert of theft, and connection failure of the system. It is more specially for cases during the night time when the panel is not generating electricity. The present disclosure provides: an AC panel, an inverter; a communication circuit in a panel inverter to send and receive signals, a control circuit, a communicator and a power line communication method between communicator and panel inverters. The communicator detects an identification of each panel to identify the panels and collect data from each panel. The communicator is connected to the Internet through a web gateway. The apparatus also has a web based managing system to collect data from the communicator, as well as transmit signals to the communicator. | 04-21-2011 |
20110090089 | METHOD AND APPARATUS FOR DETECTING A FAULT IN A SOLAR CELL PANEL AND AN INVERTER - A method and apparatus for detecting a fault of a solar panel and an inverter in a solar array includes a monitoring device to detect and to identify a fault of a solar panel and an inverter in a solar array. The method generates a normal operation profile by extracting median values of operation profiles from multiple solar panels in a solar array and then compares an individual operation profile against a normal profile to determine a fault in a solar panel. The method and apparatus can detect a fault in a combination of solar panel and inverter and can identify a fault in an inverter. The method and apparatus can store faulty profiles in a database for particular faults in a solar panel. The method and apparatus can then compare an operation profile from a faulty solar panel with a number of faulty profiles in a database to identify the type of the fault and then generate and report the fault and suggest corrective action. | 04-21-2011 |
20110249474 | METHOD AND APPARATUS FOR POWER CONVERSION USING AN INTERLEAVED FLYBACK CONVERTER WITH ALTERNATING MASTER AND SLAVE BRANCHES - Embodiments of the present invention generally relate to power conversion and, more particularly, to a method and apparatus for performing power conversion using an interleaved flyback converter with alternating master and slave branches. The apparatus comprises a plurality of parallel connected flyback circuits; a controller is coupled to the switches within the flyback circuits to turn-on and turn-off the plurality of flyback circuits; a current monitor element at the output connected to the controller; a voltage monitor element connected to the controller; based on monitored current and voltage the controller controls the operation of flyback circuit; slave circuit only turn-on when the power is higher than a threshold value; the master and slave circuits are alternating to even the usage of the circuits. | 10-13-2011 |