Patent application number | Description | Published |
20090106462 | METHOD AND CIRCUIT FOR CAPTURING KEYPAD DATA SERIALIZING/DESERIALIZING AND REGENERATING THE KEYPAD INTERFACE - A serializer/deserializer interfacing a keypad or keyboard to a processing system is illustrated. In one application, the processor is arranged to generate keypad scan and input keypad sense lines directly. However, to minimize wires on intervening cables, a serializer and deserializer is inserted between the processor system, the serializer/deserializer forming a virtual keypad. In this case, the processor scans the deserializer as if it were the keypad and the keypad is scanned by the serializer as if it were the processor. However, the serializer converts the scanning of the keypad into a serial bit stream that is sent to the deserializer using only a data line and a clock line. The deserializer accepts the serial bit stream and reconfigures the data into a response that mimics the response of the physical keypad as the computer system scans the virtual keypad, the deserializer. In one embodiment an actual second keypad is formed in the deserializer and activated as the first keypad is activated, wherein the computer scans the second keypad in the usual fashion. | 04-23-2009 |
20090110130 | METHOD AND CIRCUIT FOR CHANGING MODES WITHOUT DEDICATED CONTROL PIN - A system and process for eliminating a control wire between logic systems that communicate with each other. In one embodiment, a system sends to a receiver a frequency that indicates a first mode. In the first mode a first data type may be sent. When the frequency is changed a second mode is indicated wherein a second data type may be sent. The receiver detects the frequency change and assumes the first or second mode as indicated. | 04-30-2009 |
20090116515 | METHOD AND CIRCUIT FOR INTERLEAVING, SERIALIZING AND DESERIALIZING CAMERA AND KEYPAD DATA - A system for interleaving high speed data and slower data that is serialized and delivered to a microprocessor. The typical source of the high speed data is a camera and the source of the slower data is a keyboard. The high speed data and the slower data, illustratively, are interfaced with a micro-processor in a parallel fashion. The present invention mirrors the parallel interface to the microprocessor, and mirrors the parallel interface to the sources of the high speed (camera) and slower (keypad) data. The present system formats parallel data from the sources and passes that data in serial form, typically with a clock, on a flexible cable that joins two sections of many cell phones or other hand held devices. | 05-07-2009 |
Patent application number | Description | Published |
20090037621 | METHODOLOGY AND CIRCUIT FOR INTERLEAVING AND SERIALIZING/DESERIALIZING LCD, CAMERA, KEYPAD AND GPIO DATA ACROSS A SERIAL STREAM - A serializing/deserializing interface is discussed for reducing the number of connections and signals being carried over a flex cable as would be found in a hand held mobile device. In particular the interface interleaves data, multiplexes data and multiplexes control for a number of I/O devices. For example those I/O devices might include an LCD display, a camera, a keypad and a GPIO (general purpose I/O) device. | 02-05-2009 |
20090195271 | FREQUENCY MODE SELECTION DISCRIMINATOR AND LOW PASS FILTER - A circuit is described that detects high and low frequencies and additional clock frequencies and outputs a signal that indicates a high, a low frequency or an additional mode. When in the low frequency low frequency mode signals are regenerated free of any high frequency signals from appearing on the filtered low frequency clock line. The rising and falling edges of the input clock are low pass filtered separately and then combined to generate a low frequency clock or the additional input clock and that retains the input clock pulse width and duty cycle. | 08-06-2009 |
20090231171 | LOW POWER SERDES ARCHITECTURE USING SERIAL I/O BURST GATING - A serializer/deserializer is disclosed with a flexible design that allows for sending data streams between computer systems where the power dissipation is markedly reduced by placing the serializer/deserializer in a standby, low power mode between the sending of data. Word data bits are framed and sent along with clock pulses that define when the bits may be reliably received. High speed, typically, CTL logic is used for the transmission line drivers and together with the clock pulse, a data word is sent faster than the computer system can send the next word to the serializer/deserializer. The disclosure frames the word and detects the word end, whereupon the system is placed into the standby mode. In addition the serializer/deserializers may be placed in a master/slave arrangement where the slave can be arranged to use the master's clock to send word data bits back to the master. | 09-17-2009 |
20100225565 | MIPI ANALOG SWITCH FOR EFFICIENT SELECTION OF MULTIPLE DISPLAYS - An MIPI controller using undefined or unknown MIPI LP codes to select among several destinations is disclosed. The codes may be intercepted and decoded to select among analog switches that, in one illustrative embodiment, connects the MIPI clock and data signals to a first or a second or to both displays of a mobile phone. In other applications additional destinations may also be selected. | 09-09-2010 |
20100231285 | MIPI ANALOG SWITCH FOR AUTOMATIC SELECTION OF MULTIPLE IMAGE SENSORS - An MIPI interface is connected to two sensor sources that each may be transferring both high and low speed information, typically video information in the high speed state. The clock signals are monitored and when one of the clock signals exceed a threshold, an analog switch between the MIPI interface and the sensors, may connect the other source to the MIPI interface. | 09-16-2010 |
20100244907 | LOW SPEED, LOAD INDEPENDENT, SLEW RATE CONTROLLED OUTPUT BUFFER WITH NO DC POWER CONSUMPTION - An output buffer utilizes capacitive feedback to control the output slew rate largely independent of load capacitance. The invention slows the rising and falling slew rates and via a capacitance feedback reduces the effect of load capacitance on slew rate, and uses no DC current. Transistor switches are employed to isolate and reduce noise and interaction among the circuit components and functions. | 09-30-2010 |
20120326764 | MIPI ANALOG SWITCH FOR AUTOMATIC SELECTION OF MULTIPLE IMAGE SENSORS - An MIPI interface is connected to two sensor sources that each may be transferring both high and low speed information, typically video information in the high speed state. The clock signals are monitored and when one of the clock signals exceed a threshold, an analog switch between the MIPI interface and the sensors, may connect the other source to the MIPI interface. | 12-27-2012 |