Patent application number | Description | Published |
20120170804 | Method and apparatus for tracking target object - A method and apparatus for tracking a target object are provided. A plurality of images is received, and one of the images is selected as a current image. A specific color of the current image is extracted. And the current image is compared with a template image to search a target object in the current image. If the target object is not found in the current image, a previous image with the target object is searched in the images received before the current image. And the target object is searched in the current image according to an object feature of the previous image. The object feature and an object location are updated into a storage unit when the target object is found. | 07-05-2012 |
20130009862 | DISPLAY APPARATUS - A display apparatus including an image generator, a projection lens set, a depth detecting module detecting the position of user, and a control unit is provided, wherein the control unit is electrically connected to the image generator, the projection lens set and the depth detecting module. An image displayed by the image generator is projected through the projection lens set and generates a floating real image between the projection lens set and the user. Each beam forming the floating real image has a light-cone angle θ. The image generator and the projection lens adjust the position of the floating real image according to the position of user. The size of the floating real image is L, the distance between two eyes of the user is W, the distance between the user and the floating real image is D, and the light-cone angle θ satisfies the formula of | 01-10-2013 |
20140176676 | IMAGE INTERACTION SYSTEM, METHOD FOR DETECTING FINGER POSITION, STEREO DISPLAY SYSTEM AND CONTROL METHOD OF STEREO DISPLAY - The disclosure provides a stereo display system including a stereo display, a depth detector, and a computing processor. The stereo display displays a left eye image and a right eye image, such that a left eye and a right eye of a viewer generate a parallax to view a stereo image. The depth detector captures a depth data of a three-dimensional space. The computing processor controls image display of the stereo display. The computing processor analyzes an eyes position of the viewer according to the depth data, and when the viewer moves horizontally, vertically, or obliquely in the three-dimensional space relative to the stereo display, the computing processor adjusts the left eye image and the right eye image based on variations of the eyes position. Furthermore, an image interaction system, a method for detecting finger position, and a control method of stereo display are also provided. | 06-26-2014 |
Patent application number | Description | Published |
20080285639 | OFFSET CALIBRATION METHODS AND RADIO FREQUENCY DATA PATH CIRCUITS - An offset calibration method is provided. Two input terminals of an equalizer are switched to a common voltage at a first time point, wherein the equalizer generates a first equalized signal and a second equalized signal according to the common voltage. It is determined whether a first offset voltage is present in the equalizer according to the first and second equalized signals generated from the common voltage. If the first offset voltage is determined to be present in the equalizer, a first compensation voltage is provided to the equalizer. | 11-20-2008 |
20090128695 | DEVICES AND METHODS FOR EXTRACTING A SYNCHRONIZATION SIGNAL FROM A VIDEO SIGNAL - A device for extracting a synchronization signal from a video signal has a first comparator and an adjustment circuit. The first comparator receives the video signal, compares the video signal with a first threshold, and generates the synchronization signal according to the compared result. The adjustment circuit receives the video signal, compares the video signal with a plurality of second thresholds of different values, and changes the first threshold according to the compared results. | 05-21-2009 |
20090322938 | METHOD AND RELATED IMAGE PROCESSING APPARATUS UTILIZED FOR COMBINING COLOR LOOK-UP TABLE AND VIDEO DAC CALIBRATION MAPPING TABLE - A signal processing apparatus for generating an output analog signal according to a raw digital signal is disclosed. The signal processing apparatus includes a DAC, a storage device, and an adjusting device. The storage device is utilized for storing a target mapping table equivalent to a combination of a predetermined correction mapping table and a DAC calibration mapping table corresponding to the DAC. The adjusting device is coupled to the DAC and the storage device, and is utilized for adjusting the raw digital signal to generate a calibrated digital signal according to the target mapping table stored in the storage device. The DAC converts the calibrated digital signal to generate the output analog signal. | 12-31-2009 |
20100060493 | MULTI-CHANNEL SAMPLING SYSTEM AND METHOD - An apparatus and method for sampling a plurality of digital video signals to generate an interleaved digital video signal is disclosed. The apparatus includes: a first analog-to-digital converter (ADC), coupled to an analog input signal, for converting the analog input signal to a first digital output signal according to a sampling clock signal; a second ADC, coupled to the analog input signal, for converting the analog input signal to a second digital output signal according to the sampling clock signal; a reference clock generator, for generating a reference clock; a random signal generator, for outputting control values in a random sequence; and a clock controller, coupled to the reference clock generator and the random signal generator, for modifying the reference clock signal according to the control values to generate the sampling clock signal to the first ADC and the second ADC. | 03-11-2010 |
20120014080 | ELECTRONIC DEVICE HAVING CIRCUIT BOARD WITH CO-LAYOUT DESIGN OF MULTIPLE CONNECTOR PLACEMENT SITES AND RELATED CIRCUIT BOARD THEREOF - An electronic device includes an integrated circuit, a connector, and a circuit board. The integrated circuit includes a first signal processing circuit, a second signal processing circuit, and an interface multiplexer having a first input port electrically connected to the first signal processing circuit, a second input port electrically connected to the second signal processing circuit, and an output port arranged to be electrically connected to the first input port or the second input port. The circuit board carries the integrated circuit and has a plurality of connector placement sites, including at least a first connector placement site each dedicated to the first signal processing circuit and at least a second connector placement site each dedicated to the second signal processing circuit. The connector placement sites and the output port of the interface multiplexer are electrically connected in series. The connector is installed on one of the connector placement sites. | 01-19-2012 |
20140137065 | ELECTRONIC DEVICE HAVING CIRCUIT BOARD WITH CO-LAYOUT DESIGN OF MULTIPLE CONNECTOR PLACEMENT SITES AND RELATED CIRCUIT BOARD THEREOF - An electronic device includes an integrated circuit, a connector, and a circuit board. The integrated circuit includes a first signal processing circuit, a second signal processing circuit, and an interface multiplexer having a first input port electrically connected to the first signal processing circuit, a second input port electrically connected to the second signal processing circuit, and an output port arranged to be electrically connected to the first input port or the second input port. The circuit board carries the integrated circuit and has a plurality of connector placement sites, including at least a first connector placement site each dedicated to the first signal processing circuit and at least a second connector placement site each dedicated to the second signal processing circuit. The connector placement sites and the output port of the interface multiplexer are electrically connected in series. The connector is installed on one of the connector placement sites. | 05-15-2014 |
Patent application number | Description | Published |
20090256948 | LENS MODULE WITH ZOOM AND AUTO-FOCUS FUNCTIONS - A lens module includes a case, one and more lens units positioned in the case and having at least one lens, a carrying member, a piezoelectric driving unit, and at least a fixing member. The carrying member is connected to the lens unit such that the lens unit is movable forward and backward. The piezoelectric driving unit is mounted in the case for transferring a driving force to the carrying member so as to carry the lens unit to move. By using this configuration, the front and rear lens units may conduct the auto focus function and the zoom function respectively, thereby reducing a stroke of the lens, and reducing the size of the lens driving unit. Accordingly, the lens module may be manufactured in a small size so that it may be inserted into a cellular phone. | 10-15-2009 |
20090284646 | FLASH MODULE AND IMAGE CAPTURING DEVICE HAVING SAME - An image capturing device includes a main body and a flash module disposed on a surface of the main body. The flash module includes a lamp tube, a reflector, and a rotating shaft. The reflector is configured for reflecting the light emitted from the lamp tube. The rotating shaft is assembled on the main body and rotatable relative to the main body. The rotating shaft is secured on a surface of the reflector facing away from, and parallel to the lamp tube. | 11-19-2009 |
20100033564 | VEHICLE MONITORING SYSTEM - A monitoring system for a vehicle includes an image capture unit, a reflective film, and a projection unit. The vehicle includes a windshield. The image capture unit is configured for acquiring visual information of the vehicle. The reflective film is formed on a predetermined area of the windshield. The projection unit is configured for projecting the images onto the predetermined area. | 02-11-2010 |
Patent application number | Description | Published |
20090105976 | AUTOMATIC JITTER MEASUREMENT METHOD - An automatic jitter measurement method for an oscilloscope is provided. The method includes: establishing a database in a data processing unit, in which the step of establishing the database includes establishing at least a horizontal delay parameter and a horizontal scale parameter; enabling the oscilloscope for fetching a test signal, according to the horizontal delay parameter and the horizontal scale parameter; enabling a signal accumulation function of the oscilloscope for obtaining a signal accumulation maximum position value and a signal accumulation minimum position value of the test signal; and adjusting a display position of the test signal on the oscilloscope to obtain a jitter value of the test signal according to the signal accumulation maximum position value and the signal accumulation minimum position value. | 04-23-2009 |
20090192739 | AUTOMATIC SIGNAL IDENTIFYING METHOD AND AUTOMATIC SIGNAL SKEW MEASUREMENT METHOD - In order to automatically measure a signal skew between a first test signal and a second test signal by using an oscilloscope, a method is provided by the present invention. The method includes: capturing a band center of the first test signal; capturing a first sampling point and a second sampling point of the second test signal; comparing a voltage difference between the first sampling point and the second sampling point of the second test signal with a threshold value so as to decide and capture a rising band center and a falling band center of the second test signal. By using the invented method, the signal skew between the first test signal and the second test signal can be calculated according to the band center of the first test signal, the rising band center and the falling band center of the second test signal. | 07-30-2009 |
20100188817 | HEAT DISSIPATION DEVICE - A heat dissipation device is used for dissipating heat generated from a plurality of memory modules inserted on a motherboard. The memory modules are parallel to each other. Two hooks are disposed at two ends of the slot of each memory connector, respectively, to clamp the memory module corresponding to the slot when the memory module is inserted in the slot. The heat dissipation device includes two fixing frames, a connection frame, and two fans. The two fixing frames are disposed at two opposite ends of the memory connectors and fastened with the hooks at two ends of each slot, respectively. Additionally, the connection frame is connected between the two fixing frames. The two fans are disposed on the two fixing frames, respectively. An air inlet of one of the two fans faces an air outlet of the other one. | 07-29-2010 |
Patent application number | Description | Published |
20090022187 | LASER MODULE - A laser module including at least one light-emitting unit, a filter and a poled nonlinear optical crystal is provided. The light-emitting unit provides an incoherent beam. The filter is disposed on the transmission path of the incoherent beam and reflects at least a part of the incoherent beam. The poled nonlinear optical crystal is disposed on the transmission path of the incoherent beam, and has a plurality of poled portions. The poled portions have a plurality of first poled portions and a plurality of second poled portions which are alternately disposed. The incoherent beam passes through at least a part of the first poled portions and a part of the second poled portions. At least parts of the poled portions have different average widths from each other in the direction parallel to the chief ray of the incoherent beam. | 01-22-2009 |
20090141749 | LASER MODULE - A laser module including a light emitter, a filter, a nonlinear optical crystal, a first temperature adjuster, and a second temperature adjuster is provided. The light emitter emits a first beam. The filter is disposed on a transmission path of the first beam and reflects the first beam. The nonlinear optical crystal is disposed on the transmission path of the first beam and between the light emitter and the filter. The nonlinear optical crystal converts a part of the first beam into a second beam. A frequency of the second beam is larger than a frequency of the first beam. The second beam passes through the filter. The first temperature adjuster is connected with the filter for adjusting a temperature of the filter. The second temperature adjuster is connected with the nonlinear optical crystal for adjusting a temperature of the nonlinear optical crystal. | 06-04-2009 |
20090147349 | LASER MODULE - A laser module including a light emitter, a polarizing and filtering unit, a nonlinear optical crystal, and a first filter is provided. The light emitter emits a first beam. The polarizing and filtering unit is disposed on a transmission path of the first beam. A part of the first beam passes through the polarizing and filtering unit to become as a second beam with a specific polarization direction. The nonlinear optical crystal is disposed on a transmission path of the second beam from the polarizing and filtering unit. The nonlinear optical crystal converts a part of the second beam into a third beam. The first filter is disposed on a transmission path of the other part of the second beam and the third beam from the nonlinear optical crystal. The other part of the second beam is reflected by the first filter. The third beam passes through the first filter. | 06-11-2009 |
20090147514 | DISPLAY METHOD AND ILLUMINATION SYSTEM THEREOF - An illumination system is provided, which provides a plurality of light beams to a light valve. The illumination system includes a plurality of light sources, a polynomial lens and an optical scanning element. The light sources are capable of emitting the light beams. The polynomial lens is disposed on light paths of the light beams and located between the light sources and the light valve. The polynomial lens shapes the light beams into a plurality of rectangular light beams. The optical scanning element is disposed on light paths of the rectangular light beams and located between the polynomial lens and the light valve. The optical scanning element is capable of moving for scanning the rectangular light beams on the light valve unidircetionally or back and forth along a direction, and the rectangular light beams partially overlap with each other on the light valve. | 06-11-2009 |
20110170303 | CHIP PACKAGE AND FABRICATION METHOD THEREOF - A chip package includes a substrate having an upper, a lower, a first side, and a second side surfaces, a chip having a first and a second electrodes, a first trench extending from the upper surface toward the lower surface and from the first side surface toward an inner portion of the substrate, a first conducting layer overlying a sidewall of the first trench and electrically connecting the first electrode, which is not coplanar with the first side surface and separated from the first side surface by a first distance, a second trench extending from the upper surface toward the lower surface and from the second side surface toward the inner portion, and a second conducting layer overlying a sidewall of the second trench and electrically connecting the second electrode, which is not coplanar with the second side surface and separated from the second side surface by a second distance. | 07-14-2011 |
Patent application number | Description | Published |
20090289273 | LIGHT EMITTING DEVICE PACKAGE STRUCTURE AND FABRICATING METHOD THEREOF - A light emitting device package structure is described. The light emitting device package structure includes a substrate serving as a carrier supporting a light emitting device chip. The substrate and the light emitting device chip have a chip side and a substrate side separately. A first electrode layer is disposed on a first surface of the light emitting device chip and a second electrode layer is disposed on a second surface of the light emitting device chip, in which the first surface and the second surface are not coplanar. A first conductive trace is electrically connected to the first electrode layer and a second conductive trace is electrically connected to the second electrode layer. At least the first conductive trace or the second conductive trace is formed along the chip side and the substrate side simultaneously. | 11-26-2009 |
20100148210 | PACKAGE STRUCTURE FOR CHIP AND METHOD FOR FORMING THE SAME - An embodiment of the invention provides a package structure for chip. The package structure for chip includes: a carrier substrate having an upper surface and an opposite lower surface; a chip overlying the carrier substrate and having a first surface and an opposite second surface facing the upper surface, wherein the chip includes a first electrode and a second electrode; a first conducting structure overlying the carrier substrate and electrically connecting the first electrode; a second conducting structure overlying the carrier substrate and electrically connecting the second electrode; a first through-hole penetrating the upper surface and the lower surface of the carrier substrate and disposed next to the chip without overlapping the chip; a first conducting layer overlying a sidewall of the first through-hole and electrically connecting the first conducting electrode; and a third conducting structure overlying the carrier substrate and electrically connecting the second conducting structure. | 06-17-2010 |
20100181589 | CHIP PACKAGE STRUCTURE AND METHOD FOR FABRICATING THE SAME - The invention provides a chip package structure and method for fabricating the same. The chip package structure includes a carrier substrate. A plurality of isolated conductive layers is disposed on the carrier substrate. At least one chip is disposed on the carrier substrate, wherein the chip has a plurality of electrodes. The electrodes are electrically connected to the conductive layers. A conductive path is disposed in the carrier substrate, electrically connected to the electrodes through the conductive layers, wherein the conductive path comprises a plurality of laminating holes. | 07-22-2010 |
20110169042 | LIGHT EMITTING DIODE PACKAGE AND METHOD FOR FORMING THE SAME - A light emitting diode package is provided, which includes a semiconductor substrate having a first surface and a second surface; at least a through-hole passing through the semiconductor substrate; a thermal via formed extending from the second surface toward the first surface of the semiconductor substrate, wherein the thermal via has a first end near the first surface and a second end near the second surface; an insulating layer overlying a sidewall of the through-hole and extending overlying the first surface and the second surface of the semiconductor substrate, wherein the insulating layer further covers at least one of the first end, the second end and a sidewall of the thermal via; a conducting layer overlying the insulating layer in the through-hole and extending to the first surface and the second surface of the semiconductor substrate; and an LED chip disposed overlying the semiconductor substrate. | 07-14-2011 |
20110198646 | HIGH-REFLECTION SUBMOUNT FOR LIGHT-EMITTING DIODE PACKAGE AND FABRICATION METHOD THEREOF - A method for fabricating a silicon submount for LED packaging. A silicon substrate is provided. A reflection layer is formed on the silicon substrate. Portions of the reflection layer and the silicon substrate are removed to form openings. A wafer backside grinding process is carried out to thin the silicon substrate thereby turning the openings into through silicon vias. An insulating layer is then deposited to cover the reflection layer and the silicon substrate. A seed layer is formed on the insulating layer. A resist pattern is then formed on the seed layer. A metal layer is formed on the seed layer not covered by the resist pattern. The resist pattern is then stripped. The seed layer not covered by the metal layer is then removed. | 08-18-2011 |
20110284887 | LIGHT EMITTING CHIP PACKAGE AND METHOD FOR FORMING THE SAME - According to an embodiment of the invention, a light emitting chip package is provided, which includes a carrier substrate having a first surface and an opposite second surface, a cavity extending from the first surface toward the second surface, at least a electrical conductive via and at least a thermal conductive via, located outside of the cavity and penetrating through the first surface and the second surface of the carrier substrate, a light emitting element having contact electrodes and disposed in the cavity, wherein the contact electrode are electrically connected to the electrical conductive via and are electrically insulated from the thermal conductive via. | 11-24-2011 |
20110303936 | LIGHT EMITTING DEVICE PACKAGE STRUCTURE AND FABRICATING METHOD THEREOF - A light emitting device package structure is described. The light emitting device package structure includes a carrier substrate with a top surface and a bottom surface, having at least two through holes. A dielectric mirror structure is formed on the top surface of the carrier substrate, wherein the dielectric mirror structure includes laminating at least five dielectric layer groups, wherein each of the dielectric layer group includes an upper first dielectric layer having a first reflective index and an lower second dielectric layer having a second reflective index smaller than the first reflective index. A first conductive trace and a second conductive trace isolated from each other are formed on the dielectric mirror structure, respectively extending from the top surface to the bottom surface of the carrier substrate along sides of the different through holes. A light emitting device chip is mounted on the top surface of the carrier substrate. | 12-15-2011 |
20140017828 | HIGH-REFLECTION SUBMOUNT FOR LIGHT-EMITTING DIODE PACKAGE AND FABRICATION METHOD THEREOF - A method for fabricating a silicon submount for LED packaging. A silicon substrate is provided. A reflection layer is formed on the silicon substrate. Portions of the reflection layer and the silicon substrate are removed to form openings. A wafer backside grinding process is carried out to thin the silicon substrate thereby turning the openings into through silicon vias. An insulating layer is then deposited to cover the reflection layer and the silicon substrate. A seed layer is formed on the insulating layer. A resist pattern is then formed on the seed layer. A metal layer is formed on the seed layer not covered by the resist pattern. The resist pattern is then stripped. The seed layer not covered by the metal layer is then removed. | 01-16-2014 |
20140151730 | LED Packaging Construction and Manufacturing Method Thereof - LED packaging construction includes a substrate, a cavernous construction, a LED, and a reflection layer. The substrate is daubed with an insulation layer and a circuit layer on a surface on the substrate, wherein the substrate is made of metal, and the insulation layer is disposed between the circuit layer and the substrate. The cavernous construction is disposed on the substrate and surrounds the LED, and is formed by disposing a photoresist layer and patterning the photoresist layer. The circuit layer electrically connects the LED through a conducting wire. The reflection layer is at least disposed on a first surface of the cavernous construction, wherein the first surface surrounds the LED and faces toward the LED, and a part of light emitted from the LED is reflected by the reflection layer. | 06-05-2014 |
20140151741 | Semiconductor Construction, Semiconductor Unit, and Manufacturing Method Thereof - A semiconductor structure and its manufacturing method including multiple steps are provided. First, a patterned circuit board having a substrate and a patterned circuit layer is provided. The substrate includes a first surface, a second surface, at least one connecting channel, and at least one conductive through hole, wherein patterned circuit layer is disposed on the first surface, a second surface, and the inside wall of the conductive through hole. Then, the patterned circuit board is disposed on a carrier, and the patterned circuit layer disposed on one of the first surface and the second surface is touched with the carrier. Then, a filling process is applied. A filling material flows to the conductive through hole via the first surface or the second surface from the connecting channel. Then, a package material is provided to produce a semiconductor structure. | 06-05-2014 |
20140191274 | Substrate, Semiconductor Construction, and Manufacturing Method Thereof - A substrate includes a die-bonding zone and a glue spreading pattern. The die-bonding zone is set to bond a die. The glue spreading pattern is placed in the die-bonding zone and includes a containing space. The die is placed on the glue spreading pattern, an area of a bottom of the die is greater than an area of an opening of the glue spreading pattern, the containing room of the glue spreading pattern is filled with a glue, and the die is bonded to the substrate by means of the glue. | 07-10-2014 |
20140247585 | SEMICONDUCTOR LIGHTING APPARATUS - A semiconductor lighting apparatus includes an illumination module and a power module. The illumination module includes a supporting member, a semiconductor light-emitting element, an electrode structure and a first connecting member. The semiconductor light-emitting element is mounted on the supporting member and electrically connected with the electrode structure. The first connecting member is mounted on a first side of the supporting member. The power module is configured to connect to the first side of the supporting member, and includes a second connecting member and a driving circuit member. The second connecting member is detachably connected with the first connecting member. The driving circuit member is electrically connected with the second connecting member and electrically connected with the electrode structure to provide a driving power to the semiconductor light-emitting element. | 09-04-2014 |
20150060911 | OPTOELECTRONIC SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF - An optoelectronic semiconductor device comprises a substrate, at least one solid via plug, at least one optoelectronic semiconductor chip, a phosphor layer and a molding body. The at least one solid via plug penetrates through the substrate. The at least one optoelectronic semiconductor chip has a first electrode aligned to and electrically connected with the solid via plug. The phosphor layer covers at least one surface of the optoelectronic semiconductor chip. The molding body encapsulates the substrate, the optoelectronic semiconductor chip and the phosphor layer. The number of solid valid plugs, substrate surfaces, electrodes, bonding pad on each surface of the substrate for forming each optoelectronic semiconductor device can be, for example, two, respectively. | 03-05-2015 |