Patent application number | Description | Published |
20130083386 | Optical Imaging System and Method, and Aperture Stop Assembly and Aperture Element - An optical imaging system includes a birefringent element, a light modulating element, and a polarizer element. The birefringent element is configured for decomposing un-polarized light into first linear polarized light and second linear polarized light under different refractive indexes to respectively form a first focal length and a second focal length in the optical imaging system. The light modulating element is configured for modulating a state of polarization of the first and second linear polarized light in response to control signals. The polarizer element is configured for filtering out one of the modulated first and second linear polarized light for creating a single image. | 04-04-2013 |
20130194567 | SYSTEM AND METHOD FOR WIND TURBINE BLADE INSPECTION - A system for inspection of a blade of a wind turbine in operation is provided. The system comprises a light projection unit, an imaging unit and a processing unit. The light projection unit generates and projects a light pattern towards a blade of a wind turbine in operation. The imaging unit captures a plurality of scanning light patterns on the blade of the wind turbine during rotation of the blade. The processing unit is configured to process the plurality of the captured d light patterns from the imaging unit for inspection of deflection of the blade. A method for inspection of a blade of a wind turbine in operation is also presented. | 08-01-2013 |
20140278211 | Methods and Systems for Enhanced Tip-Tracking and Navigation of Visual Inspection Devices - A computer-implemented system for enhanced tip-tracking and navigation of visual inspection devices includes a visual inspection device. The system further includes a plurality of spatially sensitive fibers. The system includes a computing device. The computing device includes a memory device and a processor. The system includes a storage device. The storage device includes an engineering model representing the physical asset. The computing device is configured receive an insertion location from the visual inspection device. The computing device is configured to receive fiber information associated with the visual inspection device. The computing device is configured to determine the real-time location of the visual inspection device using the fiber information. The computing device is configured to identify the real-time location of the visual inspection device with respect to the engineering model. The computing device is configured to navigate the visual inspection device from a first location to a second location. | 09-18-2014 |
20150319410 | BORESCOPE AND NAVIGATION METHOD THEREOF - The borescope includes an insertion tube, a first image processor, a model store unit, a pose calculator, a second image processor, a navigation image calculator and a display. The insertion tube includes a detection head and at least one sensor for receiving signals in the insertion tube and generating sensed signals. The first image processor is for calculating a first image based on first image signals captured by the detection head. The second image processor is for adjusting the initial pose calculated by the pose calculator to a navigation pose until a difference between the first image and a second image calculated based on the navigation pose and a predetermined model falls in an allowable range. The navigation image calculator is for calculating a navigation image based on the navigation pose and the predetermined model. The display is for showing the navigation image. | 11-05-2015 |
20160059416 | SYSTEMS AND METHODS FOR RAILYARD ROBOTICS - A robot in one embodiment includes a navigation system, a manipulation unit, a visual recognition unit, and a processing unit. The visual recognition unit includes at least one detector configured to acquire presence information of humans within at least a portion of the area. The processing unit is operably coupled to the navigation system, manipulation unit, and visual recognition unit, and is configured to determine a presence of a human within at least one predetermined range of the robot using the presence information from the visual recognition unit, determine at least one control action responsive to determining the presence of the human within the at least one predetermined range, and control at least one of the navigation system or manipulation unit to implement the at least one control action. | 03-03-2016 |
20160093054 | SYSTEM AND METHOD FOR COMPONENT DETECTION - A method and system that include an imaging device configured to capture image data of the vehicle. The vehicle includes one or more components of interest. The method and system include a memory device configured to store an image detection algorithm based on one or more image templates corresponding to the one or more components of interest. The method and system also includes an image processing unit operably coupled to the imaging device in the memory device. The image processing unit is configured to determine one or more shapes of interest of the image data using the image detection algorithm that correspond to the one or more components of interest, and determine one or more locations of the one or more shapes of interest respective to the vehicle. | 03-31-2016 |
Patent application number | Description | Published |
20080271866 | Paper substrate containing a functional layer and methods of making and using the same - The invention relates to the papermaking art and, in particular, to the manufacture of paper or paperboard substrates, paper-containing articles such as multilayered paper or paperboard or corrugated-based packaging, having a functional layer, as well as methods of making and using the same. | 11-06-2008 |
20090020247 | Paper with improved stiffness and bulk and method for making same - The invention provides a three layered reprographic paper having improved strength, stiffness and curl resistance properties, and a method for making same. The paper has a central core layer made largely of cellulose and bulked with a bulking agent such as a diamide salt. A starch-based metered size press coating is pressed on both sides of the core layer, wherein the starch has a high solid content. The coating forms a three layered paper having an I-beam arrangement with high strength outer layers surrounding a low density core. | 01-22-2009 |
20090297738 | Fast Dry Coated Inkjet Paper - Disclosed are a coating composition, coated article, and a method for treating one or more sides of the printable web with the composition, for providing improved printing ink dry time and gloss. The coating composition comprises: a calcium carbonate pigment component comprising a mixture high and low surface area calcium carbonate pigment; a metal salt drying agent; and a cationic dye fixing agent; a pigment binder; optionally a plastic pigment; and optionally an optical brightener; and which provides: a solids content of at least about 25%; a ratio of high to low surface area calcium carbonate in the range of from about 0.5:1 to about 20:1; and a ratio of calcium carbonate pigment component to pigment binder in the range of from about 4:1 to about 50:1. | 12-03-2009 |
20100080916 | Composition Suitable for Multifunctional Printing and Recording Sheet Containing Same - A paper sizing or coating composition is provided, which includes: a first binder resin, which is compatible with dry toner binder resin; a second binder resin, which is compatible with liquid toner binder resin, and which is different from the first binder resin; a first pigment, which has a BET surface area of from greater than zero to about 35 m | 04-01-2010 |
20110011547 | PAPER SUBSTRATE HAVING ENHANCED PRINT DENSITY - The present invention relates to a sizing composition that, when applied to paper substrate, creates a substrate, preferably suitable for inkjet printing, having increased print density, print sharpness, low HST, and/or image dry time, the substrate preferably having high brightness and reduced color-to-color bleed as well. In addition, the present invention relates to a method of reducing the HST of a paper substrate by applying the sizing composition to at least one surface thereof. Further, the application relates to methods of making and using the sizing composition, as well as methods of making and using the paper containing the sizing composition. | 01-20-2011 |
20110069106 | GLOSS COATED MULTIFUNCTIONAL PRINTING PAPER - The invention relates to a gloss coated multifunctional printing paper that can be used with a variety of office printing equipment including inkjet and electrophotographic and to processes of making and using the paper. a paper substrate; and a pigmented composition coated on at least one surface of the substrate, said pigmented coating composition comprising (1) a first pigment having a BET surface area in the range of from about 50 to about 750 m | 03-24-2011 |
20130040159 | PAPER SUBSTRATE HAVING ENHANCED PRINT DENSITY - The present invention relates to a sizing composition that, when applied to paper substrate, creates a substrate, preferably suitable for inkjet printing, having increased print density, print sharpness, low HST, and/or image dry time, the substrate preferably having high brightness and reduced color-to-color bleed as well. In addition, the present invention relates to a method of reducing the HST of a paper substrate by applying the sizing composition to at least one surface thereof. Further, the application relates to methods of making and using the sizing composition, as well as methods of making and using the paper containing the sizing composition. | 02-14-2013 |
20130164515 | PAPER SIZING COMPOSITION, SIZED PAPER, AND METHOD FOR SIZING PAPER - Embodiments of the present invention provide a paper surface sizing composition, a paper web coated on one or more sides or surfaces with a paper surface sizing composition, and a method for treating one or more sides of the paper web with a paper surface sizing composition to impart benefits relating to one or more of the following properties: (1) brightness; (2) opacity; (3) paper smoothness; (4) print quality; (5) optionally ink dry time (e.g., for ink jet printing where the sizing composition has option); and (6) optionally minimizing or eliminating edge welding (e.g., for paper webs used in, for example, form printing). | 06-27-2013 |
20130216822 | GLOSS COATED MULTIFUNCTIONAL PRINTING PAPER - The invention relates to a gloss coated multifunctional printing paper that can be used with a variety of office printing equipment including inkjet and electrophotographic and to processes of making and using the paper, a paper substrate; and a pigmented composition coated on at least one surface of the substrate, said pigmented coating composition comprising (1) a first pigment having a BET surface area in the range of from about 50 to about 750 m | 08-22-2013 |
20130255897 | PAPER WITH IMPROVED STIFFNESS AND BULK AND METHOD FOR MAKING SAME - The invention provides a three layered reprographic paper having improved strength, stiffness and curl resistance properties, and a method for making same. The paper has a central core layer made largely of cellulose and bulked with a bulking agent such as a diamide salt. A starch-based metered size press coating is pressed on both sides of the core layer, wherein the starch has a high solid content. The coating forms a three layered paper having an I-beam arrangement with high strength outer layers surrounding a low density core. | 10-03-2013 |
20140335333 | PAPER WITH IMPROVED STIFFNESS AND BULK AND METHOD FOR MAKING SAME - The invention provides a three layered reprographic paper having improved strength, stiffness and curl resistance properties, and a method for making same. The paper has a central core layer made largely of cellulose and bulked with a bulking agent such as a diamide salt. A starch-based metered size press coating is pressed on both sides of the core layer, wherein the starch has a high solid content. The coating forms a three layered paper having an I-beam arrangement with high strength outer layers surrounding a low density core. | 11-13-2014 |
20150050434 | PAPER SUBSTRATE HAVING ENHANCED PRINT DENSITY - The present invention relates to a sizing composition that, when applied to paper substrate, creates a substrate, preferably suitable for inkjet printing, having increased print density, print sharpness, low HST, and/or image dry time, the substrate preferably having high brightness and reduced color-to-color bleed as well. In addition, the present invention relates to a method of reducing the HST of a paper substrate by applying the sizing composition to at least one surface thereof. Further, the application relates to methods of making and using the sizing composition, as well as methods of making and using the paper containing the sizing composition. | 02-19-2015 |
Patent application number | Description | Published |
20110195259 | Metallizable and Metallized Polyolefin Films and a Process of Making Same - Films that include at least one metallizable layer, wherein the metallizable layer includes a polyolefin and at least one organosilicon compound, such as silane, polysilane, side group modified polysilane, graft or block copolymer of silane, polycarbosilane, particularly organosilicon compounds having a silicon:(oxygen+nitrogen) molar ratio of 0.3 to 3.5 are described. Metallized films having good barrier properties and metal adhesion as well as methods for making such films are described. | 08-11-2011 |
20120100383 | Metallized Polypropylene Film and a Process of Making the Same - This disclosure relates to a multilayer film and a process making such a film. The multilayer film of this disclosure includes (a) a metallizable skin layer having at least one of a grafted isotactic polypropylene, a grafted minirandom copolymer of isotactic polypropylene, a grafted propylene-based elastomer, or any combinations thereof; and (b) a metal layer deposited on the metallizable skin layer, wherein the isotacticity of said isotactic polypropylene is 85% or greater; the ethylene concentration of said minirandom copolymer is 1.0 wt. % or lower; the propylene concentration of said propylene-based elastomer is 89 wt. % or greater; and, wherein the graft monomer includes at least one of ethylenically unsaturated carboxylic acids, ethylenically unsaturated carboxylic acid derivatives and any combination thereof. | 04-26-2012 |
20120114958 | FILM WITH A METAL RECEIVING LAYER HAVING HIGH METAL ADHESION AND METHOD OF MAKING SAME - This disclosure relates to a film including a metal receiving layer having at least 15 wt. % of oriented lamellar crystals of a polymer, wherein the oriented lamellar crystals of the polymer have an average thickness in a range from about 1.0 nm to 25 nm as measured by transmission electron microscopy (TEM). | 05-10-2012 |
20120157598 | Polymeric Films and Method of Making Same - Provided are polymeric films that include a polyolefin and at least one cavitating agent including a poly(alkylene terephthalate) of formula (I); | 06-21-2012 |
20120263960 | Film Composition and Method of Making the Same - This disclosure relates to a film comprising a metal receiving layer, the first layer comprising a blend of a first polymer and 5-25 wt. % of a second polymer, the second polymer is a metallocene-catalyzed elastomeric ethylene-propylene copolymer having an ethylene content of less than or equal to 10 wt. %, the first polymer is different from the second polymer. | 10-18-2012 |
20150252185 | FOAM, COMPOSITION, AND METHOD - A method of producing a foam is disclosed. The method includes providing an epoxy-containing compound, a cationic catalyst, an optional blowing agent, and at least one additive. The method further includes combining the epoxy-containing compound with the cationic catalyst, the optional blowing agent, and the at least one additive, wherein the epoxy-containing compound and the cationic catalyst react to polymerize the epoxy-containing compound to provide the foam having a density from about 0.3 lbs/ft | 09-10-2015 |
Patent application number | Description | Published |
20130105894 | THRESHOLD VOLTAGE ADJUSTMENT FOR THIN BODY MOSFETS | 05-02-2013 |
20130105896 | Threshold Voltage Adjustment For Thin Body Mosfets | 05-02-2013 |
20130175632 | REDUCTION OF CONTACT RESISTANCE AND JUNCTION LEAKAGE - A time clock clearly identifies where a user should position a time card therein. The clock and a printer platen are fixed relative to a base, and has the time card rests thereon. A printing mechanism moves relative to the base and has a target area, it is traversable between a print position and an idle position, and it impresses the time indicia onto the time card while in the print position. A ribbon shield is fixed relative to the base. A focused illuminated guide is fixed relative to the base, and in combination with the ribbon shield, guides the time card with respect to the printing mechanism to clearly identify where the user should position the time card in the time clock. | 07-11-2013 |
20130207194 | TRANSISTORS WITH UNIAXIAL STRESS CHANNELS - A method for fabricating a transistor with uniaxial stress channels includes depositing an insulating layer onto a substrate, defining bars within the insulating layer, recessing a channel into the substrate, growing a first semiconducting material in the channel, defining a gate stack over the bars and semiconducting material, defining source and drain recesses and embedding a second semiconducting material into the source and drain recesses. | 08-15-2013 |
20130264653 | STRUCTURE AND METHOD OF HIGH-PERFORMANCE EXTREMELY THIN SILICON ON INSULATOR COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR TRANSISTORS WITH DUAL STRESS BURIED INSULATORS - A method of forming a complementary metal oxide semiconductor (CMOS) device including an n-type field effect transistor (NFET) and an p-type field effect transistor (PFET) having fully silicided gates electrode in which an improved dual stress buried insulator is employed to incorporate and advantageous mechanical stress into the device channel of the NFET and PFET. The method can be imposed on a bulk substrate or extremely thin silicon on insulator (ETSOI) substrate. The device includes a semiconductor substrate, a plurality of shallow trench isolations structures formed in the ETSOI layer, NFET having a source and drain region and a gate formation, a PFET having a source and drain region, and a gate formation, an insulator layer, including a stressed oxide or nitride, deposited inside the substrate of the NFET, and a second insulator layer, including either an stressed oxide or nitride, deposited inside the substrate of the PFET. | 10-10-2013 |
20130328135 | PREVENTING FULLY SILICIDED FORMATION IN HIGH-K METAL GATE PROCESSING - A gate stack structure for a transistor device includes a gate dielectric layer formed over a substrate; a first silicon gate layer formed over the gate dielectric layer; a dopant-rich monolayer formed over the first silicon gate layer; and a second silicon gate layer formed over the dopant-rich monolayer, wherein the dopant-rich monolayer prevents silicidation of the first silicon gate layer during silicidation of the second silicon gate layer. | 12-12-2013 |
20130330899 | PREVENTING FULLY SILICIDED FORMATION IN HIGH-K METAL GATE PROCESSING - A method of forming gate stack structure for a transistor device includes forming a gate dielectric layer over a substrate; forming a first silicon gate layer over the gate dielectric layer; forming a dopant-rich monolayer over the first silicon gate layer; and forming a second silicon gate layer over the dopant-rich monolayer, wherein the dopant-rich monolayer prevents silicidation of the first silicon gate layer during silicidation of the second silicon gate layer. | 12-12-2013 |
20140124861 | TRANSISTORS WITH UNIAXIAL STRESS CHANNELS - A method for fabricating a transistor with uniaxial stress channels includes depositing an insulating layer onto a substrate, defining bars within the insulating layer, recessing a channel into the substrate, growing a first semiconducting material in the channel, defining a gate stack over the bars and semiconducting material, defining source and drain recesses and embedding a second semiconducting material into the source and drain recesses. | 05-08-2014 |
20150102453 | Fabricating Shallow-Trench Isolation Semiconductor Devices To Reduce Or Eliminate Oxygen Diffusion - A method is disclosed for forming a semiconductor device. A first opening is formed for an STI on a semiconductor substrate and a first process is performed to deposit first oxide into the first opening. A second opening is formed to remove a portion of the first oxide from the first opening and second process(es) is/are performed to deposit second oxide into the second opening and over a remaining portion of the first oxide. A portion of the semiconductor device is formed over a portion of a surface of the second oxide. A semiconductor device includes an STI including a first oxide formed in a lower portion of a trench of the STI and a second oxide formed in an upper portion of the trench and above the first oxide. The semiconductor device includes a portion of the semiconductor device formed over a portion of the second oxide. | 04-16-2015 |
20150194334 | Fabricating Shallow-Trench Isolation Semiconductor Devices To Reduce Or Eliminate Oxygen Diffusion - A method is disclosed for forming a semiconductor device. A first opening is formed for an STI on a semiconductor substrate and a first process is performed to deposit first oxide into the first opening. A second opening is formed to remove a portion of the first oxide from the first opening and second process(es) is/are performed to deposit second oxide into the second opening and over a remaining portion of the first oxide. A portion of the semiconductor device is formed over a portion of a surface of the second oxide. A semiconductor device includes an STI including a first oxide formed in a lower portion of a trench of the STI and a second oxide formed in an upper portion of the trench and above the first oxide. The semiconductor device includes a portion of the semiconductor device formed over a portion of the second oxide. | 07-09-2015 |
20150194484 | Fabricating Shallow-Trench Isolation Semiconductor Devices To Reduce Or Eliminate Oxygen Diffusion - A method is disclosed for forming a semiconductor device. A first opening is formed for an STI on a semiconductor substrate and a first process is performed to deposit first oxide into the first opening. A second opening is formed to remove a portion of the first oxide from the first opening and second process(es) is/are performed to deposit second oxide into the second opening and over a remaining portion of the first oxide. A portion of the semiconductor device is formed over a portion of a surface of the second oxide. A semiconductor device includes an STI including a first oxide formed in a lower portion of a trench of the STI and a second oxide formed in an upper portion of the trench and above the first oxide. The semiconductor device includes a portion of the semiconductor device formed over a portion of the second oxide. | 07-09-2015 |
Patent application number | Description | Published |
20100296634 | Systems, Methods, and Media for Connecting Emergency Communications - Systems, methods, and media for connecting emergency communications are provided. For example, the methods can include: receiving an emergency communication at a particular public safety answering point from a caller directed to the particular public safety answering point by a location-to-service system; creating a conference on a conference system in response to the particular public safety answering point accepting the emergency communication; selecting a particular call-taker of a plurality of call-takers; sending the particular call-taker an invitation to accept the emergency communication; in response to receiving an indication that the particular call-taker has accepted the emergency communication, connecting the selected call-taker to the conference; connecting the caller to the conference; determining the location of the caller; querying the location-to-service system to identify at least one particular emergency responder of a plurality of emergency responders; and connecting at least one of the at least one particular emergency responder to the conference. | 11-25-2010 |
20110064205 | EMERGENCY TEXT COMMUNICATIONS - A system includes one or more devices connected to or within one of a group of emergency services networks. The one or more devices may generate a text message that includes information identifying a user device, information identifying a geographic location of the user device, and information identifying a particular emergency services network of the group of emergency services networks; establish, based on the text message, a text-based communication session between the user device and a call taker device within the particular emergency services network; store session information regarding the text-based communication session; receive a subsequent text message; and transmit the subsequent text message to the call taker device based on the session information. | 03-17-2011 |
20130188783 | EMERGENCY TEXT COMMUNICATIONS - A system includes one or more devices connected to or within one of a group of emergency services networks. The one or more devices may generate a text message that includes information identifying a user device, information identifying a geographic location of the user device, and information identifying a particular emergency services network of the group of emergency services networks; establish, based on the text message, a text-based communication session between the user device and a call taker device within the particular emergency services network; store session information regarding the text-based communication session; receive a subsequent text message; and transmit the subsequent text message to the call taker device based on the session information. | 07-25-2013 |
20140023064 | SYSTEMS, METHODS, AND MEDIA FOR CONNECTING EMERGENCY COMMUNICATIONS - Systems, methods, and media for connecting emergency communications are provided. For example, the methods can include: receiving an emergency communication at a particular public safety answering point from a caller directed to the particular public safety answering point by a location-to-service system; creating a conference on a conference system in response to the particular public safety answering point accepting the emergency communication; selecting a particular call-taker of a plurality of call-takers; sending the particular call-taker an invitation to accept the emergency communication; in response to receiving an indication that the particular call-taker has accepted the emergency communication, connecting the selected call-taker to the conference; connecting the caller to the conference; determining the location of the caller; querying the location-to-service system to identify at least one particular emergency responder of a plurality of emergency responders; and connecting at least one of the at least one particular emergency responder to the conference. | 01-23-2014 |
Patent application number | Description | Published |
20090105854 | METHOD OF OPTIMIZING QUEUE TIMES IN A PRODUCTION CYCLE - A method of optimizing production cycle queue time includes selecting a plurality of process steps for a production cycle, calculating queue times for each of the plurality of process steps, statistically analyzing the queue times, and generating at least one visual output that illustrates the statistically analyzed queue times. | 04-23-2009 |
20100201376 | DETECTING ASYMMETRICAL TRANSISTOR LEAKAGE DEFECTS - A method of detecting low-probability defects in large transistor arrays (such as large arrays of SRAM cells), where the defects manifesting themselves as asymmetrical leakage in a transistor (such as a pulldown nFET in an SRAM cell). These defects are detected by creating one or more test arrays, identical in all regards to the large transistor arrays up until the contact and metallization layers. The test array(s) is (are) disposed side-by-side with the “normal” array(s) on the same reticle so that process variations that affect the normal array will also affect the test array. The contact and metallization layers for the test array are adapted to connect groups (sub-blocks) of transistors together in parallel for leakage testing. The group size is chosen to ensure that the leakage current associated with a single defective transistor is significantly greater than the aggregate leakage current associated with all of non-defective transistors in the group. Leakage is measured by applying an appropriate off-state voltage (e.g., 0V) by a common connection to all of the gates of the transistors in the test array, then measuring the aggregate drain/source leakage current, both forward and reverse (e.g., first grounded source and positively biased drain, then grounded drain and positively biased source) comparing the difference between the two leakage current measurements. The sub-blocks (groups) may be tested one at a time using a sub-block selection decoder to select the sub-block being tested. | 08-12-2010 |
20110077765 | TOOL COMMONALITY AND STRATIFICATION ANALYSIS TO ENHANCE A PRODUCTION PROCESS - A method of analyzing production steps includes inputting application data associated with a production process having a plurality of process steps into a memory with each of the plurality of process steps including a plurality of tools. The method also includes loading process data associated with one of the plurality of process steps into the memory, performing a tool commonality analysis on each of the tools associated with the at least one of the plurality of process steps, identifying all tool-to-tool differences for the at least one of the plurality of process steps, performing a tool stratification analysis to identify one of the plurality of tools that provides the largest variance contribution to the at least one of the plurality of process steps, and stopping the one of the plurality of tools that provides the largest variance contribution to the at least one of the plurality of process steps. | 03-31-2011 |
20110080189 | YIELD ENHANCEMENT FOR STACKED CHIPS THROUGH ROTATIONALLY-CONNECTING-INTERPOSER - A set of first substrate and second substrate are manufactured with a built-in N-fold rotational symmetry around the center axis of each substrate, wherein N is an integer greater than 1. A set of N different interposers is provided such that an i-th interposer provides electrical connection between the first substrate and the second substrate with a rotational angle of (i−1)/N×2π. The first and second substrates are tested with each of the N different interposers therebetween. Once the rotational angle that provides the highest stacked chip yield is determined, the first and the second substrates can be bonded with an azimuthal rotation that provides the highest stacked chip yield. | 04-07-2011 |
20110099529 | GEOMETRY BASED ELECTRICAL HOTSPOT DETECTION IN INTEGRATED CIRCUIT LAYOUTS - A method of failure detection of an integrated circuit (IC) layout includes determining a critical path distance between a first geometric feature of the IC layout and a second geometric feature of the IC layout; and comparing the determined critical path distance to a defined minimum critical path distance between the first and second geometric features, wherein the defined minimum critical path distance corresponds to a desired electrical property of the IC layout, independent of any geometric-based ground rule minimum distance for the IC layout; identifying any determined critical path distances that are less than the defined minimum critical path distance as a design violation; and modifying the IC layout by eliminating the identified design violations. | 04-28-2011 |
20110115082 | CONFIGURABLE INTERPOSER - A modularized interposer includes a plurality of interposer units that are assembled to provide a complete set of electrical connections between two semiconductor chips. At least some of the plurality of interposer units can be replaced with other interposer units having an alternate configuration to enable selection of different functional parts of semiconductor chips to be connected through the modularized interposer. Bonding structures, connected to conductive metal pads located at peripheries of neighboring interposer units and an overlying or underlying portion of a semiconductor chip, can provide electrical connections between the neighboring interposer units. The interposer units can be provided by forming through-substrate vias (TSV's) in a substrate, forming patterned conductive structures on the substrate, and cutting the substrate into interposers. | 05-19-2011 |
20120232686 | WAFER ALIGNMENT SYSTEM WITH OPTICAL COHERENCE TOMOGRAPHY - A system for performing alignment of two wafers is disclosed. The system comprises an optical coherence tomography system and a wafer alignment system. The wafer alignment system is configured and disposed to control the relative position of a first wafer and a second wafer. The optical coherence tomography system is configured and disposed to compute coordinate data for a plurality of alignment marks on the first wafer and second wafer, and send that coordinate data to the wafer alignment system | 09-13-2012 |
20130016895 | METHOD AND SYSTEM FOR DEFECT-BITMAP-FAIL PATTERNS MATCHING ANALYSIS INCLUDING PERIPHERAL DEFECTSAANM Song; ZhigangAACI Hopewell JunctionAAST NYAACO USAAGP Song; Zhigang Hopewell Junction NY USAANM Ouyang; XuAACI Hopewell JunctionAAST NYAACO USAAGP Ouyang; Xu Hopewell Junction NY USAANM Song; YunshengAACI Hopewell JunctionAAST NYAACO USAAGP Song; Yunsheng Hopewell Junction NY US - A system and method for fail pattern analysis for a memory device is disclosed. The peripheral circuits of a memory device are divided into different zones based on circuit design and layout. Defects are detected by inline inspection of multiple SRAM devices at various stages in the manufacturing process and saved into a database. When the devices are fabricated, electrical tests are then performed. Electrical failure patterns are also recorded and saved in the database. A correlation between the zone in which a visual defect resides and an electrical failure is recorded in computer storage. Visual defects found during inline inspection are then associated with an electrical failure in the memory device. | 01-17-2013 |
Patent application number | Description | Published |
20090000475 | Zeolite membrane structures and methods of making zeolite membrane structures - Inorganic membrane structures of high stability, high permeability, and large surface area. Zeolite membranes can be disposed onto an intermediate pore size modification layer which reduces the pore size of the inorganic porous support. The intermediate pore size modification layer minimizes the defects in the zeolite membrane and provides a more continuous and uniform zeolite membrane. The inorganic membrane structure can be in the form of a honeycomb monolith. The applications for the zeolite membranes include, for example, membrane ultra-filtration of gas or liquid fluids, biological assays and cell culture surfaces. | 01-01-2009 |
20090214770 | Conductive film formation during glass draw - Methods for coating a glass substrate as it is being drawn, for example, during fusion draw or during fiber draw are described. The coatings are conductive metal oxide coatings which can also be transparent. The conductive thin film coated glass substrates can be used in, for example, display devices, solar cell applications and in many other rapidly growing industries and applications. | 08-27-2009 |
20100129533 | Conductive Film Formation On Glass - Methods for coating a glass substrate are described. The coatings are conductive metal oxide coatings which can also be transparent. The conductive thin film coated glass substrates can be used in, for example, display devices, solar cell applications and in many other rapidly growing industries and applications. | 05-27-2010 |
20100251888 | Oxygen-Ion Conducting Membrane Structure - An oxygen-ion conducting membrane structure comprising a monolithic inorganic porous support, optionally one or more porous inorganic intermediate layers, and an oxygen-ion conducting ceramic membrane. The oxygen-ion conducting hybrid membrane is useful for gas separation applications, for example O | 10-07-2010 |
20110050091 | NANO-WHISKER GROWTH AND FILMS - Methods for making tin oxide films comprising nano-whiskers comprises providing a solution comprising a tin precursor and a solvent; preparing aerosol droplets of the solution; and applying the aerosol droplets to a heated glass substrate, converting the tin chloride to tin oxide to form a tin oxide film on the glass substrate, wherein the tin oxide film comprises nano-whiskers. | 03-03-2011 |
20110094577 | CONDUCTIVE METAL OXIDE FILMS AND PHOTOVOLTAIC DEVICES - Article comprising a substrate; and a conductive metal oxide film adjacent to a surface of the substrate, wherein the conductive metal oxide film has an electron mobility (cm | 04-28-2011 |
20110114169 | DYE SENSITIZED SOLAR CELLS AND METHODS OF MAKING - Dye sensitized solar cells having conductive metal oxide layers with nano-whiskers and methods of making the dye sensitized solar cells having conductive metal oxide layers with nano-whiskers are described. The method for making a dye sensitized solar cell comprises providing a conductive metal oxide layer comprising nano-whiskers, applying a porous semi-conducting layer on the conductive metal oxide layer, applying a dye to at least a portion of the porous semi-conducting layer, and applying an electrolyte adjacent to at least a portion of the dye. | 05-19-2011 |
20120132584 | Inorganic membranes and method of making - An inorganic membrane having an improved pore structure. The membrane has a mean pore size of up to about 100 nm and a mean particle size in a range from about 10 nm to about 100 nm. In one embodiment, the membrane comprises α-alumina and is formed by providing a coating slip comprising δ-alumina; applying the coating slip to a support surface to form a coating layer; drying the coating layer; and firing the dried coating layer at a temperature of at least about 1000° C. to convert at least a portion of the δ-alumina to α-alumina and form the inorganic membrane. | 05-31-2012 |
20120134891 | Porous Ceramic Honeycomb Articles and Methods for Making The Same - A porous ceramic honeycomb article comprising a honeycomb body formed from cordierite ceramic, wherein the honeycomb body has a porosity P %≧55% and a cell channel density CD ≧150 cpsi. The porous channel walls have a wall thickness T, wherein (11+(300−CD)*0.03)≧T≧(8+(300−CD)*0.02), a median pore size ≦20 microns, and a pore size distribution with a d-factor of ≦0.35. The honeycomb body has a specific pore volume of VP≦0.22. The porous ceramic honeycomb article exhibits a coated pressure drop increase of ≦8 kPa at a flow rate of 26.5 cubic feet per minute when coated with 100 g/L of a washcoat catalyst and loaded with 5 g/L of soot. | 05-31-2012 |
20120216675 | Sorbent Articles for CO2 Capture - A sorbent article having a substrate having porous channel walls defining open channels, and an organic-inorganic hybrid sorbent material distributed on a surface of the porous channel walls, wherein the sorbent material is derived from an amino-functionalized alkoxysilane and a polyamine, wherein the sorbent material is present in an amount equal to or greater than 10 g/l, wherein at least some of the sorbent material resides in the porous channel walls and forms CO | 08-30-2012 |
20120272823 | Article for CO2 Capture Having Heat Exchange Capability - An article comprising a plurality of intersecting walls having outer surfaces that define a plurality of cells extending from one end to a second end, wherein the walls forming each cell in a first subset of cells are covered by a barrier layer to form a plurality of heat exchange flow channels, and wherein the walls forming each cell in a second subset of cells different from the first subset of cells, comprise a CO | 11-01-2012 |
20130137010 | REACTIVE SINTERING OF CERAMIC LITHIUM-ION SOLID ELECTROLYTES - A method of forming a solid, dense, hermetic lithium-ion electrolyte membrane comprises combing an amorphous, glassy, or low melting temperature solid reactant with a refractory oxide reactant to form a mixture, casting the mixture to form a green body, and sintering the green body to form a solid membrane. The resulting electrolyte membranes can be incorporated into lithium-ion batteries. | 05-30-2013 |
20140070441 | POROUS CERAMIC HONEYCOMB ARTICLES AND METHODS FOR MAKING THE SAME - A porous ceramic honeycomb article comprising a honeycomb body formed from cordierite ceramic, wherein the honeycomb body has a porosity P %≧55% and a cell channel density CD≧150 cpsi. The porous channel walls have a wall thickness T, wherein (11+(300−CD)*0.03)≧T≧(8+(300−CD)*0.02), a median pore size≦20 microns, and a pore size distribution with a d-factor of ≦0.35. The honeycomb body has a specific pore volume of VP≦0.22. The porous ceramic honeycomb article exhibits a coated pressure drop increase of ≦8 kPa at a flow rate of 26.5 cubic feet per minute when coated with 100 g/L of a washcoat catalyst and loaded with 5 g/L of soot. | 03-13-2014 |
20140084503 | FLAME SPRAY PYROLYSIS METHOD FOR FORMING NANOSCALE LITHIUM METAL PHOSPHATE POWDERS - A flame spray pyrolysis method for making nanoscale, lithium ion-conductive ceramic powders comprises providing a precursor solution comprising chemical precursors dissolved in an organic solvent, and spraying the precursor solution into an oxidizing flame to form a nanoscale, lithium ion-conductive ceramic powder, wherein a concentration of the chemical precursors in the solvent ranges from 1 to 20 M. The precursor solution can comprise 1-20% excess lithium with respect to a stoichiometric composition of the ceramic powder. Nominal compositions of the nanoscale, ceramic powders are Li | 03-27-2014 |
20140116250 | SORBENT ARTICLE FOR CO2 CAPTURE - A sorbent article having a substrate having porous channel walls defining open channels, and an organic-inorganic hybrid sorbent material distributed on a surface of the porous channel walls, wherein the sorbent material is derived from an amino-functionalized alkoxysilane and a polyamine, wherein the sorbent material is present in an amount equal to or greater than 10 g/l, wherein at least some of the sorbent material resides in the porous channel walls and forms CO | 05-01-2014 |
20140271394 | IMPERMEABLE POLYMER COATING ON SELECTED HONEYCOMB CHANNEL SURFACES - Absorbent structures for CO | 09-18-2014 |
20140357474 | FORMED CERAMIC SUBSTRATE COMPOSITION FOR CATALYST INTEGRATION - Disclosed herein are formed ceramic substrates comprising an oxide ceramic material, wherein the formed ceramic substrate comprises a low elemental alkali metal content, such as less than about 1000 ppm. Also disclosed are composite bodies comprising at least one catalyst and a formed ceramic substrate comprising an oxide ceramic material, wherein the composite body has a low elemental alkali metal content, such as less than about 1000 ppm, and methods for preparing the same. | 12-04-2014 |
20140357476 | FORMED CERAMIC SUBSTRATE COMPOSITION FOR CATALYST INTEGRATION - Disclosed herein are formed ceramic substrates comprising an oxide ceramic material, wherein the formed ceramic substrate comprises a low elemental alkali metal content, such as less than about 1000 ppm. Also disclosed are composite bodies comprising at least one catalyst and a formed ceramic substrate comprising an oxide ceramic material, wherein the composite body has a low elemental alkali metal content, such as less than about 1000 ppm, and methods for preparing the same. | 12-04-2014 |
20150110998 | GLASS-CERAMICS SUBSTRATES FOR GRAPHENE GROWTH - An insulating glass-ceramic substrate for synthesizing graphene includes discrete, crystalline, nanophase metallic regions capable of catalyzing graphene growth. The nanophase regions may be formed by thermal treatment of a glass-ceramic substrate containing the corresponding metal oxide. Single layer and double layer graphene are prepared on the modified glass-ceramic substrate in a vacuum chemical vapor deposition (CVD) process from hydrocarbon precursors. The graphene-coated glass-ceramic substrate is electrically conductive. | 04-23-2015 |
20150232343 | METAL-FREE CVD COATING OF GRAPHENE ON GLASS AND OTHER DIELECTRIC SUBSTRATES - A catalyst-free CVD method for forming graphene. The method involves placing a substrate within a reaction chamber, heating the substrate to a temperature between 600° C. and 1100° C., and introducing a carbon precursor into the chamber to form a graphene layer on a surface of the substrate. The method does not use plasma or a metal catalyst to form the graphene. | 08-20-2015 |
20160111751 | LITHIUM-ION CONDUCTIVE GARNET AND METHOD OF MAKING MEMBRANES THEREOF - A gallium doped garnet composition of the formula: | 04-21-2016 |