Patent application number | Description | Published |
20080204292 | Output Architecture for LCD Panel Column Driver - In one embodiment consistent with the present invention, a digital to analog converter (DAC) circuit operates over an upper range and a lower range. An upper voltage node is designated AVDD; a middle voltage node is designated HVDD; and a lower voltage node designated ground. An upper DAC stage has at least one NMOS transistors that produces an output to an upper range output node when the output is in the upper range. A lower DAC stage has at least one PMOS transistors that produces an output to a lower range output node when the output is in the lower range. A body bias control circuit couples the body of the upper NMOS transistor to a voltage source equal to HVDD−Vbe and connects the body of the lower PMOS transistor to voltage source equal to HVDD+Vbe. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract. | 08-28-2008 |
20100157493 | ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT - An integrated circuit includes an electrostatic discharge (ESD) detection circuit which detects an ESD event and generates an event signal. In response to that event signal, a control circuit controls the operation of a buffer circuit to function in an additional mode wherein the normal differential operation of the buffer circuit is disabled and the buffer circuit is instead configured to form a conduction path between supply rails to discharge the ESD event. Preferably, a plurality of buffer circuits are driven in parallel by the control circuit to function in the additional mode to form parallel discharge paths for the ESD event. Multiple ESD detection circuits may be provided, and any one of those detection circuits can trigger the control circuitry to place all of the buffer circuits in the additional mode. | 06-24-2010 |
20110242048 | CAPACITIVE SENSING ANALOG FRONT END - A capacitive sensing analog front end for a touchscreen system having an improved signal-to-noise ratio includes a capacitance-to-voltage converter having an input for coupling to an external sampling capacitor, a summer having a first input coupled to an output of the capacitance-to-voltage converter, a low pass filter having an input coupled to an output of the summer and an output for providing an output signal; and a sample-and-hold circuit having an input coupled to the output of the low pass filter and an output coupled to a second input of the summer. The signal-to-noise ratio of the touchscreen system is improved by extracting the DC shift of a touch signal during a monitoring period and then subtracting the DC shift before integrating the touch signal. | 10-06-2011 |
20120092201 | System and method for compact cyclic digital to analog converter - A system for implementing a cyclic digital to analog converter (c-DAC) is capable of supporting a large size liquid crystal display. The system includes an upper DAC stage configured to output a first voltage between a lower voltage supply (HVDD) and an upper voltage supply (AVDD). The system also includes a lower DAC stage configured to output a second voltage between the lower voltage supply (HVDD) and a ground. The upper DAC stage includes a single PMOS switch and the lower DAC stage includes a single NMOS switch. | 04-19-2012 |
20120112817 | METHOD AND APPARATUS FOR CAPACITANCE SENSING - A capacitance-to-digital converter for an extended range of capacitances includes a reference capacitor and one or more offset capacitors. Electrical charge accumulated in the offset capacitors is used to at least partially cancel the charge accumulated in a sensed capacitance to facilitate matching with a charge accumulated in the reference capacitor. The residual charge is passed to an integrator, the output from which is quantized and used to control switching of the capacitors. Immunity to tonal external noises and improved conversion speed are achieved by controlling the capacitor switching with a spread spectrum clock. The capacitance-to-digital converter may be used, for example, for sensing of the capacitances of capacitive elements in touch and proximity displays or other user interfaces. | 05-10-2012 |
20140312919 | CONFIGURABLE ANALOG FRONT-END FOR MUTUAL CAPACITANCE SENSING AND SELF CAPACITANCE SENSING - Capacitance sensing circuits and methods are provided. A dual mode capacitance sensing circuit includes a capacitance-to-voltage converter having an amplifier and an integration capacitance coupled between an output and an inverting input of the amplifier, and a switching circuit responsive to mutual mode control signals for a controlling signal supplied from a capacitive touch matrix to the capacitive to voltage converter in a mutual capacitance sensing mode and responsive to self mode control signals for controlling signals supplied from the capacitive touch matrix to the capacitance-to-voltage converter in a self capacitance sensing mode, wherein the capacitance sensing circuit is configurable for operation in the mutual capacitance sensing mode or the self capacitance sensing mode. | 10-23-2014 |
Patent application number | Description | Published |
20110234528 | SAMPLE AND HOLD CAPACITANCE TO DIGITAL CONVERTER - A circuit for converting charge measured from a touch screen into a digital signal can include a sample and hold circuit. The sample and hold circuit can sample and integrate a charge from a capacitive sense matrix, and hold a voltage signal representing the measured charge. A sigma delta converter can convert the voltage into a digital value. | 09-29-2011 |
20120146657 | SHORT-CIRCUIT DETECTION FOR TOUCH PANELS - A short circuit detection module for a touch panel includes first and second short circuit detection circuits. The first short circuit detection circuit is coupled to a first conductive line of the touch panel. The first short circuit detection circuit is configured to drive the first conductive line with a first signal having a first logic level. The second short circuit detection circuit is coupled to second, adjacent, conductive line of the touch panel. The second short circuit detection circuit is configured to drive the second conductive line with a second signal having a second logic level that is complementary to the first logic level. | 06-14-2012 |
20120146825 | CYCLIC DIGITAL-TO-ANALOG CONVERTER (DAC) WITH CAPACITOR SWAPPING - A cyclic digital-to-analog converter includes a first capacitor and a second capacitor. Switching circuitry is selectively configurable to connect the first and second capacitors is at least two modes of operation, wherein a first mode uses the first capacitor during conversion of a bit as a sampling capacitor and uses the second capacitor during conversion of that bit as a holding capacitor, and wherein a second mode uses the second capacitor during conversion of a bit as a sampling capacitor and uses the first capacitor during conversion of that bit as a holding capacitor. A controller swaps converter operation between the first and second modes based on the bit values of a digital word to be converted. If adjacent bits of the digital word to be converted have different logical values, the converter swaps from the first mode to the second mode (or from the second mode to the first mode). Otherwise, the converted remains in the current first or second mode. | 06-14-2012 |
20130169295 | LEAKAGE CURRENT COMPENSATION CIRCUIT - Circuitry is described for compensating leakage currents in capacitive sensing circuits. A single active leakage compensation circuit may sense a representative leakage current and drive a plurality of output transistors, each of which provides a compensating current to a respective capacitive sensing circuit. The leakage compensation circuit may sense current flow through a device substantially equivalent to a device exhibiting leakage current in a capacitive sensing circuit, and in response, provide a signal to drive one or more output transistors to supply approximately equivalent currents to a plurality of circuit nodes. For embodiments having multiple similar capacitive sensors and capacitive sensing circuits, only one transistor need be added to each capacitive sensing circuit to compensate for leakage current. | 07-04-2013 |
20140077823 | HIGH SIGNAL TO NOISE RATIO CAPACITIVE SENSING ANALOG FRONT-END - Capacitance sensing circuits and methods are provided. The capacitance sensing circuit includes a capacitance-to-voltage converter configured to receive a signal from a capacitance to be sensed and to provide an output signal representative of the capacitance, an output chopper configured to convert the output signal of the capacitance-to-voltage converter to a sensed voltage representative of the capacitance to be sensed, an analog accumulator configured to accumulate sensed voltages during an accumulation period of NA sensing cycles and to provide an accumulated analog value, an amplifier configured to amplify the accumulated analog value, and an analog-to-digital converter configured to convert the amplified accumulated analog value to a digital value representative of the capacitance to be sensed. The analog accumulator may include a low pass filter having a frequency response to filter wideband noise. | 03-20-2014 |
20140078096 | CONFIGURABLE ANALOG FRONT-END FOR MUTUAL CAPACITANCE SENSING AND SELF CAPACITANCE SENSING - Capacitance sensing circuits and methods are provided. A dual mode capacitance sensing circuit includes a capacitance-to-voltage converter having an amplifier and an integration capacitance coupled between an output and an inverting input of the amplifier, and a dual mode switching circuit responsive to mutual mode control signals for a controlling signal supplied from a capacitive touch matrix to the capacitance-to-voltage converter in a mutual capacitance sensing mode and responsive to self mode control signals for controlling signals supplied from the capacitive touch matrix to the capacitance-to-voltage converter in a self capacitance sensing mode, wherein the capacitance sensing circuit is configurable for operation in the mutual capacitance sensing mode or the self capacitance sensing mode. | 03-20-2014 |
20140092050 | COMPENSATION FOR VARIATIONS IN A CAPACITIVE SENSE MATRIX - A readout device for a capacitive sense matrix includes a computer readable storage medium configured to store capacitance data. The capacitance data represents capacitance values of the capacitive sense matrix. The readout device also includes a readout circuit configured to receive a signal from the capacitive sense matrix, the readout circuit being configured based upon the capacitance data. Also described are a readout method and a method of compensating for variations in capacitance. | 04-03-2014 |
20140292375 | ANALOG ACCUMULATOR - Accumulators that operate to fully or partially remove noise from a signal, including removing noise inserted into the signal by the accumulator itself. In some embodiments, an accumulator may be operated in a sampling phase and a transfer phase each time the accumulator samples an input signal. In some such embodiments, an op-amp of an accumulation circuit of the accumulator may be auto-zeroed during some or all of the sampling phases of an accumulation period. In some embodiments in which the op-amp is auto-zeroed during some or all of the sampling phases, the accumulation circuit may include a holding capacitor that, during an auto-zeroing process, holds a value output by the op-amp during a prior transfer phase. Including such a holding capacitor in an accumulator may reduce a voltage that the op-amp output rises following the auto-zero process, which may reduce a bandwidth and noise of the accumulation circuit. | 10-02-2014 |
20140292705 | METHOD & CIRCUIT FOR PARASITIC CAPACITANCE CANCELLATION FOR SELF CAPACITANCE SENSING - Apparatus and methods to measure capacitance changes for a touch-sensitive capacitive matrix are described. Charge-removal circuits and measurement techniques may be employed to cancel deleterious effects of parasitic capacitances in the touch-sensitive capacitive matrix. Capacitively switching a supply during timed charge removal may be used to cancel unwanted effects due to clock jitter. The apparatus and methods can improve signal-to-noise characteristics, sensitivity, and/or dynamic range for capacitive measurements relating to touch-sensitive capacitive devices. | 10-02-2014 |