Patent application number | Description | Published |
20080215943 | Generating test sets for diagnosing scan chain failures - Embodiments of the disclosed technology comprise software-based techniques that can be used to improve scan chain test pattern generation and scan chain failure diagnosis resolution. For example, certain embodiments can be used to generate high quality chain diagnosis test patterns that are able to isolate a scan chain defect to a single scan cell. Such embodiments can be used to generate a “complete” test set—that is, a set of chain diagnosis test patterns that is able to isolate any scan chain defect in a faulty scan chain to a single scan cell. | 09-04-2008 |
20080250284 | Fault dictionary-based scan chain failure diagnosis - A dictionary-based scan chain fault detector includes a dictionary with fault signatures computed for scan cells in the scan chain. Entries in the fault dictionary are compared with failures in the failure log to identify a faulty scan cell. In one embodiment a single fault in a scan chain is identified. In another embodiment, a last fault and a first fault in a scan chain are identified. | 10-09-2008 |
20090235134 | TEST PATTERN GENERATION FOR DIAGNOSING SCAN CHAIN FAILURES - Embodiments of the disclosed technology comprise techniques that can be used to generate scan chain test patterns and improve scan chain failure diagnosis resolution. For example, certain embodiments can be used to generate high quality chain diagnosis test patterns that are able to isolate a scan chain defect to a single scan cell. At least some embodiments can be used to locate faults over multiple capture cycles in the scan chain. | 09-17-2009 |
20100185908 | Speed-Path Debug Using At-Speed Scan Test Patterns - Speed-path debug techniques based on at-speed scan test patterns. Potential speed paths are identified based upon detected at-speed scan pattern failures and unknown X-value simulation. When the number of identified speed paths is large, the suspect speed paths are ranked. | 07-22-2010 |
20100274518 | Diagnostic Test Pattern Generation For Small Delay Defect - Methods of diagnostic test pattern generation for small delay defects are based on identification and activation of long paths passing through diagnosis suspects. The long paths are determined according to some criteria such as path delay values calculated with SDF (Standard Delay Format) timing information and the number of logic gates on a path. In some embodiments of the invention, the long paths are the longest paths passing through a diagnosis suspect and reaching a corresponding failing observation point selected from the failure log, and N longest paths are identified for each of such pairs. | 10-28-2010 |
20100293422 | Method And System For Scan Chain Diagnosis - Scan chain diagnosis techniques are disclosed. Faulty scan chains are modeled and scan patterns are masked to filter out loading-caused failures. By simulating the masked scan patterns, failing probabilities are determined for cells on a faulty scan chain. One or more defective cells are identified based upon the failing probability information. A noise filtering system such as the one based upon adaptive feedback may be adopted for the identification process. | 11-18-2010 |
20110035638 | Timing Failure Debug - A debug flow that uses debug-friendly test patterns and logic fault diagnosis techniques to help physical fault isolation of timing failures. | 02-10-2011 |
20110191643 | Detection And Diagnosis Of Scan Cell Internal Defects - A diagnosis technique to improve scan cell internal defect diagnostic resolution using scan cell internal fault models. | 08-04-2011 |
20120210184 | Compound Hold-Time Fault Diagnosis - Aspects of the invention relate to techniques for diagnosing compound hold-time faults. A profiling-based scan chain diagnosis may be performed on a faulty scan chain to determine observed scan cell failing probability information and one or more faulty segments based on scan pattern test information. Calculated scan cell failing probability information may then be derived. Based on the calculated scan cell failing probability information and the observed scan cell failing probability information, one or more validated faulty segments are verified to have one or more compound hold-time faults. Finally, one or more clock defect suspects may be identified based on information of the one or more validated faulty segments. | 08-16-2012 |
20120216088 | GENERATING TEST SETS FOR DIAGNOSING SCAN CHAIN FAILURES - Embodiments of the disclosed technology comprise software-based techniques that can be used to improve scan chain test pattern generation and scan chain failure diagnosis resolution. For example, certain embodiments can be used to generate high quality chain diagnosis test patterns that are able to isolate a scan chain defect to a single scan cell. Such embodiments can be used to generate a “complete” test set—that is, a set of chain diagnosis test patterns that is able to isolate any scan chain defect in a faulty scan chain to a single scan cell. | 08-23-2012 |
20120233512 | Two-Dimensional Scan Architecture - Aspects of the invention relate to techniques of using two-dimensional scan architecture for testing and diagnosis. A two-dimensional scan cell network may be constructed by coupling input for each scan cell to outputs for two or more other scan cells and/or primary inputs through a multiplexer. To test and diagnose the two-dimensional scan cell network, the two-dimensional scan cell network may be loaded with chain patterns and unloaded with corresponding chain test data along two or more sets of scan paths. Based on the chain test data, one or more defective scan cells or defective scan cell candidates may be determined. | 09-13-2012 |
20130080849 | TEST PATTERN GENERATION FOR DIAGNOSING SCAN CHAIN FAILURES - Embodiments of the disclosed technology comprise techniques that can be used to generate scan chain test patterns and improve scan chain failure diagnosis resolution. For example, certain embodiments can be used to generate high quality chain diagnosis test patterns that are able to isolate a scan chain defect to a single scan cell. At least some embodiments can be used to locate faults over multiple capture cycles in the scan chain. | 03-28-2013 |
20130166976 | Diagnosis-Aware Scan Chain Stitching - Aspects of the invention relate to techniques for determining scan chains that could be diagnosed with high resolution. A circuit design and the information of scan cells for the circuit design are analyzed to determine information of potential logic relationship between the scan cells. The information of potential logic relationship between the scan cells may comprise information of fan-in cones for the scan cells. Based at least in part on the information of potential logic relationship between the scan cells, scan chains may be formed. The formation of scan chains may be further based on layout information of the circuit design. The formation of scan chains may be further based on compactor information of the circuit design. | 06-27-2013 |
20140115413 | FAULT DICTIONARY BASED SCAN CHAIN FAILURE DIAGNOSIS - A dictionary-based scan chain fault detector includes a dictionary with fault signatures computed for scan cells in the scan chain. Entries in the fault dictionary are compared with failures in the failure log to identify a faulty scan cell. In one embodiment a single fault in a scan chain is identified. In another embodiment, a last fault and a first fault in a scan chain are identified. | 04-24-2014 |
20140237310 | Test Architecture for Characterizing Interconnects in Stacked Designs - Aspects of the invention relate to ring-oscillator-based test architecture for characterizing interconnects in stacked designs. The disclosed ring-oscillator-based test architecture comprises a plurality of boundary scan cells coupled to a plurality of interconnects. Each of the plurality of boundary scan cells can be configured to operate as, based on control signals, a conventional boundary scan cell or any bit of an asynchronous counter. The control signals are supplied by control circuitry. | 08-21-2014 |
20150226796 | GENERATING TEST SETS FOR DIAGNOSING SCAN CHAIN FAILURES - Embodiments of the disclosed technology comprise software-based techniques that can be used to improve scan chain test pattern generation and scan chain failure diagnosis resolution. For example, certain embodiments can be used to generate high quality chain diagnosis test patterns that are able to isolate a scan chain defect to a single scan cell. Such embodiments can be used to generate a “complete” test set—that is, a set of chain diagnosis test patterns that is able to isolate any scan chain defect in a faulty scan chain to a single scan cell. | 08-13-2015 |