Patent application number | Description | Published |
20090075141 | HYBRID MEMBRANES, METHOD FOR PRODUCTION OF HYBRID MEMBRANES AND FUEL CELLS USING SUCH HYBRID MEMBRANES - The invention relates to hybrid membranes that are composed of an organic polymer and an inorganic polymer, a method for producing hybrid membranes, and the use of said hybrid membranes in polymer electrolyte membrane fuel cells. The inventive hybrid membranes comprise at least one alkaline organic polymer and at least one inorganic polymer. Said polymers are blended together at a molecular level. The inorganic polymer is formed from at least one precursor monomer when the membrane is produced. The disclosed membranes are characterized in that the same are provided with high absorptivity for doping agents, have a high degree of mechanical and thermal stability in both an undoped and doped state, and feature permanently high proton conductivity. | 03-19-2009 |
20100068593 | POLYMER ELECTROLYTE MEMBRANE WITH FUNCTIONALIZED NANOPARTICLES - The present invention relates to a polymer electrolyte membrane for fuel cells, comprising a polymer matrix of at least one basic polymer and one or more doping agents, wherein particles containing ionogenic groups and having a mean particle diameter in the nanometer range are embedded in the polymer matrix and the particles containing ionogenic groups are distributed homogeneously in the polymer matrix in a concentration of less than 50% relative to the weight of the polymer matrix, as well as to the production and use of same, especially in high-temperature fuel cells. | 03-18-2010 |
20110082222 | USE OF A MATERIAL IMPARTING PROTON CONDUCTIVITY IN THE PRODUCTION OF FUEL CELLS - The invention relates to the use of a material imparting proton conductivity in the production of fuel cells, said material consisting of monomer units and having an irregular shape. | 04-07-2011 |
20110091788 | GAS DIFFUSION ELECTRODES COMPRISING FUNCTIONALISED NANOPARTICLES - The invention relates to a gas diffusion electrode for polymer electrolyte fuel cells having a working temperature of up to 250° C., comprising a plurality of gas-permeable electroconductive layers having at least one gas diffusion layer and one catalyst layer. The catalyst layer contains particles of an average particle diameter in the nanometer range, said particles containing ionogenic groups. The invention also relates to the production of said gas diffusion electrode and to the use of same in high-temperature polymer electrolyte membrane fuel cells. | 04-21-2011 |
Patent application number | Description | Published |
20140303096 | TREATMENT OF METABOLIC DISORDERS IN EQUINE ANIMALS - The present invention relates to SGLT2 inhibitor or a pharmaceutically acceptable form thereof for use in the treatment and/or prevention of a metabolic disorder of an equine animal. In particular, the present invention relates the SGLT2 inhibitor or a pharmaceutically acceptable form thereof for use in the treatment and/or prevention of insulin resistance, hyperinsulinemia, impaired glucose tolerance, dyslipidemia, dysadipokinemia, subclinical inflammation, systemic inflammation, low grade systemic inflammation, obesity, and/or regional adiposity in an equine animal. | 10-09-2014 |
20150272977 | TREATMENT OF METABOLIC DISORDERS IN EQUINE ANIMALS - The present invention relates to one or more SGLT2 inhibitors or pharmaceutically acceptable forms thereof for use in the treatment and/or prevention of a metabolic disorder of an equine animal. In particular, the present invention relates to one or more SGLT2 inhibitors or a pharmaceutically acceptable form thereof for use in the treatment and/or prevention of laminitis, vascular dysfunction, hypertension, hepatic lipidosis, atherosclerosis, hyperadrenocorticism, Pituitary Pars Intermedia Dysfunction and/or Equine Metabolic Syndrome in an equine animal. | 10-01-2015 |
20150274790 | MODULAR ANTIGEN TRANSPORTATION MOLECULES AND USES THEROF - The present invention relates to (isolated) recombinant proteins, also referred to as improved MAT (iMAT) molecules, comprising at least one translocation module, at least one targeting module and at least one antigen module, wherein at least one cysteine residue is substituted with a different amino acid residue. Such iMAT molecules are useful specifically as vaccines, e.g., for therapy and/or prevention of allergies and/or infectious diseases and/or prevention of transmission of infectious diseases in equines. The present invention further relates to nucleic acids encoding such iMAT molecules, corresponding vectors and primary cells or cell lines. | 10-01-2015 |
Patent application number | Description | Published |
20090108336 | METHOD FOR ADJUSTING THE HEIGHT OF A GATE ELECTRODE IN A SEMICONDUCTOR DEVICE - By providing an implantation blocking material on the gate electrode structures of advanced semiconductor devices during high energy implantation processes, the required shielding effect with respect to the channel regions of the transistors may be accomplished. In a later manufacturing stage, the implantation blocking portion may be removed to reduce the gate electrode height to a desired level in order to enhance the process conditions during the deposition of an interlayer dielectric material, thereby significantly reducing the risk of creating irregularities, such as voids, in the interlayer dielectric material, even in densely packed device regions. | 04-30-2009 |
20090243049 | DOUBLE DEPOSITION OF A STRESS-INDUCING LAYER IN AN INTERLAYER DIELECTRIC WITH INTERMEDIATE STRESS RELAXATION IN A SEMICONDUCTOR DEVICE - Enhanced efficiency of a stress relaxation implantation process may be achieved by depositing a first layer of reduced thickness and relaxing the same at certain device regions, thereby obtaining an enhanced amount of substantially relaxed dielectric material in close proximity to the transistor under consideration, wherein a desired high amount of stressed dielectric material may be obtained above other transistors by performing a further deposition process. Hence, the negative effect of the highly stressed dielectric material for specific transistors, for instance in densely packed device regions, may be significantly reduced by depositing the highly stressed dielectric material in two steps with an intermediate relaxation implantation process. | 10-01-2009 |
20090294868 | DRIVE CURRENT ADJUSTMENT FOR TRANSISTORS FORMED IN THE SAME ACTIVE REGION BY LOCALLY INDUCING DIFFERENT LATERAL STRAIN LEVELS IN THE ACTIVE REGION - The drive current capability of a pull-down transistor and a pass transistor formed in a common active region may be adjusted on the basis of a strain-inducing mechanism, such as a stressed dielectric material and a stress memorization technique, thereby providing a simplified overall geometric configuration of the active region. Hence, static RAM cells may be formed on the basis of a minimum channel length with a simplified configuration of the active region, thereby avoiding significant yield losses as may be observed in sophisticated devices in which a pronounced variation of the transistor width may be used to adjust the ratio of the drive current capabilities for the pull-down transistor and the pass transistor. | 12-03-2009 |
20090321850 | Threshold adjustment for MOS devices by adapting a spacer width prior to implantation - Different threshold voltages of transistors of the same conductivity type in a complex integrated circuit may be adjusted on the basis of different Miller capacitances, which may be accomplished by appropriately adapting a spacer width and/or performing a tilted extension implantation. Thus, efficient process strategies may be available to controllably adjust the Miller capacitance, thereby providing enhanced transistor performance of low threshold transistors while not unduly contributing to process complexity compared to conventional approaches in which threshold voltage values may be adjusted on the basis of complex halo and well doping regimes. | 12-31-2009 |
20100078823 | CONTACTS AND VIAS OF A SEMICONDUCTOR DEVICE FORMED BY A HARD MASK AND DOUBLE EXPOSURE - A contact element may be formed on the basis of a hard mask, which may be patterned on the basis of a first resist mask and on the basis of a second resist mask, to define an appropriate intersection area which may represent the final design dimensions of the contact element. Consequently, each of the resist masks may be formed on the basis of a photolithography process with less restrictive constraints, since at least one of the lateral dimensions may be selected as a non-critical dimension in each of the two resist masks. | 04-01-2010 |
20100133628 | HIGH-K GATE ELECTRODE STRUCTURE FORMED AFTER TRANSISTOR FABRICATION BY USING A SPACER - During a replacement gate approach, the inverse tapering of the opening obtained after removal of the polysilicon material may be reduced by depositing a spacer layer and forming corresponding spacer elements on inner sidewalls of the opening. Consequently, the metal-containing gate electrode material and the high-k dielectric material may be deposited with enhanced reliability. | 06-03-2010 |
20100190309 | METHOD FOR ADJUSTING THE HEIGHT OF A GATE ELECTRODE IN A SEMICONDUCTOR DEVICE - By providing an implantation blocking material on the gate electrode structures of advanced semiconductor devices during high energy implantation processes, the required shielding effect with respect to the channel regions of the transistors may be accomplished. In a later manufacturing stage, the implantation blocking portion may be removed to reduce the gate electrode height to a desired level in order to enhance the process conditions during the deposition of an interlayer dielectric material, thereby significantly reducing the risk of creating irregularities, such as voids, in the interlayer dielectric material, even in densely packed device regions. | 07-29-2010 |
20110223732 | THRESHOLD ADJUSTMENT FOR MOS DEVICES BY ADAPTING A SPACER WIDTH PRIOR TO IMPLANTATION - Different threshold voltages of transistors of the same conductivity type in a complex integrated circuit may be adjusted on the basis of different Miller capacitances, which may be accomplished by appropriately adapting a spacer width and/or performing a tilted extension implantation. Thus, efficient process strategies may be available to controllably adjust the Miller capacitance, thereby providing enhanced transistor performance of low threshold transistors while not unduly contributing to process complexity compared to conventional approaches in which threshold voltage values may be adjusted on the basis of complex halo and well doping regimes. | 09-15-2011 |
20110291292 | Selective Shrinkage of Contact Elements in a Semiconductor Device - In sophisticated semiconductor devices, the contact elements connecting to active semiconductor regions having formed thereabove closely spaced gate electrode structures may be provided on the basis of a liner material so as to reduce the lateral width of the contact opening, while, on the other hand, non-critical contact elements may be formed on the basis of non-reduced lateral dimensions. To this end, at least a first portion of the critical contact element is formed and provided with a liner material prior to forming the non-critical contact element. | 12-01-2011 |
20110291299 | Stress Reduction in Chip Packaging by a Stress Compensation Region Formed Around the Chip - A stress compensation region that may be appropriately positioned on a package substrate may compensate for or at least significantly reduce the thermally induced mechanical stress in a sensitive metallization system of a semiconductor die, in particular during the critical reflow process. For example, a stressor ring may be formed so as to laterally surround the chip receiving portion of the package substrate, wherein the stressor ring may efficiently compensate for the thermally induced deformation in the chip receiving portion. | 12-01-2011 |
20120115326 | Method of Forming Metal Silicide Regions - The method described herein involves the formation of metal silicide regions. The method may involve forming a layer of refractory metal on a structure comprising silicon, forming a layer of silicon on the layer of refractory metal and, after forming the layer of silicon, performing at least one heat treatment process to form a metal silicide region in the structure. | 05-10-2012 |
20120161324 | Semiconductor Device Comprising Contact Elements with Silicided Sidewall Regions - When forming a metal silicide within contact openings in complex semiconductor devices, a silicidation of sidewall surface areas of the contact openings may be initiated by forming a silicon layer therein, thereby reducing unwanted diffusion of the refractory metal species into the laterally adjacent dielectric material. In this manner, superior reliability and electrical performance of the resulting contact elements may be achieved on the basis of a late silicide process. | 06-28-2012 |
20120313176 | Buried Sublevel Metallizations for Improved Transistor Density - Generally, the subject matter disclosed herein relates to modern sophisticated semiconductor devices and methods for forming the same, wherein electrical interconnects between circuit elements based on a buried sublevel metallization may provide improved transistor density. One illustrative method disclosed herein includes forming a contact dielectric layer above first and second transistor elements of a semiconductor device, and after forming the contact dielectric layer, forming a buried conductive element below an upper surface of the contact dielectric layer, the conductive element providing an electrical connection between the first and second transistor elements. | 12-13-2012 |
20130072016 | METHODS OF FORMING CONDUCTIVE CONTACTS WITH REDUCED DIMENSIONS - Disclosed herein are various methods of forming conductive contacts with reduced dimensions and various semiconductor devices incorporating such conductive contacts. In one example, one method disclosed herein includes forming a layer of insulating material above a semiconducting substrate, wherein the layer of material has a first thickness, forming a plurality of contact openings in the layer of material having the first thickness and forming an organic material in at least a portion of each of the contact openings. This illustrative method further includes the steps of, after forming the organic material, performing an etching process to reduce the first thickness of the layer of insulating material to a second thickness that is less than the first thickness, after performing the etching process, removing the organic material from the contact openings and forming a conductive contact in each of the contact openings. | 03-21-2013 |
20130189822 | METHODS OF FABRICATING INTEGRATED CIRCUITS WITH THE ELIMINATION OF VOIDS IN INTERLAYER DIELECTICS - Methods are provided for fabricating integrated circuits that include forming first and second spaced apart gate structures overlying a semiconductor substrate, and forming first and second spaced apart source/drain regions in the semiconductor substrate between the gate structures. A first layer of insulating material is deposited overlying the gate structures and the source/drain regions by a process of atomic layer deposition, and a second layer of insulating material is deposited overlying the first layer by a process of chemical vapor deposition. First and second openings are etched through the second layer and the first layer to expose portions of the source/drain regions. The first and second openings are filled with conductive material to form first and second spaced apart contacts, electrically isolated from each other, in electrical contact with the first and second source/drain regions. | 07-25-2013 |
20130252409 | HIGH-K GATE ELECTRODE STRUCTURE FORMED AFTER TRANSISTOR FABRICATION BY USING A SPACER - During a replacement gate approach, the inverse tapering of the opening obtained after removal of the polysilicon material may be reduced by depositing a spacer layer and forming corresponding spacer elements on inner sidewalls of the opening. Consequently, the metal-containing gate electrode material and the high-k dielectric material may be deposited with enhanced reliability. | 09-26-2013 |
20140264641 | SEMICONDUCTOR DEVICE COMPRISING CONTACT STRUCTURES WITH PROTECTION LAYERS FORMED ON SIDEWALLS OF CONTACT ETCH STOP LAYERS - When forming semiconductor devices with contact plugs comprising protection layers formed on sidewalls of etch stop layers to reduce the risk of shorts, the protection layers may be formed by performing a sputter process to remove material from a contact region and redeposit the removed material on the sidewalls of the etch stop layers. | 09-18-2014 |
Patent application number | Description | Published |
20090180352 | Method for operating an ultrasonic sensor, and corresponding ultrasonic sensor - Operation of an ultrasonic sensor in duplex mode, and a method for operating an ultrasonic sensor in duplex mode, a corresponding ultrasonic sensor, and a corresponding device for controlling the ultrasonic sensor. A transmission trigger for triggering an acoustic transmitted signal is transmitted from the device for controlling the ultrasonic sensor to the ultrasonic sensor via a first duplex channel at a multiple of a resonance frequency of an ultrasonic converter in the ultrasonic sensor. The transmission trigger is divided down to the resonance frequency of the converter, using a divider in the ultrasonic sensor. At least one acoustic received signal which corresponds to the acoustic transmitted signal and which is delayed with respect to the reflection at an object due to the acoustic propagation time is converted by the ultrasonic sensor, using the converter, to an electrical received signal, and this electrical received signal is transmitted from the ultrasonic sensor to the device for controlling the ultrasonic sensor via a second duplex channel at the resonance frequency of the ultrasonic converter in the ultrasonic sensor. | 07-16-2009 |
20090219190 | Method and Device for Measuring the Distance and Relative Speed of Multiple Objects - A method and device are provided for measuring distance and relative speed of a plurality of objects with the aid of an FMCW radar, transmitted signals being reflected by objects, and the reflected signals being received and mixed with the transmitted signals. A combination of distance and relative speed values is assigned to the mixer output frequencies of each frequency ramp for each object, and the distance and relative speed of a possible object are determined from points of intersection of a plurality of distance and relative speed combinations. The apparent (unreal) objects are eliminated by modifying the frequency slope of at least one frequency ramp according to the random principle in a subsequent measurement cycle. | 09-03-2009 |
20090301205 | ULTRASONIC SENSOR - An ultrasonic sensor, in particular for a vehicle, including a housing, includes the following: a transducer element which is attached to the bottom of the housing for generating ultrasonic oscillations; a first damping element situated in the housing for damping oscillations of the bottom; and a cover for sealing the housing, the cover being provided with a second damping element and having continuous tapering of the cover thickness in the region of the second damping element. | 12-10-2009 |
20090314575 | HOLDING DEVICE FOR AN ULTRASONIC TRANSDUCER - A holding device for an ultrasonic transformer having a diaphragm cup, in particular for a motor vehicle, includes the following: a housing to accommodate the diaphragm cup; a decoupling component to position the diaphragm cup on the housing and on a holding section in vibration-damped manner; and a filler material to connect the diaphragm cup and the decoupling component to the housing in a vibration-damped and sealing, form-fitting manner, the decoupling component sealingly filling a gap between an edge of an opening of the housing and the diaphragm cup, as well as a corresponding method. | 12-24-2009 |
20100296692 | Ultrasonic transducer - An ultrasonic transducer includes: a diaphragm pot that has a surrounding wall; a transducer element mounted in a diaphragm pot on a transducer section on an inner side of the diaphragm for generating the ultrasonic vibrations; a first damping element situated in the diaphragm pot on transducer element for damping the diaphragm; and a second damping element situated within the diaphragm pot in an edge section of the diaphragm around the transducer element for damping vibrations of the wall; the second damping element being connected with force locking, at least section by section, both to the edge section and to the inner side of the wall. | 11-25-2010 |
20110102114 | Device And Method For Attenuating An Anti-Resonant Circuit - A device for the attenuation of an anti-resonant circuit which has a first capacitor and a secondary inductance. A signal is able to be coupled into the anti-resonant circuit via a primary inductance. An attenuator is connected in parallel to a switching device and to the secondary inductance and/or the primary inductanace. | 05-05-2011 |
20110259107 | ultrasonic sensor - An ultrasonic sensor is described having a housing which has a circumferential side wall and a base surface. A transducer element for generating ultrasonic vibrations is mounted on the base surface. The side wall includes a lower side wall section, in which the side wall has an essentially rotationally asymmetrical profile in a plane parallel to the base surface, and an upper side wall section in which the side wall changes to an essentially rotationally symmetrical profile toward an upper edge of the side wall. In other respects, the present system provides a parking assistance system for a vehicle, having a control unit and such an ultrasonic sensor, as well as a method for manufacturing an ultrasonic sensor. | 10-27-2011 |
20110267217 | ANTENNA RADAR SYSTEM AND METHOD FOR ITS OPERATION - In an antenna radar system including a short-range function and a long-range function which is situated separately from the short-range function, the short-range function and the long-range function having different antenna apertures, means are provided for mutual cross-polarization of the signals emitted and received using the short-range function and the long-range function, through which the most efficient possible signal-technology decoupling between the short-range function and the long-range function is achieved. | 11-03-2011 |
20110280106 | ULTRASONIC SENSOR AND METHOD FOR OPERATING AN ULTRASONIC SENSOR - The ultrasonic sensor having a switchable receive filter has a first bandwidth for a near measuring range of the ultrasonic sensor, and a second bandwidth for a distant measuring range of the ultrasonic sensor, the first bandwidth being greater than the second bandwidth. | 11-17-2011 |
20120017684 | SENSOR DEVICE AND METHOD FOR OPERATING A SENSOR DEVICE - A sensor device described having a sensor, in particular an ultrasound sensor, having a generating and detecting arrangement to generate and detect waves, in particular sound waves, the detection arrangement converting received waves into electric signals, and the electric signals being evaluable by an evaluation unit. A function-monitoring device is configured to determine an impedance characteristic curve of the sensor as a function of an excitation frequency is provided. Also described is a method for operating the sensor device. | 01-26-2012 |
20140026396 | ULTRASONIC TRANSDUCER - An ultrasonic transducer includes: a diaphragm pot that has a surrounding wall; a transducer element mounted in a diaphragm pot on a transducer section on an inner side of the diaphragm for generating the ultrasonic vibrations; a first damping element situated in the diaphragm pot on transducer element for damping the diaphragm; and a second damping element situated within the diaphragm pot in an edge section of the diaphragm around the transducer element for damping vibrations of the wall; the second damping element being connected with force locking, at least section by section, both to the edge section and to the inner side of the wall. | 01-30-2014 |
20150373241 | Method for producing a camera, and a camera for a vehicle - A method for producing a camera includes: mounting an image sensor on a circuit carrier and contacting with a power device for recording image signals of the image sensor; measuring an objective while ascertaining a tilting angle of its optical axis in terms of an amount and azimuth; providing an objective holder having a tube and locating pins; placing the objective holder with its locating pins on at least one of the circuit carrier and the image sensor; inserting the objective in a specified rotational position or at an azimuth angle into the tube as a function of the ascertained tilting angle; and adjusting the focus. An axis of symmetry of the tube of the objective holder has a counter-tilting angle with respect to a surface normal of the image sensor, which is the opposite of the ascertained tilting angle or the image shell tilting of the objective. | 12-24-2015 |