Patent application number | Description | Published |
20100018902 | METHODS FOR PRODUCING A TOTAL PRODUCT AT SELECTED TEMPERATURES - Method of producing a total product are described. A method includes providing a feed and a supported inorganic salt catalyst to a contacting zone. Contact of the supported inorganic salt catalyst with the feed in the presence of a hydrogen source and steam in the contacting zone at a temperature of at most 1000° C. and a total operating pressure of at most | 01-28-2010 |
20130119676 | METHOD OF PROCESSING FEED STREAMS CONTAINING HYDROGEN SULFIDE - A method of processing feed streams containing significant quantities of hydrogen sulfide is provided. The method includes providing a feed gas stream that includes hydrogen sulfide and hydrocarbons. The feed gas stream has at least 1% by volume hydrogen sulfide. At least a portion of the feed gas stream is separated into a hydrogen sulfide stream and a hydrocarbon stream. The hydrogen sulfide stream includes more hydrogen sulfide, by volume percent, than the feed stream; and the hydrocarbon stream contains less hydrogen sulfide, by volume percent, than the feed gas stream. The hydrocarbon gas stream is processed to produce a natural gas product selected from pipeline natural gas, compressed natural gas, and liquefied natural gas. Greater than one-third of the hydrogen sulfide stream, on a volume basis, is combusted to generate thermal power. | 05-16-2013 |
20130123556 | METHOD OF PRODUCING SULFUR DIOXIDE - A method of producing sulfur dioxide is provided. A feed gas stream comprising at least 5% by volume hydrogen sulfide is provided. The feed gas stream is separated into a hydrogen sulfide stream and a hydrocarbon gas stream. An oxidant stream is provided and is combusted with the hydrogen sulfide stream to produce thermal power and a combustion stream containing sulfur dioxide and steam. Sulfur dioxide is separated from the combustion stream. | 05-16-2013 |
20130123559 | METHOD OF PROCESSING FEED STREAMS CONTAINING HYDROGEN SULFIDE - A method of processing feed streams high in hydrogen sulfide is provided. The method includes providing a feed gas stream that includes hydrocarbons and at least 5 vol % hydrogen sulfide. At least a portion of the feed gas stream is separated into a hydrogen sulfide stream and a hydrocarbon stream. The hydrocarbon gas stream is processed to produce natural gas. At least 34 mol. % of the hydrogen sulfide in the hydrogen sulfide stream is combusted with an oxidant to generate thermal power. Thermal power generated by the combustion is utilized in one or more of the steps of separating the feed gas stream into the hydrogen sulfide stream and the hydrocarbon gas stream, and processing the hydrocarbon gas stream to produce natural gas, compressed natural gas, or liquefied natural gas. | 05-16-2013 |
Patent application number | Description | Published |
20090099987 | DECOMPOSED OPTIMAL BAYESIAN STACKELBERG SOLVER - Techniques are described for Stackelberg games, in which one agent (the leader) must commit to a strategy that can be observed by other agents (the followers or adversaries) before they choose their own strategies, in which the leader is uncertain about the types of adversaries it may face. Such games are important in security domains, where, for example, a security agent (leader) must commit to a strategy of patrolling certain areas, and robbers (followers) have a chance to observe this strategy over time before choosing their own strategies of where to attack. An efficient exact algorithm is described for finding the optimal strategy for the leader to commit to in these games. This algorithm, Decomposed Optimal Bayesian Stackelberg Solver or “DOBSS,” is based on a novel and compact mixed-integer linear programming formulation. The algorithm can be implemented in a method, software, and/or system including computer or processor functionality. | 04-16-2009 |
20090119239 | Agent security via approximate solvers - Efficient heuristic methods are described for approximating the optimal leader strategy for security domains where threats come from unknown adversaries. These problems can be modeled as Bayes-Stackelberg games. An embodiment of the heuristic method can include defining a patrolling or security domain problem as a mixed-integer quadratic program. The mixed-integer quadratic program can be converted to a mixed-integer linear program. For a single follower (e.g., robber or terrorist) scenario, the mixed-integer linear program can be solved, subject to appropriate constraints. For embodiments applicable to multiple follower situations, the relevant mixed-integer quadratic program and related mixed-integer linear program can be decomposed, e.g., by changing the response function for the follower from a pure strategy to a weighted combination over various pure follower strategies where the weights are probabilities of occurrence of each of the follower types. | 05-07-2009 |
20120330727 | AGENT SECURITY VIA APPROXIMATE SOLVERS - Efficient heuristic methods are described for approximating the optimal leader strategy for security domains where threats come from unknown adversaries. These problems can be modeled as Bayes-Stackelberg games. An embodiment of the heuristic method can include defining a patrolling or security domain problem as a mixed-integer quadratic program. The mixed-integer quadratic program can be converted to a mixed-integer linear program. For a single follower (e.g., robber or terrorist) scenario, the mixed-integer linear program can be solved, subject to appropriate constraints. For embodiments applicable to multiple follower situations, the relevant mixed-integer quadratic program and related mixed-integer linear program can be decomposed, e.g., by changing the response function for the follower from a pure strategy to a weighted combination over various pure follower strategies where the weights are probabilities of occurrence of each of the follower types. | 12-27-2012 |
Patent application number | Description | Published |
20140278907 | Rewarding User Generated Content - Example apparatus and methods concern rewarding a user for making a contribution to a crowd-sourced database. An example apparatus may include logic for acquiring the contribution, where the contribution is data produced by a mobile device concerning a point of interest. The example apparatus also includes logic for producing an evaluation of the contribution and logic for providing a reward based on the contribution, the evaluation, and the user. The contribution may be data about a point of interest. The evaluation may be based on the completeness, timeliness, or contents of the contribution. The reward may be selected based on the evaluation of the contribution and a profile of the user. The reward or user profile may be manipulated based on confirmation or repudiation of the contribution by a different user contribution or by curation of the contribution. Providing the contribution may be free to the user. | 09-18-2014 |
20140280053 | CONTEXTUAL SOCIALLY AWARE LOCAL SEARCH - Methods, systems, and computer program products are provided for determining a meeting location. A group of persons to meet is determined. A conjoined interest set is generated that is representative of the group of persons. Locations of persons in the group are determined to determine a plurality of locations. Local search results for the group of persons are received that are generated based on the conjoined interest set and the determined plurality of locations. The local search results include at least one potential meeting location. The local search results are enabled to be presented to at least one person of the group of persons. | 09-18-2014 |
20140280231 | Dynamically Expiring Crowd-Sourced Content - Example apparatus and methods concern dynamically expiring crowd-sourced content (CSC) in a crowd-sourced database. An example apparatus may include logic for acquiring the CSC, where the CSC is data produced by a mobile device concerning a point of interest. The example apparatus also includes logic for producing an evaluation of the CSC and logic for determining an expiration criteria based on the CSC, the evaluation, and the user. The CSC may be data about a point of interest. The evaluation may be based on the completeness, timeliness, or contents of the CSC. The expiration criteria may be established based on the evaluation of the CSC and a user profile. The expiration criteria or user profile may be manipulated based on confirmation or repudiation of the CSC by a different user or by curation of the CSC. | 09-18-2014 |
20150161360 | Mobile Device Generated Sharing of Cloud Media Collections - Mobile device generated sharing of media is disclosed. A user of a first device may obtain transferable limited rights to selected media by initiating transfer of a token from a first digital media service to the first device. The token may then be transferred from the first device to a second device. Upon transfer of the token to the second device a user of the second device may then use the token to access the selected media and direct the streaming of the selected media according to the limited rights included in the token. The limited rights that are transferred may include various limitations on use such as, for example, proximity restrictions on where the first and/or second device must be located for the rights to remain valid, or, restrictions including time or usage limitations. Violations of the restrictions or usage limitations may result in the limited rights being terminated. | 06-11-2015 |
20150278348 | EXPLICIT SIGNALS PERSONALIZED SEARCH - Methods, systems, and computer program products are provided that enable users to provide explicit declarations that are used to generate recommendations for the users. An explicit declaration is received from a user of a user device. The explicit declaration is configured to influence a subsequent recommendation. The words of the explicit declaration are processed to generate a record. A recommendation rule is generated based on the generated record. The recommendation rule is executed to generate a recommendation for the user. The generated recommendation is provided to the user. | 10-01-2015 |
Patent application number | Description | Published |
20130320544 | CORROSION/ETCHING PROTECTION IN INTEGRATION CIRCUIT FABRICATIONS - A method of producing reduced corrosion interconnect structures and structures thereby formed. A method of producing microelectronic interconnects having reduced corrosion begins with a damascene structure having a first dielectric and a first interconnect. A metal oxide layer is deposited selectively to metal or nonselective over the damascene structure and then thermally treated. The treatment converts the metal oxide over the first dielectric to a metal silicate while the metal oxide over the first interconnect remains as a self-aligned protective layer. When a subsequent dielectric stack is formed and patterned, the protective layer acts as an etch stop, oxidation barrier and ion bombardment protector. The protective layer is then removed from the patterned opening and a second interconnect formed. In a preferred embodiment the metal oxide is a manganese oxide and the metal silicate is a MnSiCOH, the interconnects are substantially copper and the dielectric contains ultra low-k. | 12-05-2013 |
20140273425 | CYCLICAL PHYSICAL VAPOR DEPOSITION OF DIELECTRIC LAYERS - Embodiments include methods of forming dielectric layers. According to an exemplary embodiment, a dielectric layer may be formed by determining a desired thickness of the dielectric layer, forming a first dielectric sub-layer having a thickness less than the desired thickness by depositing a first metal layer above a substrate and oxidizing the first metal layer, and forming n (where n is greater than 1) additional dielectric sub-layers having a thickness less than the desired thickness above the first dielectric sub-layer by the same method of the first dielectric sub-layer so that a combined thickness of all dielectric sub-layers is approximately equal to the desired thickness. | 09-18-2014 |
20150069531 | LOCALLY RAISED EPITAXY FOR IMPROVED CONTACT BY LOCAL SILICON CAPPING DURING TRENCH SILICIDE PROCESSINGS - A low resistance contact to a finFET source/drain can be achieved by forming a defect free surface on which to form such contact. The fins of a finFET can be exposed to epitaxial growth conditions to increase the bulk of semiconductive material in the source/drain. Facing growth fronts can merge or can form unmerged facets. A dielectric material can fill voids within the source drain region. A trench spaced from the finFET gate can expose the top portion of faceted epitaxial growth on fins within said trench, such top portions separated by a smooth dielectric surface. A silicon layer selectively formed on the top portions exposed within the trench can be converted to a semiconductor-metal layer, connecting such contact with individual fins in the source drain region. | 03-12-2015 |
20150179576 | LOCALLY RAISED EPITAXY FOR IMPROVED CONTACT BY LOCAL SILICON CAPPING DURING TRENCH SILICIDE PROCESSINGS - A low resistance contact to a finFET source/drain can be achieved by forming a defect free surface on which to form such contact. The fins of a finFET can be exposed to epitaxial growth conditions to increase the bulk of semiconductive material in the source/drain. Facing growth fronts can merge or can form unmerged facets. A dielectric material can fill voids within the source drain region. A trench spaced from the finFET gate can expose the top portion of faceted epitaxial growth on fins within said trench, such top portions separated by a smooth dielectric surface. A silicon layer selectively formed on the top portions exposed within the trench can be converted to a semiconductor-metal layer, connecting such contact with individual fins in the source drain region. | 06-25-2015 |
Patent application number | Description | Published |
20090065817 | DIELECTRIC SPACER REMOVAL - The present invention relates to semiconductor devices, and more particularly to a process and structure for removing a dielectric spacer selective to a surface of a semiconductor substrate with substantially no removal of the semiconductor substrate. The method of the present invention can be integrated into a conventional CMOS processing scheme or into a conventional BiCMOS processing scheme. The method includes forming a field effect transistor on a semiconductor substrate, the FET comprising a dielectric spacer and the gate structure, the dielectric spacer located adjacent a sidewall of the gate structure and over a source/drain region in the semiconductor substrate; depositing a first nitride layer over the FET; and removing the nitride layer and the dielectric spacer selective to the semiconductor substrate with substantially no removal of the semiconductor substrate. | 03-12-2009 |
20090108366 | Structure And Method To Fabricate Metal Gate High-K Devices - Disclosed is a method to fabricate a semiconductor device, and a device fabricated in accordance with the method. The method includes providing a substrate comprised of silicon; performing a shallow trench isolation process to delineate nFET and pFET active areas and, within each active area, forming a gate structure over a surface of the substrate, the gate structure comprising in order from the surface of the substrate, a layer of high dielectric constant oxide, a layer comprised of a metal, a layer comprised of amorphous silicon, and a layer comprised of polycrystalline silicon. The layer comprised of amorphous silicon is provided to substantially prevent regrowth of the high dielectric constant oxide layer in a vertical direction during at least a deposition and processing of the polycrystalline silicon layer and/or metal layer. | 04-30-2009 |
20090302396 | Structure and Method to Fabricate Metal Gate High-K Devices - Disclosed is a method to fabricate a semiconductor device, and a device fabricated in accordance with the method. The method includes providing a substrate comprised of silicon; performing a shallow trench isolation process to delineate nFET and pFET active areas and, within each active area, forming a gate structure over a surface of the substrate, the gate structure comprising in order from the surface of the substrate, a layer of high dielectric constant oxide, a layer comprised of a metal, a layer comprised of amorphous silicon, and a layer comprised of polycrystalline silicon. The layer comprised of amorphous silicon is provided to substantially prevent regrowth of the high dielectric constant oxide layer in a vertical direction during at least a deposition and processing of the polycrystalline silicon layer and/or metal layer. | 12-10-2009 |
Patent application number | Description | Published |
20140113433 | WAFER BONDING FOR 3D DEVICE PACKAGING FABRICATION - An apparatus and method bond a first wafer to a second wafer. The apparatus includes a first pressure application device configured to apply pressure at a central region of the first wafer in a direction toward the second wafer to initiate a bonding process between the first wafer and the second wafer. The apparatus also includes one or more second pressure application devices configured to apply pressure between the central region and an outer edge of the first wafer to complete the bonding process. The one or more second pressure application devices apply pressure on the first wafer after the first pressure application device has initiated the bonding process and while the first pressure application device continues to apply pressure at the central region. A controller controls the first pressure application device and the one or more second pressure application devices. | 04-24-2014 |
20140162447 | FINFET HYBRID FULL METAL GATE WITH BORDERLESS CONTACTS - A method for fabricating a field effect transistor device includes patterning a fin on substrate, patterning a gate stack over a portion of the fin and a portion of an insulator layer arranged on the substrate, forming a protective barrier over the gate stack, a portion of the fin and a portion of the insulator layer, the protective barrier enveloping the gate stack, depositing a second insulator layer over portions of the fin and the protective barrier, performing a first etching process to selectively remove portions of the second insulator layer to define cavities that expose portions of source and drain regions of the fin without appreciably removing the protective barrier, and depositing a conductive material in the cavities. | 06-12-2014 |
20140252502 | MULTILAYER DIELECTRIC STRUCTURES FOR SEMICONDUCTOR NANO-DEVICES - Multilayer dielectric structures are provided having silicon nitride (SiN) and silicon oxynitride (SiNO) films for use as capping layers, liners, spacer barrier layers, and etch stop layers, and other components of semiconductor nano-devices. For example, a semiconductor structure includes a multilayer dielectric structure having multiple layers of dielectric material including one or more SiN layers and one or more SiNO layers. The layers of dielectric material in the multilayer dielectric structure have a thickness in a range of about 0.5 nanometers to about 3 nanometers. | 09-11-2014 |
20140256153 | MULTILAYER DIELECTRIC STRUCTURES FOR SEMICONDUCTOR NANO-DEVICES - Multilayer dielectric structures are provided having silicon nitride (SiN) and silicon oxynitride (SiNO) films for use as capping layers, liners, spacer barrier layers, and etch stop layers, and other components of semiconductor nano-devices. For example, a semiconductor structure includes a multilayer dielectric structure having multiple layers of dielectric material including one or more SiN layers and one or more SiNO layers. The layers of dielectric material in the multilayer dielectric structure have a thickness in a range of about 0.5 nanometers to about 3 nanometers. | 09-11-2014 |