Sonnekalb
Michael Sonnekalb, Schwalmstadt DE
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20090095005 | Air-Conditioning System - Described is an air conditioning system with a heating function, wherein the inner heat exchanger is split in the air flow direction, wherein the first partial heat exchanger of the inner heat exchanger in the air flow direction preferably operates to cool the supply air, that is to say as a refrigerant evaporator, and wherein the second partial heat exchanger, which is connected downstream in the air direction, preferably operates to heat the supply air, that is to say as a refrigerant gas cooler, wherein the two partial heat exchangers of the inner heat exchanger can also both be used, in the case of the maximum cooling demand, as a refrigerant evaporator for cooling or can also both be used, in the case of the maximum heating demand, as refrigerant gas coolers for heating the supply air, and wherein in drying operation (reheat), the first partial heat exchanger of the inner heat exchanger in the air flow direction operates as a refrigerant evaporator and at the same time the second partial heat exchanger operates as a refrigerant gas cooler, as a result of which, in an advantageous manner in energy terms, the condensation heat of the air humidity is used, in addition to the compressor waste heat, for heating the supply air. | 04-16-2009 |
Steffen Sonnekalb, Taufkirchen DE
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20120233446 | Program-Instruction-Controlled Instruction Flow Supervision - A signature module calculates a signature during the execution of a program by a central processing unit based on program instructions to the central processing unit, and stores the signature in a signature register of the signature module. The signature module includes: a calculation unit configured to generate a signature value based on program instructions executed on the central processing unit; and an instruction information interface configured to receive at least one item of instruction information from the central processing unit which indicates whether an instruction currently being executed by the central processing unit was jumped to indirectly or directly. | 09-13-2012 |
20140189176 | PROCESSOR ARRANGEMENTS AND A METHOD FOR TRANSMITTING A DATA BIT SEQUENCE - A processor arrangement is provided. The processor arrangement includes: a first processor; a plurality of second processors, each second processor including a bit-mask generator configured to generate a processor-specific bit-mask sequence; wherein the first processor includes a bit-mask generator configured to generate the processor-specific bit-mask sequences of the second processors; wherein the first processor is configured to bit-mask a data bit sequence to be transmitted to one second processor of the plurality of second processors using a processor-specific bit-mask sequence specific to the one second processor, to thereby generate a processor-specific bit-masked data sequence to be transmitted to the one second processor. | 07-03-2014 |
20140215174 | Accessing Memory with Security Functionality - A memory device includes a first memory portion and a second memory portion. The second memory portion includes a security functionality. The size of the first memory portion and the size of the second memory portion are adjustable. | 07-31-2014 |
20140306823 | Apparatus Comprising a Pair of an Alarm Condition Generator and an Associated Alarm Circuit, Chip Card, and Method - An apparatus includes a pair of an alarm condition generator and an associated alarm circuit and a test circuit. The alarm circuit is configured to generate an alarm signal in response to a detection of an associated alarm condition. The alarm condition generator is configured to generate the associated alarm condition for its associated alarm circuit in response to a reception of a first reset of a first type of reset. The test circuit is configured to receive the alarm signal and the first reset and to generate in response to a reception of both the first reset and the alarm signal a second reset of a second type of reset. | 10-16-2014 |
Steffen Sonnekalb, Muenchen DE
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20150032787 | Apparatus and Method for Detecting Integrity Violation - An apparatus for detecting integrity violation includes a feedback shift register including a plurality of registers connected in series, and a feedback function unit connected between an output of a number of the registers and an input of at least one of the registers. The apparatus further includes an integrity violation detector adapted to determine as to whether a sequence of values at an input or output of at least one of the registers, or a logic combination thereof, is a non-constant sequence or a constant sequence. The apparatus is further adapted to output an indication that the feedback shift register is in an integral state if the sequence of values is a non-constant sequence, or to output an indication that the feedback shift register is subjected to an integrity violation if the sequence of values is a constant sequence. | 01-29-2015 |
Steffen Marc Sonnekalb, Taufkirchen DE
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20100180181 | APPARATUS AND METHOD FOR WRITING DATA TO BE STORED TO A PREDETERMINED MEMORY AREA - Method and apparatus for writing data to be stored to a predetermined memory area, the method comprising: reading stored data from the predetermined memory area, the stored data comprising a stored data block and an associated stored error detection value, manipulating, after reading the stored data, at least one of the stored data block and the associated stored error detection value in the predetermined memory area, and writing, after manipulating, the data to be stored to the predetermined memory area. | 07-15-2010 |
20100191933 | APPARATUS FOR PROCESSING DATA AND METHOD FOR GENERATING MANIPULATED AND RE-MANIPULATED CONFIGURATION DATA FOR PROCESSOR - Some embodiments comprise an apparatus for processing data, the apparatus having a second configurable processor configured to process data using second configuration data, and a configuration data re-manipulator configured to retrieve manipulated second configuration data and first data of a first processor, to re-manipulate the manipulated second configuration data depending on the first data, and to feed the re-manipulated second configuration data to the second configurable processor as the second configuration data. | 07-29-2010 |