Young Ju Kim
Young Ju Kim, Seoul KR
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20110037412 | LED LIGHTING DEVICE - A LED lighting device enables the assembly of one or more LED products in a variety of structures for a broad range of applications. In particular, one or more prefabricated individual water-resistant LED products are assembled in an attachable/detachable fixing frame in a variety of structures for use in a broad range of applications which include street lights, security lighting, tunnel lights, floodlights, etc. A further advantage of a LED lighting device is that it can be conveniently used with AC power, without the use of an AC/DC adapter or a stabilizer. | 02-17-2011 |
20110037520 | MULTISTAGE AMPLIFYING CIRCUIT - A multistage amplifying circuit includes a first amplifying circuit that either samples a first analog voltage input or amplifies a difference between the first analog voltage and a first digital voltage converted from the first analog voltage, in response to a control signal. A second amplifying circuit either samples a second analog voltage input or amplifies a difference between the second analog voltage and a second digital voltage converted from the second analog voltage, in response to the control signal. A common amplifier receives output voltages of the first amplifying circuit and the second amplifying circuit and either resets the output voltage of the first amplifying circuit and determines an output voltage by using the second amplifying circuit, or resets the output voltage of the second amplifying circuit and determines an output voltage by using the first amplifying circuit, in response to the control signal. | 02-17-2011 |
Young Ju Kim, Yongin-Si KR
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20080213487 | Multicomponent carbon nanotube-polymer complex, composition for forming the same, and preparation method thereof - A multicomponent carbon nanotube-polymer complex, a composition for forming the same, and a preparation method thereof are disclosed herein. A multicomponent carbon nanotube-polymer complex may include carbon nanotubes surface-modified with double bond-containing functional groups or carbon nanotubes surface-modified with oxirane groups and/or carbon nanotubes surface-modified with anhydride groups; a polymer binder; and/or acid-treated carbon nanotubes and/or pristine carbon nanotubes. The multicomponent carbon nanotube-polymer complex may exhibit remarkably improved mechanical and hardening properties, compared with conventional complexes using only carbon nanotubes and a polymer binder, and thus may be advantageously used as an electromagnetic wave shielding material and a conductive material. | 09-04-2008 |
20110031443 | Multicomponent carbon nanotube-polymer complex, composition for forming the same, and preparation method thereof - A multicomponent carbon nanotube-polymer complex, a composition for forming the same, and a preparation method thereof are disclosed herein. A multicomponent carbon nanotube-polymer complex may include carbon nanotubes surface-modified with double bond-containing functional groups or carbon nanotubes surface-modified with oxirane groups and/or carbon nanotubes surface-modified with anhydride groups; a polymer binder; and/or acid-treated carbon nanotubes and/or pristine carbon nanotubes. The multicomponent carbon nanotube-polymer complex may exhibit remarkably improved mechanical and hardening properties, compared with conventional complexes using only carbon nanotubes and a polymer binder, and thus may be advantageously used as an electromagnetic wave shielding material and a conductive material. | 02-10-2011 |
Young Ju Kim, Ichon KR
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20090091985 | INPUT CIRCUIT OF SEMICONDUCTOR MEMORY APPARATUS AND CONTROL METHOD OF THE SAME - An input circuit of a semiconductor memory apparatus includes a first frequency control unit which receives a first signal and a second frequency control unit which receives a second signal. The first frequency control unit outputs the first signal to the second frequency control unit in response to a test mode signal and generates a third signal which has a frequency higher than the frequencies of the first and second signals by using the first and second signals. Also, the second frequency control unit outputs the second signal to the first frequency control unit in response to the test mode signal and generates a fourth signal which has a frequency higher than the frequencies of the first and second signals by using the first and second signals. | 04-09-2009 |
20090094440 | PRE-FETCH CIRCUIT OF SEMICONDUCTOR MEMORY APPARATUS AND CONTROL METHOD OF THE SAME - A pre-fetch circuit of a semiconductor memory apparatus can carry out a high-frequency operating test through a low-frequency channel of a test equipment. The pre-fetch circuit of a semiconductor memory apparatus can includes: a pre-fetch unit for pre-fetching data bits in a first predetermined number; a plurality of registers provided in the first predetermined number, each of which latches a data in order or a data out of order of the pre-fetched data in response to different control signals; and a control unit for selectively activating the different control signals in response to a test mode signal, whereby some of the registers latch the data out of order. | 04-09-2009 |
20090150731 | TEST CIRCUIT CAPABLE OF SEQUENTIALLY PERFORMING BOUNDARY SCAN TEST AND TEST METHOD THEREOF - A boundary scan test circuit is capable of sequentially performing a boundary scan test with respect to semiconductor integrated circuits bonded to both surfaces of a memory board. In order to reduce a boundary scan test time, the boundary scan test circuit includes a mirror function unit which transmits data signals of a first group pin or data signals of a second group pin corresponding to the first group pin according to a mirror function enable signal, and a boundary scan test unit which receives the data signals of the mirror function unit to perform a boundary scan test. | 06-11-2009 |
20090207683 | INPUT CIRCUIT OF SEMICONDUCTOR MEMORY APPARATUS AND CONTROLLING METHOD THEREOF - Disclosed is an input circuit of a semiconductor memory apparatus. The input circuit includes a first buffer and a second buffer. The first buffer has an input terminal connected with a first input pin for receiving a control signal used in a multi-control mode for controlling an entire memory area by dividing the entire memory area, and an output terminal having a first level according to a control mode signal. The second buffer has an input terminal connected with a second input pin for receiving one of plural signals used in a single control mode for controlling the entire memory area without dividing the entire memory area, and an output terminal having a second level according to the control mode signal. | 08-20-2009 |
20120033523 | INPUT CIRCUIT OF SEMICONDUCTOR MEMORY APPARATUS AND CONTROLLING METHOD THEREOF - Disclosed is an input circuit of a semiconductor memory apparatus. The input circuit includes a first buffer and a second buffer. The first buffer has an input terminal connected with a first input pin for receiving a control signal used in a multi-control mode for controlling an entire memory area by dividing the entire memory area, and an output terminal having a first level according to a control mode signal. The second buffer has an input terminal connected with a second input pin for receiving one of plural signals used in a single control mode for controlling the entire memory area without dividing the entire memory area, and an output terminal having a second level according to the control mode signal. | 02-09-2012 |
Young Ju Kim, Icheon-Si KR
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20130265033 | TEST CIRCUIT AND SEMICONDUCTOR APPARATUS INCLUDING THE SAME - A test circuit includes a through via test unit configured to be set to a first resistance value in response to a first test control signal and to a second resistance value in response to the first test control signal and a second test control signal, and form a current path including a through via that electrically connects a first chip and a second chip; and a test measurement unit configured to supply a test voltage to the through via and measure a current flowing through the through via. | 10-10-2013 |
20140043884 | SEMICONDUCTOR APPARATUS - A semiconductor apparatus includes a memory chip which includes: a memory area; a data input/output block configured to communicate with the memory area; and a data transmission/reception block configured to connect one of a plurality of channels and a pad to the data input/output block, wherein the plurality of channels are configured to input and output normal data to and from another chip, and the pad is configured to input and output test data. | 02-13-2014 |
Young Ju Kim, Icheon-Si Gyeonggi-Do KR
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20140169118 | ADDRESS INPUT CIRCUIT OF SEMICONDUCTOR APPARATUS - An address input circuit of a semiconductor device includes: an address latch unit configured to generate latch addresses, by latching addresses sequentially provided by an external, according to a command decoding signal, wherein latch timings of each of the addresses are adjusted differently from one another; and a command decoder configured to decode a command provided from the external and generate the command decoding signal. | 06-19-2014 |
Young Ju Kim, Cheongju-Si KR
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20150041894 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor device capable of increasing a breakdown voltage without an additional epitaxial layer or buried layer with respect to a high-voltage horizontal MOSFET. | 02-12-2015 |