Patent application number | Description | Published |
20090213760 | WIRELESS COMMUNICATION SYSTEM FOR INTERCONNECTING AD-HOC NETWORK AND INFRASTRUCTURE NETWORK, AND WIRELESS TERMINAL AND COMMUNICATION METHOD THEREFOR - A wireless communication system for interconnecting an ad-hoc network and an IS network, and a wireless terminal and communication method therefor are disclosed. The communication method includes transmitting a discovery signal including terminal information of the wireless terminal to a radio network, receiving a response signal including information for network access from a base station or another wireless terminal, which has received the discovery signal, selecting an operation mode for access to a network through the base station or the other wireless terminal, based on the response signal, communicating with the base station and accessing the IS network when the selected operation mode corresponds to a first mode and accessing a network, to which the other wireless terminal belongs, through a licensed frequency band of the IS network when the selected operation mode corresponds to a second mode. Accordingly, it is possible to support communication through an existing infrastructure and support communication of an ad-hoc network scheme, through use of a licensed frequency band assigned to the provider of an existing IS network. | 08-27-2009 |
20110009112 | MULTIFUNCTION REMOTE CONTROL DEVICE FOR MOBILE TERMINAL AND METHOD USING THE SAME - A method and apparatus are provided for a multifunction remote control device, allows a user to display the contents of a mobile terminal on a larger screen, while retaining use of the mobile terminal's other functions. The method includes checking whether the mobile terminal is connected to the multifunction remote control device, running a multi-screen mode for composing a service environment in which control and call connection functions of the mobile terminal are executable, by implementing a wireless interface of the mobile terminal, and controlling basic functions and additional functions of the mobile terminal. | 01-13-2011 |
20110009166 | SYSTEM AND METHOD FOR PROVIDING MULTI-SCREEN SERVICE OF MOBILE TERMINAL - Disclosed is a method for providing multi-screen service of a mobile terminal, the method including requesting and obtaining information on a second display device if the mobile terminal is connected with a cradling stand; activating a predetermined wireless communication interface and searching for a peripheral device using a network manager so as to connect the mobile terminal with the peripheral device; if the multifunctional remote control device is found and is connected with the mobile terminal, managing linkage between the mobile terminal and the multifunctional remote control device using an interaction manager; and if a service request signal is received from the multifunctional remote control device for the mobile terminal, changing screen information of the mobile terminal in accordance with characteristics of the second display device using a display manager and displaying the changed screen information on a display unit of the second display device. | 01-13-2011 |
20110128511 | FOLDING-TYPE PORTABLE DEVICE - Disclosed is a folding-type portable device. The folding-type portable device includes a first body having an abutment for cradling a portable terminal; a second body rotatably connected to the first body through a first hinge, so that the second body is folded or unfolded in relation to the first body, the second body being rotated to a predetermined angle in relation to the first body, thereby supporting the first body in a tilted state; and an optical module connected to the second body through a second hinge in such a manner that the optical module can be independently rotated, the optical module having a lens which is exposed or hidden depending on whether the optical module is rotated. The portable device may be used as an assistant portable device for extending functionality of a portable terminal. | 06-02-2011 |
20130190046 | SYSTEM AND METHOD FOR PROVIDING MULTI-SCREEN SERVICE OF MOBILE TERMINAL - A method for providing a multi-screen service is provided. The method includes transmitting, by a remote control device, a control signal to a cradling stand, receiving, by a mobile phone, the control signal from the remote control device via the cradling stand, and in response to the control signal, transmitting screen information to an external display device via the cradling stand, wherein the mobile phone is to transmit call information to the external display device via the cradling stand if a call is received. | 07-25-2013 |
20140028458 | ELECTRONIC DEVICE FOR PROVIDING CONTENT ACCORDING TO USER'S POSTURE AND CONTENT PROVIDING METHOD THEREOF - A content providing method in an electronic device includes reproducing an image of content; obtaining information regarding a posture of a user based on an image of the user; determining whether the posture of the user is acceptable based on the obtained information regarding the posture of the user; and controlling reproduction of the content according to a result of the determination. | 01-30-2014 |
20140189589 | DISPLAY APPARATUS AND CONTROL METHOD THEREOF - A display apparatus is provided. The display apparatus includes a display section, a communicating section configured to communicate with an external display apparatus, a storage section configured to store a plurality of objects, and a controller configured to display a user interface for selection and combination of the plurality of objects stored in the storage section according to a command of a user to generate a scene of content, and to transmit information relating to the scene to the external display apparatus through the communicating section so that the same image as the scene is displayed in the external display apparatus in real time while the scene is being generated through the user interface. | 07-03-2014 |
Patent application number | Description | Published |
20100315253 | Apparatus and method for motion detection in portable terminal - A portable terminal includes an apparatus for improving motion detection capability. More particularly, the apparatus improves motion detection capability by changing a motion in a normal state according to a motion state or by changing a motion detection process in the portable terminal in order to avoid motion detection capability deterioration in the portable terminal are provided. The apparatus includes a terminal state determiner that determines a motion state of the terminal by receiving sensing information for determining the motion state, and a controller that changes a motion detection process according to the portable terminal's motion state determined by the terminal state determiner. | 12-16-2010 |
20110060522 | Apparatus and method for providing location information service in portable terminal - An apparatus and method provides a location information service in a portable terminal when the predicted location is reliable. The apparatus includes a validity determiner for, by a moving pattern of a user, determining the validity of location information previously predicted using Pedestrian Dead Reckoning (PDR) information. | 03-10-2011 |
20110176734 | APPARATUS AND METHOD FOR RECOGNIZING BUILDING AREA IN PORTABLE TERMINAL - An apparatus and method for recognizing a specific area of an image in a portable terminal. More particularly, an apparatus and method are for determining feature points with very high similarities as one group when the portable terminal recognizes a building included in an image or a picture, and for estimating a matching relation of the group to improve building recognition performance. The apparatus includes an image analyzer configured to, upon extracting feature points used for building recognition, classify feature points with similarities among the extracted feature points into a group, and recognize a building after estimating a matching relation by regarding the classified group as a feature point. | 07-21-2011 |
20110291884 | METHOD AND APPARATUS FOR DETERMINING ACCURACY OF LOCATION INFORMATION - A method and apparatus for determining accuracy information of location information. The method includes receiving Global Positioning System (GPS) location information of a user terminal from a GPS, determining whether the user terminal enters into a GPS shadow area, checking terminal movement information including a moving speed and a moving direction of the user terminal, when the user terminal enters into the GPS shadow area, estimating location information of the user terminal based on the terminal movement information, checking auxiliary location information including a moving state of the user terminal, error information of a terrestrial magnetism sensor, and the moving speed of the user terminal, and determining the accuracy information based on an accumulated location error of the estimated location information, based on the auxiliary location information. | 12-01-2011 |
20130237248 | APPARATUS AND METHOD FOR PROVIDING LOCATION INFORMATION - A method and apparatus for providing location information are provided. The method includes estimating location information is estimated, calculating an error value of the estimated location information, controlling activation of a location determination module according to the error value, and providing location information using at least one of the estimated location information and location information determined by the location determination module. | 09-12-2013 |
Patent application number | Description | Published |
20080280989 | Hydroxybenzamide Derivatives, the Method For Preparing Thereof and the Cosmetic Composition Containing the Same - Disclosed is a hydroxybenzamide derivative represented by the following Formula. A method for preparing the same and a cosmetic composition comprising the same are also disclosed. More particularly, the hydroxybenzamide derivative is obtained by reacting a hydroxybenzoic acid having a protecting group introduced thereto with a hydroxyphenyl amine to form a benzamide derivative and by hydrolyzing the benzamide derivative in an aqueous base solution to form a hydroxybenzamide derivative. The cosmetic composition comprising the hydroxybenzamide derivative as an active ingredient has excellent anti-oxidative, anti-aging and skin wrinkle-alleviating effects. wherein R1 represents a C1˜C10 alkyl group, and n is an integer ranging from 1 to 3. | 11-13-2008 |
20110123583 | MULTI-LAYERED LAMELLAR GRANULE AND SKIN EXTERNAL APPLICATION COMPOSITION CONTAINING SAME - Provided are: a multi-layered lamellar granule comprising a nucleating agent, a ceramide-containing artificial stratum corneum lipid lamellar layer which encases the nucleating agent and a polymer layer disposed on the artificial stratum corneum lipid lamellar layer; and an external skin application composition comprising the same. The external skin application composition shows improved moisturizing and barrier repair capabilities when applied to the skin, which can be advantageously used in cosmetics and pharmaceuticals. | 05-26-2011 |
20120141613 | COMPOSITION CONTAINING A NATURAL EXTRACT - Disclosed is a composition containing an active ingredient or ingredients comprising an extract or extracts of one or more constituents selected from the group consisting of | 06-07-2012 |
20120149773 | COMPOSITION FOR SKIN IMPROVEMENT COMPRISING HEXAMIDINES AND RETINOIDS - Disclosed is herein a composition comprising hexamidines, derivatives thereof, or pharmaceutically acceptable salts thereof; and retinoids, derivatives thereof, or pharmaceutically acceptable salts thereof, as an active ingredient. The composition of the present invention has effects for preventing, improving or treating acne; controlling sebum; pore-controlling; and preventing, improving or treating skin pigmentation. Also, the composition of the present invention could alleviate skin-irritations caused with retinoids by including ceramides. | 06-14-2012 |
20130018020 | INHIBITOR FOR MELANIN, AND COSMETIC COMPOSITION CONTAINING SAMEAANM Shin; Hong JuAACI Seongnam-siAACO KRAAGP Shin; Hong Ju Seongnam-si KRAANM Kim; Do HoonAACI SeoulAACO KRAAGP Kim; Do Hoon Seoul KRAANM Kim; Jeong HwanAACI Paju-siAACO KRAAGP Kim; Jeong Hwan Paju-si KRAANM Koh; Hyun JuAACI Anyang-siAACO KRAAGP Koh; Hyun Ju Anyang-si KRAANM Park; Won SeokAACI SeoulAACO KRAAGP Park; Won Seok Seoul KR - The present invention relates to a melanin production inhibitor containing, as active ingredients, tranexamic acid and nicotinic acid amide, which inhibits the formation of skin melanocytes, and to a cosmetic composition which contains the melanin production inhibitor as an active ingredient and has the effects of reducing liver spots, blemishes, freckles and post-inflammatory hyperpigmentation, improving skin tone and texture and whitening the skin. | 01-17-2013 |
20130164391 | COMPOSITION CONTAINING PRUNUS MUME EXTRACT FOR EXTERNAL APPLICATION TO SKIN - The present disclosure provides a composition for external application to the skin for skin care after laser treatment, which contains | 06-27-2013 |
Patent application number | Description | Published |
20090016436 | Method for Image Prediction of Multi-View Video Codec and Computer-Readable Recording Medium Thereof - In a method for image prediction of a multi-view video codec, a disparity vector value of a current macroblock is obtained and a corresponding macroblock is searched through the obtained disparity vector value. An intra prediction coding direction value of the searched macroblock is determined as an intra prediction coding direction value of the current macroblock. The current macroblock is coded/decoded through the determined intra prediction coding direction value. The coding efficiency can be increased by reducing a coding amount by omitting a process of obtaining an unnecessary disparity value by using a different-view intra prediction coding direction as a current-view intra prediction coding direction. The coding efficiency can be increased by reducing a coding amount by differentially coding a similar disparity vector. The reliability can be increased through an accurate disparity using multiples of 8 rather than 16, in motion skip for sharing the format of a macroblock. | 01-15-2009 |
20100289876 | STEREOSCOPIC VIDEO FILE FORMAT AND COMPUTER READABLE RECORDING MEDIUM IN WHICH STEREOSCOPIC VIDEO FILE IS RECORDED ACCORDING THERETO - The present invention relates to a stereoscopic video file format capable of improving bit efficiency and processing efficiency and a computer-readable recording medium in which the corresponding stereoscopic video file are recorded. The present invention includes: a file type box that stores file format information and information indicating whether or not to include monoscopic data; a movie box that stores a plurality of trak boxes configuring stereoscopic video streams; a media data box that stores multimedia resources; a stereoscopic video media information box that stores at least one common stereoscopic video stream arrangement information; a stereoscopic camera and display information reference box that stores camera parameter and recommendation display information referenced by the plurality of trak boxes; a stereoscopic camera and display information box that exists at each stereoscopic image frame of the stereoscopic video stream and stores reference information of the stereoscopic camera and display information reference box; and a meta box that stores metadata, thereby making it possible to minimize overlapping data and optimizing a configuration of a file format in a simple form. | 11-18-2010 |
20110243250 | DEVICE AND METHOD FOR ENCODING/DECODING - An apparatus and a method for encoding/decoding video data are disclosed. In one embodiment, the decoding apparatus includes: i) a toolbox unit configured to store a plurality of functional units, ii) a separation unit configured to receive a decoder description and separate the decoder description into schema information and connection control information and output the schema information and the connection control information. The decoding apparatus may further include iii) a parser configured to parse and output input bitstream by using the schema information, iv) a decoder forming unit configured to load and connect pertinent functional units from the toolbox unit based on the connection control information and to form a reconfigured decoder; and v) a decoding solution configured to decode the bitstream outputted from the parser by using the reconfigured decoder. At least one embodiment can reconfigure a decoder in various form by using the decoder description. | 10-06-2011 |
20120183148 | SYSTEM FOR MULTICHANNEL MULTITRACK AUDIO AND AUDIO PROCESSING METHOD THEREOF - A multichannel multitrack audio system and an audio processing method are provided. The audio processing method down-mixes and encodes a first audio object constituting the audio from multiple channels to a lower number of channels. Thus, the method for down-mixing audio objects of the audio from the multichannel to the lower number of channels generates the multichannel multi-object audio and reproduces the generated multichannel multi-object audio. Abrupt data increase can be addressed in processing the multichannel multi-object audio. | 07-19-2012 |
20120291052 | MULTIMEDIA DATA PROCESSING METHOD - Disclosed is a multimedia data processing method by a framework, in which the framework is capable of directly controlling data input and output of components in a state of the framework being interposed between the components and an application program, thereby reducing the time and effort involved in developing the components or the application program. | 11-15-2012 |
20120299929 | MULTIMEDIA-DATA-PROCESSING METHOD - The present invention relates to a multimedia-data-processing method which enables a media graph to always be constructed in a “connection without negotiation” manner, on the basis of an already known media graph construction, and thus provides a media framework in which procedures for connecting components are minimized, thereby improving the performance of a system and satisfying the requests of an OS platform builder and a media application developer. The multimedia-data-processing method of the present invention is performed by a multimedia framework, and comprises: (a) a step of receiving component information required for the construction of the media graph and component connection information from a media application; and (b) a step of ensuring that the media graph is constructed by the content received in step (a), and that the media graph waits for a rendering command, thereby eliminating the necessity of permitting the media application to check the construction of the media graph. | 11-29-2012 |
20130021440 | DATA CODEC METHOD AND DEVICE FOR THREE DIMENSIONAL BROADCASTING - Disclosed are a data modulation method and a data modulation system for 3D broadcasting, and more particularly, are a method and a system for maintaining a conventional 2D broadcasting service while providing a 3D broadcasting service. A 3D broadcasting service method includes generating a data frame including existence or nonexistence of 3D data, a header including information on codec types of a left image and a right image, a right image stream, and a left image stream, and transmitting the generated data frame. | 01-24-2013 |
20130093843 | METHOD FOR CONFIGURING STEREOSCOPIC MOVING PICTURE FILE - Disclosed is a method for configuring a stereoscopic moving picture file. According to one embodiment of the present invention, the method for configuring a stereoscopic moving picture file is to analyze a plurality of right and left images which constitute a stereoscopic moving picture, and to obtain disparity information and depth information of the stereoscopic moving picture file. Then, biostability information for the stereoscopic moving picture file is set using at least one piece of information obtained from the disparity information and depth information, and the set biostability information is included in the coded data of the stereoscopic moving picture. | 04-18-2013 |
20130242050 | METHOD FOR PROVIDING AND RECOGNIZING TRANSMISSION MODE IN DIGITAL BROADCASTING - The present invention relates to a method for selecting an appropriate mode when performing a new broadcast, such as a 3D stereo broadcast, a UHDTV broadcast, and a multi-view broadcast, among others, while maintaining compatibility with existing broadcasting channels in an MPEG-2-TS format for transmitting and receiving digital TV, and to a method for recognizing a descriptor. To this end, the present invention suggests providing the descriptor which is related to synthesizing left and right images using the type of stream, existence of the descriptor, and a frame-compatible mode flag. | 09-19-2013 |
20140168364 | METHOD FOR SERVICE COMPATIBILITY-TYPE TRANSMITTING IN DIGITAL BROADCAST - The present invention relates to a method for making 3D stereo digital broadcast service compatible in an MPEG-2-TS format which is used for transmitting and receiving digital TV. To this end, suggested is a method for transmitting detailed information which supports both TS-level multiplexing and ES-level multiplexing when left and right compressed bitstreams are multiplexed, when service compatibility is enabled. | 06-19-2014 |
20140355680 | METHOD FOR IMAGE PREDICTION OF MULTI-VIEW VIDEO CODEC AND COMPUTER READABLE RECORDING MEDIUM THEREFOR - Provided are a method for image prediction of a multi-view video codec capable of improving coding efficiency, and a computer readable recording medium therefor. The method for image prediction of a multi-view video codec includes partitioning an image to a plurality of base blocks, acquiring information of reference images which are temporally different, acquiring information of reference images which have different views, and predicting a target block based on the acquired information. Accordingly, an image that is most similar to an image of a view to be currently compressed is generated using multiple images of different views, so that coding efficiency can be improved. | 12-04-2014 |
Patent application number | Description | Published |
20090154734 | METHOD FOR FABRICATING MICRO SPEAKER AND MICRO SPEAKER FABRICATED BY THE SAME - A method for fabricating a micro speaker is provided, including forming a package wafer and a device wafer by batch processing, bonding the package wafer and the device wafer to each other, and forming a diaphragm by isotropic-etching a back surface of the device wafer using a xenon difluoride (XeF | 06-18-2009 |
20100133077 | MEMS RF-SWITCH USING SEMICONDUCTOR - A MEMS RF-switch is provided for controlling switching on/off of transmission of AC signals. The MEMS RF-switch of the present invention includes: a first electrode coupled to one terminal of the power source; a semiconductor layer combined with an upper surface of the first electrode, and forming a potential barrier to become insulated when a bias signal is applied from the power source; and a second electrode disposed at a predetermined distance away from the semiconductor layer, and being coupled to the other terminal of the power source, wherein the second electrode contacts the semiconductor layer when a bias signal is applied from the power source. Therefore, although the bias signal may not be cut off, free electrons and holes are recombined in the semiconductor layer, whereby charge buildup and sticking can be prevented. | 06-03-2010 |
20100225990 | MICRO THIN-FILM STRUCTURE, MEMS SWITCH EMPLOYING SUCH A MICRO THIN-FILM, AND METHOD OF FABRICATING THEM - A micro thin-film structure, a micro electro-mechanical system (MEMS) switch, and methods of fabricating them. The micro thin-film structure includes at least two thin-films having different properties and laminated in sequence to form an upper layer and a lower layer, wherein an interface between the upper and lower layers is formed to be oriented to at least two directions. The micro thin film structure, and method of forming, may be applied to a movable electrode of an MEMS switch. The thin-film structure may be formed by forming through-holes in the lower layer, and depositing the upper layer in the form of being engaged in the through-holes. Alternatively, the thin-film structure may be made by forming prominence and depression parts on the top side of the lower layer and then depositing the upper layer on the top side of the lower layer having the prominence and depression parts. | 09-09-2010 |
20100225991 | MICRO THIN-FILM STRUCTURE, MEMS SWITCH EMPLOYING SUCH A MICRO THIN-FILM, AND METHOD OF FABRICATING THEM - A micro thin-film structure, a micro electro-mechanical system (MEMS) switch, and methods of fabricating them. The micro thin-film structure includes at least two thin-films having different properties and laminated in sequence to form an upper layer and a lower layer, wherein an interface between the upper and lower layers is formed to be oriented to at least two directions. The micro thin film structure, and method of forming, may be applied to a movable electrode of an MEMS switch. The thin-film structure may be formed by forming through-holes in the lower layer, and depositing the upper layer in the form of being engaged in the through-holes. Alternatively, the thin-film structure may be made by forming prominence and depression parts on the top side of the lower layer and then depositing the upper layer on the top side of the lower layer having the prominence and depression parts. | 09-09-2010 |
20120150041 | CELL AND CHANNEL OF ULTRASONIC TRANSDUCER, AND ULTRASONIC TRANSDUCER INCLUDING THE SAME - A cell of an ultrasonic transducer is provided. The cell includes a substrate; a supporting portion disposed on the substrate; a thin film spaced apart from the substrate and the supporting portion; and a connection portion which connects the supporting portion and the thin film. The connection portion may include a deformation portion that is elastically deformable. A channel of the ultrasonic transducer includes a plurality of cells arranged in an array. The ultrasonic transducer includes a plurality of channels arranged in an array. | 06-14-2012 |
20130026655 | CHIP PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME - A chip package structure includes a substrate in which a plurality of grooves are formed, an adhesive layer disposed on the substrate, and a plurality of chips attached to the adhesive layer. In addition, a method of fabricating the chip package structure includes forming a plurality of grooves in the substrate, dispensing a die attach material on a plurality of chip attaching regions between the plurality of grooves, and attaching a plurality of chips respectively on the plurality of chip attaching regions. | 01-31-2013 |
20130169110 | ULTRASONIC TRANSDUCER STRUCTURE, ULTRASONIC TRANSDUCER, AND METHOD OF MANUFACTURING ULTRASONIC TRANSDUCER - An ultrasonic transducer structure, an ultrasonic transducer, and a method of manufacturing the ultrasonic transducer are provided. The ultrasonic transducer structure includes a driving wafer that includes a driving circuit; and an ultrasonic transducer wafer that is disposed on the driving wafer and includes a first wafer in which a via-hole is formed, a first insulating layer formed on the first wafer, a second wafer spaced apart from the first insulating layer, and a cavity formed between the first insulating layer and the second wafer. | 07-04-2013 |
Patent application number | Description | Published |
20090239595 | MULTI-BAND BUILT-IN ANTENNA - A multi-band built-in antenna for a portable wireless terminal is provided. In the multi-band built-in antenna, a first radiation part processes signals of a first frequency band. A second radiation part, spaced apart from the first radiation part and electrically connected to the first radiation part, processes signals of a second frequency band lower than the first frequency band. And, a sub-radiator is electrically connected to the second radiation part and the sub-radiator is movable. | 09-24-2009 |
20110296416 | METHOD AND APPARATUS FOR MANAGING AN APPLICATION BEING EXECUTED IN A PORTABLE TERMINAL - A method and an apparatus are provided for preventing battery power consumption and degradation of system performance due to the system resources being utilized by applications being executed, while providing a multi-tasking function through a plurality of applications. In the method, when a plurality of applications are executed, such execution of the plurality of applications is reported to the user, so as to enable the user to terminate one or more applications, thereby preventing unnecessary consumption of battery power. | 12-01-2011 |
20110296417 | METHOD AND APPARATUS FOR MANAGING AN APPLICATION BEING EXECUTED IN A PORTABLE TERMINAL - A method and an apparatus are provided for preventing battery power consumption and degradation of system performance due to the system resources being utilized by applications being executed, while providing a multi-tasking function through a plurality of applications. In the method, when a plurality of applications are executed, such execution of the plurality of applications is reported to the user, so as to enable the user to terminate one or more applications, thereby preventing unnecessary consumption of battery power. | 12-01-2011 |
20110296418 | METHOD AND APPARATUS FOR MANAGING AN APPLICATION BEING EXECUTED IN A PORTABLE TERMINAL - A method and an apparatus are provided for preventing battery power consumption and degradation of system performance due to the system resources being utilized by applications being executed, while providing a multi-tasking function through a plurality of applications. In the method, when a plurality of applications are executed, such execution of the plurality of applications is reported to the user, so as to enable the user to terminate one or more applications, thereby preventing unnecessary consumption of battery power. | 12-01-2011 |
Patent application number | Description | Published |
20100313781 | FEEDFORWARD CONTROL OF DOWNSTREAM REGISTER ERRORS FOR ELECTRONIC ROLL-TO-ROLL PRINTING SYSTEM - The present invention relates, in general, to a continuous roll-to-roll printing method for manufacturing electronic devices, and, more particularly, to an ultra-precision register control method in a continuous roll-to-roll printing process for manufacturing electronic devices, which compensates for register errors attributable to variations in the speed of upstream printing cylinders by using a feedforward control logic, thus eliminating additional register errors. The ultra-precision register control method in a continuous roll-to-roll printing process for manufacturing electronic devices, register errors, attributable to variations in speed of upstream printing cylinders are compensated for using feedforward control logic. According to the present invention, the effect of compensating for only the register errors of a current span is obtained, and thus there is an excellent advantage in that precise register control of a printing system can be realized compared to the case using typical feedback control logic. | 12-16-2010 |
20110052792 | METHOD FOR PRINTING ELECTRONIC DEVICE USING MATCHING LOGIC AND METHOD FOR MANUFACTURING RFID TAG USING THE SAME - A method of producing an electronic device by a roll-to-roll printing process using matching logic, and a method of producing a RFID (radio frequency identification) tag. The method, which enables mass production of inexpensive printable electronic devices, includes: determining specs of the electronic device; determining matching conditions including substrate, ink and process conditions using impedance matching, chemical matching, process matching, geometry matching, mechanical matching, and time matching in view of the specs of the electronic device; printing using a roll-to-roll printing process under the matching conditions; examining a state of printed lines before and after drying; examining conductivity of the printed lines after curing and checking any breakage or short-circuit of the printed lines; testing final performance of the electronic device; and repeating the steps of determining matching conditions when any of the printed states, the conductivity, or the final performance is not within respective predetermined error tolerance ranges. | 03-03-2011 |
20110120329 | METHOD AND APPARATUS FOR ROLL-TO-ROLL TYPE PRINTING - A method and apparatus for high-speed roll-to-roll printing, ensuring high-precision printing previously available only under a static condition. In the present invention, a pattern mask is wound on a print roll, and an ink injector and the roll are configured to maintain a substantially zero linear speed difference between the pattern mask and a print substrate at the moment the ink injector injects ink onto the print substrate through a perforated pattern in the pattern mask. The ink injector may be mounted on the print roll, may rotate separately from the rotating roll with a different rotational speed and direction, and may axially move to ensure no relative movement existing between the pattern mask and the substrate at the moment of printing. The roll may move linearly in the same direction as the substrate. A position sensor may be employed for more precise alignment between substrates in a multilayer printing. | 05-26-2011 |
20110159628 | SYSTEM AND METHOD FOR PRODUCING FLEXIBLE DYE-SENSITIZED SOLAR CELLS BY A ROLL-TO-ROLL PRINTING PROCESS - A system and a method for mass production of Dye-Sensitized Solar Cells at low cost via a continuous roll-to-roll process. While a flexible conductive substrate is constantly in transit on a conveyor, a titanium dioxide (TiO | 06-30-2011 |
20110203472 | FEEDFORWARD CONTROL OF DOWNSTREAM REGISTER ERRORS FOR ELECTRONIC ROLL-TO-ROLL PRINTING SYSTEM - An ultra-precision register control method in a continuous roll-to-roll printing process for manufacturing electronic devices via a feedforward register control logic, which compensates for and eliminates additional register errors attributable to variations in the speed of upstream printing cylinders. When used in combination with a conventional feedback register control logic, the feedforward register control logic accomplishes a register control with ultra-precision in a continuous roll-to-roll printing process, and enables implementation of a continuous roll-to-roll printing process for manufacturing electronic devices, for which a roll-to-roll printing process was formerly unavailable. | 08-25-2011 |
Patent application number | Description | Published |
20090035486 | Sealants and display device including the same - A sealant is provided. The sealant includes an acrylic type compound having at least two acrylic groups per one molecule, an epoxy type compound having at least one epoxy group per one molecule, and a dihydrazide compound. The dihydrazide compound includes 4-isopropyl-2,5-dioxoimidazolidin-1,3-di(propyonohydrazide) and adipic acid dihydrazide. A display device is also provided. The display device includes a pair of substrates and a sealing pattern between the pair of substrates. The sealing pattern includes the sealant. | 02-05-2009 |
20090310069 | LIQUID CRYSTAL DISPLAY - A liquid crystal display includes a lower panel, an upper panel facing the lower panel and including a plurality of red color filters, green color filters, and blue color filters, and a liquid crystal layer interposed between the lower and upper panels. The liquid crystal layer has first, second and third cell-gap portions corresponding to the red, green and blue filters, respectively, and the first second and third cell-gap portions have cell gaps Dr, Dg and Db, respectively. A first compensation film is disposed on an outer surface of one of the lower panel or the upper panel. A lower polarizer is on the outer surface of the lower panel and an upper polarizer is on the outer surface of the upper panel. The cell gaps Dr, Dg and Db may satisfy the equation 0 μm≦Dg−Db and Dr−Dg≦0.5 μm. | 12-17-2009 |
20090316095 | DISPLAY DEVICE FOR INCREASING VIEWING ANGLE - A display device includes a display panel, a first optical unit, and a second optical unit. The display panel includes a first substrate, a second substrate, and a liquid crystal layer disposed between the first substrate and the second substrate. The liquid crystal layer is operated in a vertical alignment mode. The first optical unit includes a C-plate and a first polarization plate having a first absorption axis. The second optical unit includes a positive A-plate, a negative A-plate, and a second polarization plate having a second absorption axis substantially perpendicular to the first absorption axis. The positive A-plate and the negative A-plate may gather dispersed polarization states of a colored light. | 12-24-2009 |
20100053521 | LIQUID CRYSTAL DISPLAY AND METHOD FOR MANUFACTURING THE SAME - The present invention relates to compensation films of a vertically-aligned liquid crystal display. Upper and lower compensation films asymmetrically differ in refractive index from each other. | 03-04-2010 |
20100297338 | LIQUID CRYSTAL PANEL, PRINT MASK TO PRINT ALIGNMENT LAYER AND METHOD FOR MAKING THE ALIGNMENT LAYER - The present invention relates to a liquid crystal panel, a print mask to print an alignment layer and a method for making the alignment layer. According to embodiments of the present invention, a liquid crystal panel divided into an active area and a peripheral area comprises a first substrate; a second substrate opposing the first substrate; a liquid crystal arranged between the first substrate and the second substrate, a first alignment layer formed on the first substrate and having at least one first slit; and a seal pattern formed in the peripheral area on the first substrate to bind the first substrate with the second substrate, wherein the first slit is formed between the seal pattern and the active area. Embodiments also include a method for making the alignment layer. In another embodiment, a print mask for the alignment layer includes a base film; and a print pattern layer formed on the base film, the print pattern layer having at least one slit pattern formed in an edge region of the print pattern layer. | 11-25-2010 |
20140192306 | Alignment layer and liquid crystal display having the same - Disclosed are an alignment layer and a liquid crystal display having the same. The alignment layer comprises a polyimide compound having an azo group and exhibiting optical alignment characteristics and a discotic liquid crystal compound exhibiting optical anisotropy. The liquid crystal display comprises first and second substrates facing each other, liquid crystal aligned between the first and second substrates, and an alignment layer formed on at least one surface of the first and second substrates. The alignment layer is adjacent to the liquid crystal and has optical alignment characteristics and optical anisotropy. | 07-10-2014 |
20140211142 | LIQUID CRYSTAL DISPLAY HAVING MULTIPLE PIXEL REGIONS FOR IMPROVED TRANSMITTANCE - A liquid crystal display according to an exemplary embodiment of the present invention includes: a first substrate; a first subpixel electrode positioned on the first substrate and configured to receive a first voltage; a second subpixel electrode positioned on the first substrate and configured to receive a second voltage; an insulating layer positioned between the first subpixel electrode and the second subpixel electrode; a second substrate facing the first substrate; and a common electrode positioned on the second substrate. A portion of the first subpixel electrode and a portion of the second subpixel electrode overlap each other with the insulating layer interposed therebetween, and a difference between the first voltage and a common voltage is larger than a difference between the second voltage and the common voltage. | 07-31-2014 |
20140267962 | LIQUID CRYSTAL DISPLAY - A liquid crystal display according to an exemplary embodiment of the present disclosure includes a gate line positioned on a first substrate; a data line positioned on the first substrate that crosses the gate line and includes a first data line and a second data line which are positioned at the left and right for every unit pixel, respectively; and a shielding electrode that extends parallel to the data line and overlaps a portion between the second data line of the first pixel and the first data line of the second pixel. The unit pixel includes a first pixel and a second pixel adjacent to the first pixel and the second data line of the first pixel is adjacent to the first data line of the second pixel. | 09-18-2014 |
20140267994 | LIQUID CRYSTAL DISPLAY - The present invention relates to a liquid crystal display including: a lower electrode including a unit pixel electrode; an upper electrode including an upper unit electrode facing the unit pixel electrode; and a liquid crystal layer between the lower electrode and the upper electrode and including a plurality of liquid crystal molecules aligned approximately perpendicular to the surfaces of the lower electrode and the upper electrode in the absence of an electric field, wherein the unit pixel electrode includes a stem forming a boundary between a plurality of sub-regions and a plurality of minute branches extending in different directions in two different sub-regions, the upper unit electrode includes an opening facing the stem and extending parallel to the stem, any alignment aid to pretilt the liquid crystal molecules is absent, and a length of the minute branches is equal to or less than about 53 μm. | 09-18-2014 |
20140267996 | LIQUID CRYSTAL DISPLAY DEVICE - A liquid crystal display device includes: a first substrate; a second substrate disposed opposite to the first substrate; a liquid crystal layer disposed between the first substrate and the second substrate and including liquid crystal molecules vertically aligned when an electric field is not generated in the liquid crystal layer; and pixels, each of which includes a first subpixel and a second subpixel, where each of the first subpixel and the second subpixel includes: a first electrode disposed on the first substrate and having a planar shape; a second electrode disposed opposite to and spaced apart from the first electrode and including a linear electrode; and a third electrode disposed on the second substrate and having a planar shape, and a voltage applied to the second electrode of the first subpixel and a voltage applied to the second electrode of the second subpixel are different from each other. | 09-18-2014 |
20140340623 | LIQUID CRYSTAL DISPLAY - A liquid crystal display includes: a first substrate; a second substrate disposed opposite to the first substrate; a liquid crystal layer interposed between the first substrate and the second substrate, and including liquid crystal molecules; a first pixel electrode and a second pixel electrode, which are disposed on the first substrate, spaced apart from each other, and positioned in one pixel area; a common electrode disposed on the second substrate; and an insulating layer disposed on the common electrode, in which the liquid crystal molecules are aligned substantially vertical to a surface of the first substrate and a surface of the second substrate when an electric field is not applied thereto, and the liquid crystal molecules have positive dielectric anisotropy. | 11-20-2014 |
20150029455 | LIQUID CRYSTAL DISPLAY AND MANUFACTURING METHOD THEREOF - A liquid crystal display includes a thin film transistor panel including a first alignment layer, an opposing panel including a second alignment layer, and opposite to the thin film transistor panel, and a liquid crystal layer between the thin film transistor panel and the opposing panel, and including liquid crystal molecules, wherein a difference between a pretilt angle provided by the first alignment layer and a pretilt angle provided by the second alignment layer is equal to or greater than about 0.8 degree. | 01-29-2015 |
20150042917 | LIQUID CRYSTAL DISPLAY - A liquid crystal display includes: a first subpixel electrode disposed on a first substrate; an insulating layer disposed on the first subpixel electrode; a second subpixel electrode disposed on the insulating layer; and a common electrode disposed on a second substrate, the second substrate facing the first substrate. The first subpixel electrode is overlapped with a portion of the second subpixel electrode, and the first subpixel electrode and the second subpixel electrode are configured to receive substantially the same electric potential. | 02-12-2015 |
20150049289 | LIQUID CRYSTAL DISPLAY - A liquid crystal display includes a first substrate, a plurality of pixel electrodes disposed on the first substrate and including a first sub-pixel electrode and a second sub-pixel electrode, the first sub-pixel electrode and the second sub-pixel electrode respectively including a cruciform stem part, and a plurality of fine branch parts which extends from the cruciform stem part, and a liquid crystal layer interposed between the first substrate and a second substrate facing the first substrate, the second substrate including a common electrode in which an opening corresponding to the cruciform stem part of the pixel electrode is defined. | 02-19-2015 |
20150055040 | LIQUID CRYSTAL DISPLAY - The present invention relates to a liquid crystal display that can improve an aperture ratio and liquid crystal control ability. A liquid crystal display according to an exemplary embodiment of the present invention includes: a first substrate and a second substrate which face each other; a pixel electrode disposed on the first substrate; a common electrode disposed on the second substrate; and a liquid crystal layer disposed between the first substrate and the second substrate, in which the common electrode has a first cutout having a cross shape, and the pixel electrode includes a first subpixel electrode having a rhombus shape, a second subpixel electrode surrounding the first subpixel electrode, a second cutout disposed close to and along at least one of the edges of the second subpixel electrode, and a third cutout spacing the first subpixel electrode and the second subpixel electrode. | 02-26-2015 |
20150055049 | LIQUID CRYSTAL DISPLAY - A liquid crystal display includes a first substrate and a second substrate facing each other, a pixel electrode disposed on the first substrate, a storage electrode line which is close to edges of the pixel electrode and spaced apart from the pixel electrode, a common electrode disposed on the second substrate, and a liquid crystal layer disposed between the first substrate and the second substrate, where the common electrode includes a first cutout having a cross shape, and the pixel electrode includes a second cutout which is close to at least one of the edges of the pixel electrode and disposed along the edge. | 02-26-2015 |
20150055065 | LIQUID CRYSTAL DISPLAY - A liquid crystal display includes a first substrate, a second substrate disposed opposite to the first substrate; a pixel electrode disposed on the first substrate; a common electrode disposed on the second substrate; and a liquid crystal layer disposed between the first substrate and the second substrate, where a first cutout having a cross shape is defined in the common electrode, a second cutout is defined in the pixel electrode to be adjacent to and along an edge of the pixel electrode, and the pixel electrode has a step structure, a boundary line of which is in a rhombus shape. | 02-26-2015 |
20150062474 | DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME - A display panel includes a first pixel electrode electrically connected to a first switching electrode, and includes a plurality of first branches forming micro slits, a second pixel electrode electrically connected to a second switching electrode, and including a plurality of second branches forming micro slits, and a third pixel electrode electrically connected to a third switching electrode, and including a plurality of third branches forming micro slits. The first branches are spaced apart from each other by a first space, and have a first width. The second branches are spaced apart from each other by a second space, and have a second width. The third branches are spaced apart from each other by a third space, and have a third width. At least one of the first width, the second width and the third width is different from the other widths. | 03-05-2015 |
20150070634 | LIQUID CRYSTAL DISPLAY HAVING IMPROVED RESPONSE SPEED - A liquid crystal display includes: a first electrode and a second electrode disposed on a first substrate, the first electrode and the second electrode being disposed at a same layer; a second substrate facing the first substrate; a third electrode and a fourth electrode disposed on the second substrate and disposed at different layers; and a liquid crystal layer including liquid crystal molecules disposed between the first substrate and the second substrate, wherein the first electrode, the second electrode, and the third electrode each include a plurality of branch electrodes, but the fourth electrode does not; and wherein the first electrode is electrically connected to the third electrode. | 03-12-2015 |
Patent application number | Description | Published |
20110103191 | APPARATUS AND METHOD TO TRACK POSITIONS OF MULTIPLE SOUND SOURCES - Disclosed herein is an apparatus and method to track positions of multiple sound sources which can simultaneously track the positions of multiple sound sources. Sound signals input to an array of microphones are separated into independent sound source signals, correlation coefficients between the sound signals input to the microphones and the separated sound source signals are estimated, and the estimated correlation coefficients are analyzed to track the positions of the sound sources. | 05-05-2011 |
20110103617 | SOUND SOURCE RECORDING APPARATUS AND METHOD ADAPTABLE TO OPERATING ENVIRONMENT - Disclosed herein is a sound source recording apparatus and method adaptable to an operating environment, which can record a target sound source at a predetermined level without being affected by characteristics of the sound source or ambient noise. A target sound source is separated from a sound source signal received through an array of microphones and a recording sound pressure level and a gain are estimated using a reference sound pressure level and a reference distance for the target sound source, thereby controlling or adjusting the gain of the microphones. | 05-05-2011 |
20120140947 | Apparatus and method to localize multiple sound sources - An apparatus and method to localize multiple sound sources is provided. Virtual microphone signals are generated based on actual microphone signals from a microphone array including a plurality of microphones, which are arranged at intervals that may minimize space aliasing at a given sampling frequency, and sound source directions are tracked using the actual microphone signals and the virtual microphone signals. Thus, without increasing the aperture length of the microphone array, it is possible to achieve almost the same resolution as when a microphone array having a relatively long length is used. | 06-07-2012 |
20120158404 | APPARATUS AND METHOD FOR ISOLATING MULTI-CHANNEL SOUND SOURCE - In an apparatus and method for isolating a multi-channel sound source, the probability of speaker presence calculated when noise of a sound source signal separated by GSS is estimated is used to calculate a gain. Thus, it is not necessary to additionally calculate the probability of speaker presence when calculating the gain, the speaker's voice signal can be easily and quickly separated from peripheral noise and reverb and distortion are minimized. As such, if several interference sound sources, each of which has directivity, and speakers are simultaneously present in a room with high reverb, a plurality of sound sources generated from several microphones can be separated from one another with low sound quality distortion, and the reverb can also be removed. | 06-21-2012 |
20130238335 | ENDPOINT DETECTION APPARATUS FOR SOUND SOURCE AND METHOD THEREOF - An apparatus for detecting endpoints of sound signals when sound sources vocalized from a remote site are processed even if a plurality of speakers exists and an interference sound being input from a direction different from a direction of one speaker, and a method thereof, wherein in an environment in which a plurality of sound sources exists, the existence and the length of the sound source being input according to each direction is determined and the endpoint is found, thereby improving the performance of the post-processing, and speech being input from a direction other than a direction of speech from a speaker vocalized at a remote area from a sound source collecting unit is distinguished while the speech from the speaker is being recorded, thereby enabling a remote sound source recognition without restriction on the installation region of a microphone. | 09-12-2013 |
Patent application number | Description | Published |
20090026515 | Semiconductor memory device and method of forming the same - Example embodiments relate to a semiconductor memory device and a method of forming the semiconductor memory device. The semiconductor memory device may include a first interlayer insulating layer on a semiconductor substrate. A bit line may be arranged in a first direction on the first interlayer insulating layer. A bit line contact pad may be disposed in the first interlayer insulating layer and electrically connected to the bit line. A storage contact pad may be disposed in the first interlayer insulating layer. A top surface of the bit line contact pad may be lower than a top surface of the storage contact pad. | 01-29-2009 |
20090085083 | Semiconductor memory device and method of forming the same - Provided may be a semiconductor memory device and a method of forming the semiconductor memory device. The memory device of example embodiments may include a bit line structure including a bit line on a semiconductor substrate, and a buried contact plug structure including a buried contact pad and a buried contact plug that extends in a lower portion of the bit line from one side of the bit line and connected to the buried contact pad. A width of the buried contact plug near a top surface of the buried contact pad may be greater than a width of the buried contact plug adjacent to the bit line. | 04-02-2009 |
20100112768 | METHOD OF MANUFACTURING NON-VOLATILE SEMICONDUCTOR DEVICES - A non-volatile semiconductor device includes a memory cell in a first area of a substrate, a low voltage transistor in a second area of the substrate, and a high voltage transistor in a third area of the substrate. The memory cell includes a tunnel insulation layer formed on the substrate, a charge trapping layer pattern formed on the tunnel insulation layer in the first area of the substrate, a blocking layer pattern formed on the charge trapping layer pattern and a control gate formed on the blocking layer pattern. The control gate has a width substantially smaller than a width of the blocking layer pattern and the width of the control gate is substantially smaller than a width of the charge trapping layer pattern. In addition, an offset is formed between the control gate and the blocking layer pattern such that a spacer is not formed on a sidewall of the control gate. | 05-06-2010 |
20100173469 | METHODS OF MANUFACTURING CHARGE TRAP-TYPE NON-VOLATILE MEMORY DEVICES - Some methods are directed to manufacturing charge trap-type non-volatile memory devices. An isolation layer pattern can be formed that extends in a first direction in a substrate. A recess unit is formed in the substrate by recessing an exposed surface of the substrate adjacent to the isolation layer pattern. A tunnel insulating layer and a charge trap layer are sequentially formed on the substrate. The tunnel insulating layer and the charge trap layer are patterned to form an isolated island-shaped tunnel insulating layer pattern and an isolated island-shaped charge trap layer pattern by etching defined regions of the substrate, the isolation layer pattern, the tunnel insulating layer, and the charge trap layer until a top surface of the charge trap layer that is disposed on a bottom surface of the recess unit is aligned with a top surface of the isolation layer pattern. A blocking insulating layer is formed that covers the charge trap layer pattern, the isolation layer pattern, and a defined region of the substrate interposed between the charge trap patterns. A gate electrode pattern is formed on the blocking insulating layer to face the charge trap layer pattern. This manufacturing process may reduce charge spreading between unit memory cells and/or may prevent/avoid reduction in the breakdown voltage of the blocking insulating layer. | 07-08-2010 |
20100237401 | GATE STRUCTURES OF SEMICONDUCTOR DEVICES - Gate structures of semiconductor devices and methods of forming gate structures of semiconductor devices are provided. A first insulating pattern may be disposed on an active region of a semiconductor substrate. A data storage pattern may be disposed on the first insulating pattern. A second insulating pattern may be disposed on the data storage pattern and may contact the data storage pattern. A first conductive pattern may conform to the second insulating pattern and to sidewalls of a mold comprising the second insulating pattern. A second conductive pattern may be disposed within a cavity defined by the first conductive pattern. Spacers may be formed on sidewalls of at least one of the first insulating pattern, the data storage pattern, the second insulating pattern, and the conductive pattern. | 09-23-2010 |
20110045643 | Method of forming active region structure - A method of forming an active region structure includes preparing a semiconductor substrate including a cell array region and a peripheral circuit region, forming preliminary cell active regions in the cell array region of the semiconductor substrate, and forming cell active regions in the preliminary cell active regions and at least one peripheral active region in the peripheral circuit region of the semiconductor substrate, such that the preliminary cell active regions, the cell active regions, and the at least one peripheral active region are integrally formed with the semiconductor substrate and protrude from the semiconductor substrate. | 02-24-2011 |
20110053327 | METHOD OF FORMING RECESS AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE HAVING THE SAME - Example embodiments relate to a method of forming a recess and a method of manufacturing a semiconductor device having the same. The method includes forming a field region defining an active region in a substrate. The active region extends in a first direction in the substrate. The method further includes forming a preliminary recess extending in a second direction different from the first direction and crossing the active region in the substrate, plasma-oxidizing the substrate to form a sacrificial oxide layer along a surface of the substrate having the preliminary recess, and removing portions of the sacrificial oxide layer and the active region by plasma etching to form a recess having a width larger than a width of the preliminary recess, where an etch rate of the active region is one to two times greater than an etch rate of the sacrificial oxide layer. | 03-03-2011 |
20110143537 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE AND SYNCHRONOUS PULSE PLASMA ETCHING EQUIPMENT FOR THE SAME - Provided are a method of fabricating a semiconductor device and synchronous pulse plasma etching equipment for the same. The method includes outputting a first radio frequency (RF) power and a control signal and outputting a second RF power. The first RF power is pulse-width modulated to have a first frequency and a first duty ratio, and is applied to a first electrode in a plasma etching chamber. The control signal includes information on a phase of the first RF power. The second RF power is pulse-width modulated to have the first frequency and a second duty ratio smaller than the first duty ratio, is applied to a corresponding second electrode among second electrodes in the plasma etching chamber, and is supplied for a time section in which the first RF power is supplied. | 06-16-2011 |
20110233653 | NON-VOLATILE SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING NON-VOLATILE SEMICONDUCTOR DEVICES - A non-volatile semiconductor device includes a memory cell in a first area of a substrate, a low voltage transistor in a second area of the substrate, and a high voltage transistor in a third area of the substrate. The memory cell includes a tunnel insulation layer formed on the substrate, a charge trapping layer pattern formed on the tunnel insulation layer in the first area of the substrate, a blocking layer pattern formed on the charge trapping layer pattern and a control gate formed on the blocking layer pattern. The control gate has a width substantially smaller than a width of the blocking layer pattern and the width of the control gate is substantially smaller than a width of the charge trapping layer pattern. In addition, an offset is formed between the control gate and the blocking layer pattern such that a spacer is not formed on a sidewall of the control gate. | 09-29-2011 |
20110284163 | PLASMA PROCESSING APPARATUS - A plasma processing apparatus includes a chamber for processing a substrate. A plasma generator is provided to generate plasma within the chamber. A window is provided in a sidewall of the chamber, and the window transmits light from the plasma within the chamber. A photocatalytic layer is provided on an inner surface of the window such that the photocatalytic layer is activated as a result of exposure to light from the plasma to decompose a residual product on the inner surface of the window. | 11-24-2011 |
20110318930 | METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES - A first gas for plasma etch and a second gas for plasma deposition are introduced onto a semiconductor substrate, the semiconductor substrate including a mask pattern. A flow rate of the first and second gases is periodically changed within a range of flow rates during a process cycle, such that a plasma etch process and a plasma deposition process are performed together to form an opening in the semiconductor substrate. | 12-29-2011 |
20120064709 | METHOD OF FORMING SEMICONDUCTOR DEVICE - Provided is a method of forming a semiconductor device. The method may include forming a first insulating layer on a semiconductor substrate. A first polycrystalline silicon layer may be formed on the first insulating layer. A second insulating layer may be formed on the first polycrystalline silicon layer. A second polycrystalline silicon layer may be formed on the second insulating layer. A mask pattern may be formed on the second polycrystalline silicon layer. The second polycrystalline silicon layer may be patterned using the mask pattern as an etch mask to form a second polycrystalline silicon pattern exposing a portion of the second insulating to layer. A sidewall of the second polycrystalline silicon pattern may include a first amorphous region. The first amorphous region may be crystallized by a first recrystallization process. The exposed portion of the second insulating layer may be removed to form a second insulating pattern exposing a portion of the first polycrystalline silicon layer. The exposed portion of the first polycrystalline silicon layer may be removed to form a first polycrystalline silicon pattern exposing a portion of the first insulating layer. The exposed portion of the first insulating layer may be removed to form a first insulating pattern exposing a portion of the semiconductor substrate. | 03-15-2012 |
20120126426 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FORMING THE SAME - Provided may be a semiconductor memory device and a method of forming the semiconductor memory device. The memory device of example embodiments may include a bit line structure including a bit line on a semiconductor substrate, and a buried contact plug structure including a buried contact pad and a buried contact plug that extends in a lower portion of the bit line from one side of the bit line and connected to the buried contact pad. A width of the buried contact plug near a top surface of the buried contact pad may be greater than a width of the buried contact plug adjacent to the bit line. | 05-24-2012 |
20120164809 | SEMICONDUCTOR DEVICES INCLUDING STRAINED SEMICONDUCTOR REGIONS, METHODS OF FABRICATING THE SAME, AND ELECTRONIC SYSTEMS INCLUDING THE DEVICES - A method of fabricating a semiconductor device includes forming a gate pattern on a substrate, forming an amorphous silicon (a-Si) region adjacent to the gate pattern by implanting a dopant containing a Group IV or VIII element into portions of the semiconductor substrate, forming gate spacers on sidewalls of the gate pattern, forming a first cavity by etching the a-Si region and the substrate using a first etching process, forming a second cavity by etching the substrate, such that the second cavity expands a profile of the first cavity in lateral and vertical directions, and forming a strained semiconductor region in the second cavity. | 06-28-2012 |
20130048603 | METHOD OF FORMING MICROPATTERNS - A method of forming micropatterns separated over a misalignment margin includes forming a first mold pattern including a main pattern and a separation-assist pattern, forming a first spacer mask having a first width around the first mold pattern, forming a second mold pattern using the first spacer mask as an etch mask, forming a second spacer mask having a second width around the second mold pattern, and forming a target pattern using the second spacer mask as an etch mask. | 02-28-2013 |
20130095654 | METHODS OF MANUFACTURING A VERTICAL TYPE SEMICONDUCTOR DEVICE - According to example embodiments of inventive concepts, a method includes forming cell patterns and insulating interlayers between the cell patterns on the substrate. An upper insulating interlayer including initial and preliminary contact holes is formed on an uppermost cell pattern. A first reflection limiting layer pattern and a first photoresist layer pattern are formed for exposing a first preliminary contact hole while covering inlet portion of the initial and preliminary contact holes. A first etching process is performed on layers under the first preliminary contact hole to expose the cell pattern at a lower position than a bottom of the first preliminary contact hole. A partial removing process of sidewall portions of the first reflection limiting layer pattern and the first photoresist layer pattern and an etching process on exposed layers through bottom portions of the preliminary contact holes are repeated for forming contact holes having different depths. | 04-18-2013 |
20130105983 | SEMICONDUCTOR DEVICE AND METHOD FORMING PATTERNS WITH SPACED PADS IN TRIM REGION | 05-02-2013 |
20130320486 | SEMICONDUCTOR DEVICE - Provided is a semiconductor device. The semiconductor device includes a conductive pattern disposed on a semiconductor substrate. First and second conductive lines disposed on the conductive pattern and located at the same level as each other, are provided. An isolation pattern is disposed between the first and second conductive lines. A first vertical structure passing through the first conductive line and conductive pattern is provided. A second vertical structure passing through the second conductive line and conductive patterns is provided. An auxiliary pattern passing through the conductive pattern and in contact with the isolation pattern is provided. | 12-05-2013 |
20140162420 | METHOD OF FABRICATING SEMICONDUCTOR DEVICES HAVING VERTICAL CELLS - According to example embodiments, a method of fabricating a semiconductor device includes: forming a preliminary stack structure including upper and lower preliminary stack structures by alternately stacking a plurality of interlayer insulating and sacrificial layers on a cell, first pad area, sacrificial area and second pad area of a substrate; removing an entire portion of the upper preliminary stack structure on the second pad area; forming a first mask defining openings over parts of the first and second pad areas; etching an etch depth corresponding to ones of the plurality of interlayer insulating and sacrificial layers through a remaining part of the preliminary stack structure exposed by the first mask; and repetitively performing a first staircase forming process that includes shrinking sides of the first mask and etching the etch depth through remaining parts of the plurality of interlayer insulating and sacrificial layers exposed by the shrunken first mask. | 06-12-2014 |
20140332970 | SEMICONDUCTOR DEVICE AND METHOD FORMING PATTERNS WITH SPACED PADS IN TRIM REGION - In a semiconductor device, parallel first and second conductive lines having a unit width extend from a memory cell region into a connection region. A trim region in the connection region includes pads respectively connected to the first and second conductive lines but are separated by a width much greater than the unit width. | 11-13-2014 |
20150054054 | SEMICONDUCTOR DEVICES - A method of manufacturing a semiconductor device, the method including forming a tunnel insulating layer on an upper surface of a substrate, forming gate patterns on an upper surface of the tunnel insulating layer, forming capping layer patterns on sidewalls of the gate patterns and on the upper surface of the tunnel insulating layer, etching a portion of the tunnel insulating layer that is not covered with the gate patterns or the capping layer patterns to form a tunnel insulating layer pattern, and forming a first insulating layer on the upper surface of the substrate to cover the gate patterns, the capping layer patterns, and the tunnel insulating layer pattern, wherein the first insulating layer has an air gap between the capping layer patterns. | 02-26-2015 |
Patent application number | Description | Published |
20100080044 | SEMICONDUCTOR MEMORY DEVICE HAVING BALANCING CAPACITORS - According to some of the inventive concepts, a semiconductor memory device may include a plurality of memory cell blocks including a first memory cell block having bit lines, an edge sense amplifier block including edge sense amplifiers coupled to a portion of the bit lines of the first memory cell block, and a balancing capacitor unit coupled to the edge sense amplifiers. | 04-01-2010 |
20100128545 | Sense amplifier and semiconductor memory device using it - A sense amplifier having a pre-amplifier and a main-amplifier is disclosed. The pre-amplifier is connected to paired data line, senses and amplifies data on the paired data line using voltage mode and outputting a pair of differential signal. The main-amplifier is connected to the paired data line, senses and amplifies data on the paired data line using current mode and generating a first amplified signal, senses and amplifies the first amplified signal using voltage mode in response to the pair of differential signal, and outputting an amplified data. | 05-27-2010 |
20100134175 | Antifuse Circuit Having Protection Circuit - An antifuse circuit includes a protection circuit. The antifuse circuit receives a program voltage using a non-connection (NC) pin or ball of a semiconductor device. The protection circuit prevents an unintended voltage lower than the program voltage from being applied to the antifuse circuit. | 06-03-2010 |
20100214861 | Semiconductor memory cell array and semiconductor memory device having the same - A semiconductor memory cell array includes a plurality of bit-lines, a plurality of word-lines, a plurality of memory cells, a plurality of dummy memory cells, a plurality of dummy bit-lines, and a plurality of dummy word-lines. The dummy bit-lines are in outer regions of the bit-lines. The dummy word-lines are in outer regions of the word-lines. The dummy bit-lines are maintained in a floating state. The dummy word-lines retain a turn-off voltage | 08-26-2010 |
20130003479 | SEMICONDUCTOR MEMORY CELL ARRAY AND SEMICONDUCTOR MEMORY DEVICE HAVING THE SAME - A semiconductor memory cell array includes a plurality of bit-lines, a plurality of word-lines, a plurality of memory cells, a plurality of dummy memory cells, a plurality of dummy bit-lines, and a plurality of dummy word-lines. The dummy bit-lines are in outer regions of the bit-lines. The dummy word-lines are in outer regions of the word-lines. The dummy bit-lines are maintained in a floating state. The dummy word-lines retain a turn-off voltage | 01-03-2013 |
20130033926 | SEMICONDUCTOR MEMORY DEVICE HAVING BALANCING CAPACITORS - A semiconductor memory device includes a plurality of memory cell blocks including a first memory cell block having bit lines, an edge sense amplifier block including edge sense amplifiers coupled to a portion of the bit lines of the first memory cell block, and a balancing capacitor unit coupled to the edge sense amplifiers. | 02-07-2013 |
20130094320 | ADDRESS TRANSFORMING CIRCUITS INCLUDING A RANDOM CODE GENERATOR, AND RELATED SEMICONDUCTOR MEMORY DEVICES AND METHODS - Address transforming methods are provided. The methods may include generating a power-up signal when a semiconductor memory device is powered-up. The methods may further include generating a randomized output signal in response to the power-up signal. The methods may additionally include transforming bits of a first address in response to the randomized output signal to generate a second address. | 04-18-2013 |
Patent application number | Description | Published |
20110208596 | METHOD AND SYSTEM FOR PROVIDING ADVERTISING IN WHICH THE BID PRICE PER UNIT TIME IS ADJUSTED IN ACCORDANCE WITH ADVERTISING TRAFFIC - A method and system for offering an advertisement by adjusting a bid price per unit time according to advertising traffic are provided. The advertisement offering method includes determining a bid price per unit time based on an average bid price input by an advertiser and advertising traffic, and determining a charge regarding the advertisement of the advertiser based on the bid price per unit time. | 08-25-2011 |
20110246288 | METHOD AND SYSTEM FOR MANAGING QUALITY OF ADVERTISED WEBPAGE - Disclosed is a method and system for managing quality of an advertising document. The method of managing document quality may include verifying a number of actual clicks corresponding to a number of clicks that may occur during a predetermined period with respect to at least one document that may exist on the Web, verifying a number of expected clicks corresponding to a number of clicks that may be expected to occur during the predetermined period with respect to the at least one document, and determining a quality management index by which quality of the at least one document may be numerically expressed based on the number of the expected clicks and the number of the actual clicks. | 10-06-2011 |
20110251901 | METHOD FOR AUCTIONING AND BILLING FOR SEARCH ADVERTISEMENT, SYSTEM, AND COMPUTER-READABLE RECORDING MEDIUM - A method, system, and computer-readable recording medium for holding an auction and imposing a charge in relation to a search advertisement are provided. The method includes receiving bid information related to the search advertisement from an advertiser calculating device, the bid information including a search keyword, a posted time of the search advertisement, and a bid price for the search advertisement, determining a posting position and/or a posting order of the search advertisement with respect to a predetermined time slot of the posted time of the search advertisement, based on the bid price corresponding to the time slot, and posting the search advertisement according to the determined posting position and/or the posting order for the predetermined time slot. | 10-13-2011 |
20110264514 | BILLING METHOD AND SYSTEM THAT DETERMINES ADVERTISEMENT COSTS ACCORDING TO UNIT TIME - A charging method and system for determining an advertising cost according to a unit time are provided. The charging method includes checking a performance index numerically indicating performance of an advertisement; checking a priority index of a next-priority advertisement to the advertisement; and determining an actual charge per unit time of the advertisement based on the performance index, the priority index, and a predetermined weight. | 10-27-2011 |
20110282751 | METHOD AND SYSTEM FOR ADVERTISING USING MINIMUM INCREMENT BID - A method and system for providing an advertisement using a minimum incremental unit are provided. The advertisement providing method includes adjusting a minimum incremental unit based on an initial bid price, an input bid price, and a maximum bid price bid price during an auction. The minimum incremental unit includes a minimum value of increment to be included in a current input bid price in addition to a previously input bid price. | 11-17-2011 |
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