Patent application number | Description | Published |
20090090542 | MULTILAYER PRINTED WIRING BOARD - An IC chip for a high frequency region, particularly a packaged substrate in which no malfunction or error occurs even if 3 GHz is exceeded. A conductive layer on a core substrate is formed at a thickness of 30 μm and a conductor circuit on an interlayer resin insulation layer is formed at a thickness of 15 μm. By thickening the conductive layer, the volume of the conductor can be increased and resistance can be reduced. Further, by using the conductive layer as a power source layer, the capacity of supply of power to an IC chip can be improved. | 04-09-2009 |
20090266588 | MULTILAYER PRINTED WIRING BOARD - A multilayer printed wiring board has a core substrate, an interlayer insulation layer formed over the core substrate, conductive layers formed over the core substrate, and a via hole for providing electrical connection between the conductive layers. The conductive layers include a conductive layer formed on the core substrate, and the conductive layer formed on the core substrate has a side face in a form of rounded taper tapering toward the core substrate. | 10-29-2009 |
20100014261 | PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING PRINTED CIRCUIT BOARD - A printed circuit board includes a core substrate having an opening portion, an electronic component provided in the opening portion of the core substrate and including a dielectric body, a first electrode formed over the dielectric body, and a second electrode formed over the dielectric body such that the dielectric body is interposed between the first electrode and the second electrode, and a resin filling a gap between the core substrate and the electronic component in the opening portion of the core substrate. The resin filling the gap includes a filler. | 01-21-2010 |
20100118502 | PRINTED CIRCUIT BOARD - Chip capacitors are provided in a printed circuit board. In this manner, the distance between an IC chip and each chip capacitor is shortened, and the loop inductance is reduced. In addition, the chip capacitors are accommodated in a core substrate having a large thickness. Therefore, the thickness of the printed circuit board does not become large. | 05-13-2010 |
20100321914 | MULTILAYER PRINTED WIRING BOARD - A multilayer printed wiring board in which interlayer insulation layer and conductive layer are formed on a multilayer core substrate composed of three or more layers, having through holes for connecting the front surface with the rear surface and conductive layers on the front and rear surfaces and conductive layer in the inner layer to achieve electric connection through via holes, the through holes being composed of power source through holes, grounding through holes and signal through holes connected electrically to a power source circuit or a grounding circuit or a signal circuit of an IC chip, when the power source through holes pass through the grounding conductive layer of the inner layer in the core substrate, of the power source through holes, at least a power source through hole just below the IC having no conductive circuit extending from the power source through hole in the grounding conductive layer. | 12-23-2010 |
20100328915 | PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING PRINTED CIRCUIT BOARD - A printed circuit board has a core substrate including a resin substrate having an opening, a capacitor formed in the opening and having a first electrode structure having a portion facing to the upper surface of the core substrate and a second electrode structure having a portion facing to the lower surface of the core substrate, an upper insulating layer formed over the upper surface of the core substrate and having a conductive circuit formed over the upper insulating layer and a via hole electrically connecting the portion of the first electrode structure and the conductive circuit of the upper insulating layer, and a lower insulating layer formed over the lower surface of the core substrate and having a conductive circuit formed over the lower insulating layer and a via hole electrically connecting the portion of the second electrode structure and the conductive circuit of the lower insulating layer. | 12-30-2010 |
20110303451 | MULTILAYER PRINTED WIRING BOARD - A multilayer printed wiring board including a core substrate, a first conductor layer on a first surface of the substrate, a second conductor layer on a second surface of the substrate, a third conductor layer inside the substrate between the first and second conductor layers, a conductive post connecting the third conductor layer with the first and second conductor layers, a first conductor circuit on the first surface of the substrate, a second conductor circuit on the second surface of the substrate, and a through hole formed through the substrate and connecting the first and second conductor circuits. The through hole is not connected to the third conductor layer, the third conductor layer has thickness larger than thicknesses of the first and second conductor layers, each of the first, second and third conductor layers forms one of power supply and ground layers, and the through hole forms a signal line. | 12-15-2011 |
20120006469 | PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING PRINTED CIRCUIT BOARD - A method for manufacturing a printed circuit board including providing a first resin substrate having a resin plate and a circuit pattern formed on a surface of the resin plate, providing a second resin substrate having a resin plate and an accommodation portion formed in the resin plate of the second substrate, connecting an electrode of a capacitor to the circuit pattern of the first substrate with a bonding material such that the capacitor is mounted to the first substrate, attaching the second substrate to the resin substrate through a bonding resin layer such that the capacitor on the first substrate is accommodated in the accommodation portion of the second substrate, and forming a via hole in the first substrate such that the via hole is electrically connected to the electrode of the capacitor in the accommodation portion of the second substrate. | 01-12-2012 |
20120181078 | MULTILAYER PRINTED WIRING BOARD - An IC chip for a high frequency region, particularly a packaged substrate in which no malfunction or error occurs even if 3 GHz is exceeded. A conductive layer on a core substrate is formed at a thickness of 30 μm and a conductor circuit on an interlayer resin insulation layer is formed at a thickness of 15 μm. By thickening the conductive layer, the volume of the conductor can be increased and resistance can be reduced. Further, by using the conductive layer as a power source layer, the capacity of supply of power to an IC chip can be improved. | 07-19-2012 |
20130206466 | MULTILAYER PRINTED WIRING BOARD - A multilayer printed wiring board includes a core substrate having a through-hole formed through the substrate, an interlayer insulation layer formed on the substrate and having a via conductor formed through the insulation layer, and a conductor layer formed on the insulation layer and connected to the via in the insulation layer. The substrate has multiplayer insulation structure, outer power layer formed on surface of the structure, outer ground layer formed on opposite surface of the structure, inner power layer formed inside the structure and inner ground layer formed inside the structure, each of the inner layers has tapered end having angle satisfying 2.808-15-2013 | |
20130248234 | Multilayer Printed Wiring Board - A package substrate free of malfunction or error even with an IC chip in a high frequency range, particularly an IC chip with a frequency exceeding 3 GHz, is provided. A conductor layer | 09-26-2013 |
20130286615 | PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING PRINTED CIRCUIT BOARD - A method for manufacturing a printed circuit board includes forming an opening portion in a substrate, positioning chip capacitors in the opening portion of the substrate such that the chip capacitors are accommodated in the opening portion of the substrate, forming a buildup structure including an interlayer resin insulating layer and a conductive layer over a surface of the substrate and the chip capacitors accommodated in the opening portion of the substrate, and forming on a surface of the buildup structure bump structures positioned to mount an IC chip such that the chip capacitors in the opening portion of the substrate are positioned directly below the IC chip. | 10-31-2013 |
20130299218 | MULTILAYER PRINTED WIRING BOARD - A package substrate free of malfunction or error even with an IC chip in a high frequency range, particularly an IC chip with a frequency exceeding 3 GHz, is provided. A conductor layer | 11-14-2013 |
20140247572 | PRINTED CIRCUIT BOARD - A printed circuit board includes an accommodating layer, chip capacitor devices accommodated in the accommodating layer, and a buildup structure formed on the accommodating layer such that the buildup structure covers the chip capacitor devices in the accommodating layer. The buildup structure has mounting conductor structures positioned to mount an IC chip device on a surface of the buildup structure such that the IC chip device is mounted directly over the chip capacitor devices, each of the chip capacitor devices has a dielectric body having a surface facing the buildup structure, a first electrode formed on the dielectric body and extending on the surface of the dielectric body, and a second electrode formed on the dielectric body and extending on the surface of the dielectric body, and the dielectric body is interposed between the first electrode and the second electrode. | 09-04-2014 |
20150250056 | PRINTED CIRCUIT BOARD - A printed circuit board includes a substrate having an opening portion, a chip capacitor device accommodated in the opening portion of the substrate, and a buildup structure formed on the substrate such that the buildup structure covers the chip capacitor device in the opening portion of the substrate. The chip capacitor has a dielectric body having a surface facing the buildup structure, first electrodes formed on the surface of the dielectric body and second electrodes formed on the surface of the dielectric body, and the buildup structure has first via structures and second via structures such that the first via structures are connected to the first electrodes, respectively, and the second via structures are connected to the second electrodes, respectively. | 09-03-2015 |
Patent application number | Description | Published |
20140374150 | PACKAGE SUBSTRATE AND METHOD FOR MANUFACTURING PACKAGE SUBSTRATE - A package substrate includes an outermost interlayer resin insulation layer, an outermost conductive layer formed on a first surface of the outermost interlayer resin insulation layer and including first pads positioned to mount a first electronic component and second pads positioned to mount a second electronic component, a first conductive layer including first conductive circuits and formed on a second surface of the outermost interlayer resin insulation layer on the opposite side with respect to the first surface, first via conductors penetrating through the outermost interlayer resin insulation layer such that the first via conductors are connecting the first conductive layer and the first pads, and second via conductors penetrating through the outermost interlayer resin insulation layer such that the second via conductors are connecting the first conductive layer and the second pads. The first conductive circuits in the first conductive layer are connecting the first and second pads, respectively. | 12-25-2014 |
20150040389 | METHOD FOR MANUFACTURING WIRING BOARD WITH BUILT-IN ELECTRONIC COMPONENT - A method for manufacturing a wiring board with a built-in electronic component includes positioning an electronic component in a cavity of a substrate, forming intermediate structures each including an intermediate insulation layer and an intermediate wiring-pattern layer on upper and lower surfaces of the substrate, respectively, such that a component-accommodating substrate is formed, attaching a support sheet to a first surface of the component-accommodating substrate, forming a connection layer including insulation layers and wiring-pattern layers on a second surface of the component-accommodating substrate on the opposite side with respect to the first surface of the component-accommodating substrate, removing the support sheet from the component-accommodating substrate such that an intermediate laminate structure having the connection layer laminated on the second surface of the component-accommodating substrate is formed, and forming upper-layer structures each including an insulation layer and a wiring-pattern layer on upper and lower surfaces of the intermediate laminate, respectively. | 02-12-2015 |
20150279772 | PACKAGE SUBSTRATE AND METHOD FOR MANUFACTURING PACKAGE SUBSTRATE - A package substrate includes interlayer insulating layers including outermost and inner-layer layers, conductor layers including an outermost layer, a first layer between the outermost and inner-layer layers, and a second layer on which the inner-layer layer is formed, via conductors including first and second conductors through the outermost insulating layer, and skip via conductors through the outermost and inner-layer insulating layers to connect the outermost and second conductor layers. The outermost conductor layer includes first and second pads to mount first and second electronic components on the outermost insulating layer, the first conductors are positioned to connect the first conductor layer and first pads, the second conductors are positioned to connect the first conductor layer and second pads, and the first conductor layer has area on surface of the inner-layer insulating layer which is in range of 3 to 15% of area of the surface of the inner-layer insulating layer. | 10-01-2015 |
20150318596 | PACKAGE SUBSTRATE - A package substrate includes a core substrate, a first buildup layer and a second buildup layer. The first buildup layer includes an uppermost interlayer, an upper inner interlayer, an uppermost conductive layer including first pads and second pads, an upper first conductive layer, an upper second conductive layer, vias formed through the uppermost interlayer and connecting the upper first conductive layer and the second pads, and skip vias formed through the uppermost and upper inner interlayers and connecting the uppermost and upper second conductive layers. The second buildup layer includes a lowermost interlayer, a lower inner interlayer, a lowermost conductive layer including third pads, a lower first conductive layer, a lower second conductive layer, vias formed through the lowermost interlayer and connecting the lower first conductive layer and third pads, and skip vias formed through the lowermost and lower inner interlayers and connecting the lowermost and lower second conductive layers. | 11-05-2015 |
20150327363 | PACKAGE SUBSTRATE AND METHOD FOR MANUFACTURING PACKAGE SUBSTRATE - A package substrate includes an inner interlayer, a first conductor layer, a second conductor layer, an outermost interlayer, an outermost conductor layer including first and second pads to mount electronic components, vias including first and second vias such that the first vias are connecting the first conductor layer and first pads and the second vias are connecting the first conductor layer and second pads, and skip vias penetrating through the outermost and inner interlayers such that the skip vias are connecting the outermost and second conductor layers. Sum of insulation distances (t | 11-12-2015 |
20150357316 | PACKAGE SUBSTRATE - A package substrate includes an inner interlayer, a first conductor layer on the inner interlayer, a second conductor layer on which the inner interlayer is formed, an outermost interlayer on the first conductor layer, an outermost conductor layer on the outermost interlayer and including first and second pads positioned to mount first and second electronic components on the outermost interlayer, outermost vias connecting the first and outermost conductor layers through the outermost interlayer, and skip vias connecting the outermost and second conductor layers through the outermost and inner interlayers. The first conductor layer includes a first circuit connecting two outermost vias, and the outermost conductor layer includes an outermost circuit connecting one of the two outermost vias and one skip via such that the first conductor circuit, two outermost vias, outermost circuit and one skip via form a connection path connecting one second pad and the second conductor layer. | 12-10-2015 |
20160043024 | PRINTED WIRING BOARD AND SEMICONDUCTOR PACKAGE - A printed wiring board includes a wiring conductor layer having first surface, conductor posts formed on second surface of the wiring layer, and an insulating layer embedding the wiring layer such that the first surface of the wiring layer is exposed on first surface of the insulating layer and covering side surfaces of the posts such that end surface of each conductor post is exposed from second surface of the insulating layer. The first surface of the wiring layer is recessed with respect to the first surface of the insulating layer and the end surface of each conductor post is recessed with respect to the second surface of the insulating layer such that distance between the end surface of each conductor post and the second surface of the insulating layer is greater than distance between the first surface of the wiring layer and the first surface of the insulating layer. | 02-11-2016 |
20160043027 | PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A printed wiring board includes an insulating layer, a first conductor layer embedded into first surface of the insulating layer and including multiple wirings such that the wirings include connecting portions positioned to connect an electronic component, respectively, a second conductor layer projecting from second surface of the insulating layer on the opposite side, a solder resist layer formed on the first surface of the insulating layer such that the solder resist layer is covering the first conductor layer and has an opening structure exposing the connecting portions of the wirings, and multiple metal posts formed on the connecting portions respectively such that each of the metal posts has a width which is larger than a width of a respective one of the wirings having the connecting portions. The wirings are formed such that the connecting portions are positioned side by side on every other adjacent one of the wirings. | 02-11-2016 |
20160044780 | PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A printed wiring board includes an insulating layer, a first conductor layer embedded into a first surface of the insulating layer and including connecting portions to connect an electronic component, a second conductor layer projecting from a second surface of the insulating layer, a solder resist layer covering the first conductor layer and having an opening structure exposing the connecting portions, a barrier metal layer formed on the connecting portions such that the barrier layer is projecting from the first surface of the insulating layer, and metal posts formed on the barrier layer such that the metal posts are positioned on the connecting portions, respectively. Each metal post has width which is greater than width of a respective connecting portion, and the barrier metal layer includes a metal material which is different from a metal material forming the metal posts and a metal material forming the first conductor layer. | 02-11-2016 |
20160044783 | PRINTED WIRING BOARD, METHOD FOR MANUFACTURING THE SAME AND SEMICONDUCTOR PACKAGE - A printed wiring board includes a wiring conductor layer having a first surface, conductor posts formed on a second surface of the wiring conductor layer on the opposite side with respect to the first surface, and a resin insulating layer embedding the wiring conductor layer such that the first surface of the wiring conductor layer is recessed with respect to a first surface of the resin insulating layer and exposed on the first surface of the resin insulating layer and covering side surfaces of the conductor posts such that an end surface of each of the conductor posts is protruding from a second surface of the resin insulating layer on the opposite side with respect to the first surface of the resin insulating layer. | 02-11-2016 |
20160064318 | PACKAGE SUBSTRATE AND METHOD FOR MANUFACTURING PACKAGE SUBSTRATE - A package substrate includes an outermost interlayer, an outermost conductive layer including first pads positioned to mount at electronic component and second pads positioned to mount another electronic component, a first conductive layer including first circuits and formed such that the outermost interlayer is on the first conductive layer and that the first circuits are connecting the first and second pads, an inner interlayer formed such that the first conductive layer is on the inner interlayer, a second conductive layer formed such that the inner interlayer is on the second conductive layer, via conductors penetrating through the outermost interlayer and including first via conductors connecting the first conductive layer and the first pads and second via conductors connecting the first conductive layer and the second pads, and third via conductors penetrating through the inner interlayer and positioned such that the first and third via conductors form stacked via conductors. | 03-03-2016 |
20160086885 | PACKAGE SUBSTRATE - A package substrate includes resin insulating interlayers, and four or more conductive layers including dedicated wiring layers such that the dedicated wiring layers are two dedicated wiring layers which transmit data between a first electronic component and a second electronic component connected by the two dedicated wiring layers. | 03-24-2016 |