Patent application number | Description | Published |
20080214130 | Systems and methods for determining Sensing Thresholds of a Multi-Resolution Spectrum Sensing (MRSS) technique for Cognitive Radio (CR) Systems - Systems and methods may be provided for threshold determinations for spectrum sensing. The systems and methods may include receiving a false alarm rate, where the false alarm rate is associated with false occupancy identifications of a spectrum segment, determining a noise floor as a function of a noise figure and characteristics of a multi-resolution spectrum sensing (MRSS) window, and calculating a sensing threshold based at least in part upon the false alarm rate and the noise floor. The systems and methods may also include determining whether a portion of an RF spectrum is occupied based at least in part on the calculated sensing threshold. | 09-04-2008 |
20080272849 | Active Baluns - Example embodiments of the invention may provide for active baluns. An example active balun may include a resonator that may convert a single-ended input signal to at least two differential input signals, and a differential switching block that includes first and second transistors that each receive a respective one of the at least two differential input signals from the resonator, where the first and second transistors may be cross-coupled to each other to provide a first differential output signal and a second differential output signal. An example active balun may further include one or more loads connected to the first and second differential output signals, and one or more stacked inverters that may provide a first output port and a second output port, where the first output port may be responsive to the first differential output signal and the second output port may be responsive to the second differential output signal. | 11-06-2008 |
20090067541 | Digital linear amplification with nonlinear components (LINC) transmitter - Embodiments of the invention may provide for a digital LINC (linear amplification with nonlinear components) transmitter. The digital LINC transmitter may include a signal component separator, at least one digital delay modulator, a frequency synthesizer, at least one power amplifier, a power combiner, an antenna, and a mismatch compensator. Additionally, systems and methods may be provided for compensating for phase and amplitude mismatches between two signal paths. | 03-12-2009 |
20090073078 | Systems, Methods and Apparatuses for High Power Complementary Metal Oxide Semiconductor (CMOS) Antenna Switches Using Body Switching and External Component in Multi-Stacking Structure - Embodiments of the invention may provide for a CMOS antenna switch, which may be referred to as a CMOS SPDT switch. The CMOS antenna switch may operate at a plurality of frequencies, perhaps around 900 MHz, 1.9 GHz and 2.1 GHz according to an embodiment of the invention. The CMOS antenna switch may include both a receiver switch and a transmit switch. The receiver switch may utilize a multi-stack transistor with body substrate switching and attachment of external capacitor between drain and gate to block high power signals from the transmit path as well as to maintain low insertion loss at the receiver path. Exemplary embodiments of the CMOS antenna switch may provide for 38 dBm P 0.1 dB at multi bands (e.g., 900 MHz, 1.8 GHz, and 2.1 GHz). In addition, −60 dBc second and third harmonic performance up to 30 dBm input, may be obtained according to example embodiments of the invention. | 03-19-2009 |
20090079509 | LC QUADRATURE OSCILLATOR HAVING PHASE AND AMPLITUDE MISMATCH COMPENSATOR - Embodiments of the invention may provide for an LC quadrature oscillator that includes two LC oscillators that are cross-coupled with each other to generate I/Q clock signals and a phase and amplitude mismatch compensator. The phase and amplitude mismatch detector may include an amplitude mismatch detectors a transconductor, and a capacitor for compensating for both phase and amplitude mismatches between I/Q clock signals generated in the LC quadrature oscillator. | 03-26-2009 |
20090140784 | HIGH-SPEED PULSE SHAPING FILTER SYSTEMS AND METHODS - A first system and method relates to an analog current-mode method using branch systems. In the analog current-mode implementation, multiple branches systems can be scaled according to filter coefficients and switched using known data points. Positive coefficients can add current to the summing node, while negative coefficients can remove current from the summing node. Switches can be implemented with quick charge/discharge paths in order to operate at very high data rates. A second system and method relates to a digital look-up table based high-speed implementation. In the digital implementation, outputs can be pre-calculated as an n-bit output word that drives an n-bit DAC. Each bit of the n-bit word can then described as an independent function of the known data points. Each such function can be implemented as a high-speed combinational logic block. Both systems and methods enable the implementation of pulse shaping filters for multi-gigabit per second data transmission. | 06-04-2009 |
20090170438 | Method and system for reducing signal interference - Signals propagating on an aggressor communication channel can cause interference in a victim communication channel. A sensor coupled to the aggressor channel can obtain a sample of the aggressor signal. The sensor can be integrated with or embedded in a system, such as a flex circuit or a circuit board, that comprises the aggressor channel. The sensor can comprise a dedicated conductor or circuit trace that is near an aggressor conductor, a victim conductor, or an EM field associated with the interference. An interference compensation circuit can receive the sample from the sensor. The interference compensation circuit can have at least two operational modes of operation. In the first mode, the circuit can actively generate or output a compensation signal that cancels, corrects, or suppresses the interference. The second mode can be a standby, idle, power-saving, passive, or sleep mode. | 07-02-2009 |
20090174477 | MULTI-SEGMENT PRIMARY AND MULTI-TURN SECONDARY TRANSFORMER FOR POWER AMPLIFIER SYSTEMS - Embodiments of the invention may provide for power amplifier systems and methods. The systems and methods may include a power amplifier that generates a first differential output signal and a second differential output signal, a primary winding comprised of a plurality of primary segments, where a first end of each primary segment is connected to a first common input port and a second end of each primary segment is connected to a second common input port, where the first common input port is operative to receive the first differential output signal, and where the second common input port is operative to receive the second differential output signal, and a single secondary winding inductively coupled to the plurality of primary segments. | 07-09-2009 |
20090174480 | Systems and Methods for Cascode Switching Power Amplifiers - Example embodiments of the invention may provide systems and methods for a power amplifier. The systems and methods may include a first common-source device having a first source, a first gate, a first drain, and a first body, where the first source is connected to the first body, and wherein the first gate is connected to an input port. The systems and methods may further include a second common-gate device having a second source, a second gate, a second drain, and a second body, where the second source is connected to the first drain, where the second source is further connected to the second body, and where the second drain is connected to an output port. | 07-09-2009 |
20090174515 | Compact Multiple Transformers - Example embodiments of the invention may provide systems and methods for multiple transformers. The systems and methods may include a first transformer that may include a first primary winding and a first secondary winding, where the first primary winding may be inductively coupled to the first secondary winding, where the first transformer may be associated with a first rotational current flow direction in the first primary winding. The systems and methods may further include a second transformer that may include a second primary winding and a second secondary winding, where the second primary winding may be inductively coupled to the second secondary winding, where the second transformer may be associated with a second rotational current flow direction opposite the first rotational current flow direction in the second primary winding, where a first section of the first primary winding may be positioned adjacent to a second section of the second primary winding, and where the adjacent first and second sections may include a substantially same first linear current flow direction. | 07-09-2009 |
20090184786 | MULTI-SEGMENT PRIMARY AND MULTI-TURN SECONDARY TRANSFORMER FOR POWER AMPLIFIER SYSTEMS - Embodiments of the invention may provide for power amplifier systems and methods. The systems and methods may include a power amplifier that generates a first differential output signal and a second differential output signal, a primary winding comprised of a plurality of primary segments, where a first end of each primary segment is connected to a first common input port and a second end of each primary segment is connected to a second common input port, where the first common input port is operative to receive the first differential output signal, and where the second common input port is operative to receive the second differential output signal, and a single secondary winding inductively coupled to the plurality of primary segments. | 07-23-2009 |
20100073052 | FRACTIONAL RESOLUTION INTEGER-N FREQUENCY SYNTHESIZER - Embodiments of the invention may provide for a frequency synthesizer capable to generate an output signal in which the frequency is a fractional portion of the reference frequency without a fractional divider. Based on mathematical relationship (“relatively prime”) between the reference frequency and other injection frequencies mixed with the output signal of a voltage controlled oscillator, the synthesizer is able to generate signals evenly spaced in the frequency domain like Fractional-N PLLs. The synthesizer may include an Integer-N PLL, a SSB mixer, frequency dividers, and frequency multipliers. A Integer-N PLL may include a Phase and Frequency Detector, a Charge Pump, a Loop Filter and a Dual Modulus Divider. By not requiring a fractional divider, the frequency synthesizer is able to avoid adopting any compensation circuits such as Sigma-Delta modulator to suppress fractional spurs. Therefore, the chip area, power consumption and complexity will be reduced considerably. | 03-25-2010 |
20100073084 | SYSTEMS AND METHODS FOR A LEVEL-SHIFTING HIGH-EFFICIENCY LINC AMPLIFIER USING DYNAMIC POWER SUPPLY - Systems and methods may be provided for a LINC system having a level-shifting LINC amplifier. The systems and methods may include a dynamic power supply that is adjustable to provide at least a first voltage supply level and a second voltage supply level higher than the first voltage supply level; a first power amplifier that amplifies a first component signal to generate a first amplified signal; a second power amplifier that amplifiers a second component signal to generate a second amplified signal, where the first component signal and the second component signal are components of an original signal, where the first component signal and the second component signal each have a constant envelope, and where the original signal has a non-constant envelope, and where the first and second power amplifiers are biased at the first voltage supply level or the second voltage supply level based upon an analysis of an amplitude of the original signal. | 03-25-2010 |
20100074367 | ADAPTIVE COMBINER ERROR CALIBRATION ALGORITHMS IN ALL-DIGITAL OUTPHASING TRANSMITTER - Systems and methods may include a signal component separator that receives a non-constant envelope input signal and at least one phase offset value, and generates first digital phase data and second digital phase data; at least one digital phase modulator that receives the first phase data and the second phase data and operates with a frequency synthesizer to generate a first component signal having a first constant envelope and a second component signal having a second constant envelope; at least one power amplifier that amplifies the first component signal and the second component signal; a non-isolated power combiner that combines the first amplified component signal and the second amplified component signal to generate an output signal having a non-constant envelope; and a mismatch compensator that monitors the output signal to determine the at least one phase offset value, where the at least one phase offset value is utilized by the signal component separator for phase adjustment. | 03-25-2010 |
20100093299 | ANALOG SIGNAL PROCESSOR IN A MULTI-GIGABIT RECEIVER SYSTEM - An analog multi-gigabit receiver and/or transceiver can be implemented for the reception and demodulation of multi-gigabits quadrature phase shift keying (QPSK) modulated using a CMOS (complementary metal-oxide semiconductor) process. Further, an analog multi-gigabit receiver and/or transceiver can be implemented for the reception and demodulation of multi-gigabits binary phase shift keying (BPSK), minimum shift keying (MSK), and/or amplitude shift keying (ASK) signal modulated in CMOS processes. | 04-15-2010 |
20100127780 | POWER AMPLIFIERS WITH DISCRETE POWER CONTROL - Systems and methods are provided for power amplifiers with discrete power control. The systems and methods may include a plurality of unit power amplifiers; a plurality of primary windings, wherein each primary winding is connected to at least one respective output port of a respective one the plurality of unit power amplifiers; a secondary winding inductively coupled to the plurality of primary windings, where the secondary winding provides an overall output; a bias controller, where the bias controller provides a respective bias voltage based at least in part on a level of output power to one or more of the plurality of unit power amplifiers; and a switch controller, where the switch controller operates to activate or deactivate at least one of the plurality of unit power amplifiers via a respective control signal. | 05-27-2010 |
20100148866 | Systems and Methods for Power Amplifiers with Voltage Boosting Multi-Primary Transformers - Systems and methods may be provided for a power amplifier system. The systems and methods may include a plurality of power amplifiers, where each power amplifier includes at least one output port. The systems and methods may also include a plurality of primary windings each having a first number of turns, where each primary winding is connected to at least one output port of the plurality of power amplifiers, and a single secondary winding inductively coupled to the plurality of primary windings, where the secondary winding includes a second number of turns greater than the first number of turns. | 06-17-2010 |
20100148871 | SYSTEMS AND METHODS FOR AN ADAPTIVE BIAS CIRCUIT FOR A DIFFERENTIAL POWER AMPLIFIER - Systems and methods for providing an adaptive bias circuit that may include a differential amplifier, low-pass filter, and common source amplifier or common emitter amplifier. The adaptive bias circuit may generate an adaptive bias output signal depending on input signal power level. As the input power level goes up, the adaptive bias circuit may increase the bias voltage or bias current of the adaptive bias output signal. A power amplifier (e.g., a differential amplifier) may be biased according to the adaptive bias output signal in order to reduce current consumption at low power operation levels. | 06-17-2010 |
20100148877 | INTEGRATED POWER AMPLIFIERS FOR USE IN WIRELESS COMMUNICATION DEVICES - An integrated power amplifier can include a carrier amplifier, where the carrier amplifier is connected to a first quarter wave transformer at the input of the carrier amplifier. In addition, the power amplifier can further include at least one peaking amplifier connected in parallel with the carrier amplifier; a first differential combining structure, where the first combining structure includes a first plurality of quarter wave transformers that are configured to combine respective first differential outputs of the carrier amplifier in phase to generate a first single-ended output signal, and a second differential combining structure, where the second combining structures includes a second plurality of quarter wave transformers that are configured to combine respective second differential outputs of the at least one peaking amplifier in phase to generate a second single-ended output signal, where the first single-ended output signal and the second single-ended output signal are combinable in-phase to provide an overall output. | 06-17-2010 |
20100156536 | SYSTEMS AND METHODS FOR SELF-MIXING ADAPTIVE BIAS CIRCUIT FOR POWER AMPLIFIER - Systems and methods for providing a self-mixing adaptive bias circuit that may include a mixer, low-pass filter or a phase shifter, and a bias feeding block. The self-mixing adaptive bias circuit may generate an adaptive bias signal depending on input signal power level. As the input power level goes up, the adaptive bias circuit increases the bias voltage or bias current such that the amplifier will save current consumption at low power operation levels and obtain better linearity at high power operation levels compared to conventional biasing techniques. Moreover, the adaptive bias output signal can be used to cancel the third-order intermodulation terms (IM3) to further enhance the linearity as a secondary effect. | 06-24-2010 |
20100214026 | MILLIMETER-WAVE WIDEBAND VOLTAGE CONTROLLED OSCILLATOR - A voltage controlled oscillator-phase lock loop (VCO-PLL) system includes a voltage controlled oscillator (VCO) system implementing four-channel architecture, such that two bands support two channels; a phase-locked-loop (PLL) system; and a mixer system. The VCO system further includes a control circuit; a first cross-coupled oscillator system adapted to receive a source voltage; a second cross-coupled oscillator system adapted to receive the source voltage; and a plurality of isolation buffer systems adapted to protect the first and second cross-coupled oscillator systems. | 08-26-2010 |
20110068636 | SYSTEMS AND METHODS FOR A SPDT SWITCH OR SPMT SWITCH WITH TRANSFORMER - A SPDT or SPMT switch may include a transformer having a primary winding and a secondary winding, where a first end of the secondary winding is connected to a single pole port, where a first end of the primary winding is connected to a first throw port; a first switch having a first end and a second end, where the first end is connected to ground; and a second switch, where a second end of the secondary winding is connected to both a second end of the first switch and a first end of the second switch, where a second end of the second switch is connected to a second throw port, where the first switch controls a first communication path between the single pole port and the first throw port, and where the second switch controls a second communication path between the second throw port and the single pole port. | 03-24-2011 |
20110120628 | Module, Filter, And Antenna Technology For Millimeter Waves Multi-Gigabits Wireless Systems - A method of fabricating an ultra-high frequency module is disclosed. The method includes providing a top layer; drilling the top layer; milling the top layer; providing a bottom; milling the bottom layer to define a bottom layer cavity; aligning the top layer and the bottom layer; and adhering the top layer to the bottom layer. The present invention also includes an ultra-high frequency module operating at ultra-high speeds having a top layer, the top layer defining a top layer cavity; a bottom layer, the bottom layer defining a bottom layer cavity; and an adhesive adhering both the top layer to the bottom layer, wherein the top layer and the bottom layer are formed from a large area panel of a printed circuit board. | 05-26-2011 |
20110127849 | HIGH-POWER TUNABLE CAPACITOR - A tunable capacitor device may be provided in accordance with example embodiments of the invention. The tunable capacitor device may include a first capacitor; a second capacitor; a third capacitor, where the first, second, and third capacitors are connected in series, wherein the second capacitor is positioned between the first capacitor and the second capacitor; and at least one switch transistor, where the at least one switch transistor is connected in parallel with the second capacitor. | 06-02-2011 |
20110207425 | MULTI-GIGABIT MILLIMETER WAVE RECEIVER SYSTEM AND DEMODULATOR SYSTEM - A receiver system and a demodulator system are configured to receive and demodulate, respectively, multi-gigabit millimeter wave signals being wirelessly transmitted in the unlicensed wireless band near 60 GHz. | 08-25-2011 |
20110281524 | System For Reducing Signal Interference - A system for suppressing interference imposed on a victim communication signal by an aggressor communication signal including a circuit that comprises an input port, an output port, and a signal processing circuit connected between the input port and the output port, the signal processing circuit being operative to produce an interference compensation signal at the output port, for application to the victim communication signal, via processing a sample of the aggressor communication signal transmitted through the input port, and the input port being configured to connect to a sampling system that includes a first circuit trace running along a surface of a flex circuit of a portable wireless device that is dedicated to sensing the aggressor communication signal flowing on a second circuit trace running along the surface of the flex circuit. | 11-17-2011 |
20110285481 | LINEARIZATION SYSTEMS AND METHODS FOR VARIABLE ATTENUATORS - Systems and methods for provided for linearization systems and methods for variable attenuators. The variable attenuators can include series transistors along a main signal path from the input to output, as well as shunt transistors. A bootstrapping body bias circuit can be used with one or of the series transistors to allow the body of a connected transistor to swing responsive to a received RF input signal. As the RF signal increases and affects the gate-to-source voltage difference of a transistor, a bootstrapping body bias circuit can adaptively adjust the threshold voltage of the connected transistor and compensate the channel resistance variation resulting from gate-to-source voltage swing. The bootstrapping body bias circuit can be implemented using passive elements, active elements, or a combination thereof. | 11-24-2011 |
20120149306 | Reducing Signal Interference - A method for interference suppression, including receiving a sample of an aggressor communication signal from a sensor embedded in a flex circuit, emulating interference that the aggressor communication signal imposes on a victim communication signal, and suppressing the imposed interference in response to applying the emulated interference to the victim communication signal. In other aspects, the flex circuit comprises a plurality of traces running substantially parallel to one another along a surface of the flex circuit, and the sensor comprises one of the plurality of traces and one of a plurality of traces of another flex circuit. In still other aspects, the flex circuit comprises a plurality of traces running substantially parallel to one another and the sensor comprises a trace of the flex circuit running perpendicular to the plurality of traces running substantially parallel to one another. | 06-14-2012 |
20140098909 | Multi-Gigabit Millimeter Wave Receiver System And Demodulator System - A receiver system and a demodulator system are configured to receive and demodulate, respectively, multi-gigabit millimeter wave signals being wirelessly transmitted in the unlicensed wireless band near 60 GHz. | 04-10-2014 |