Patent application number | Description | Published |
20090085617 | RAMP VOLTAGE CIRCUIT - Implementations related to ramp voltage generating circuits and systems implementing the same are presented herein. | 04-02-2009 |
20090121642 | Organic Light Emitting Diode Driver - Pulse width modulation (PWM) of a drive current to an organic light emitting diode (OLED) is performed by a circuit subjected to corresponding signaling. | 05-14-2009 |
20090121778 | Anti-Shock Methods for Processing Capacitive Sensor Signals - A low impedance coupling to bias voltage dissipates abnormal charge levels within a microphone in response to a shock event such as dropping or bumping. High impedance coupling to bias voltage is thereafter restored. | 05-14-2009 |
20090140898 | Jitter Insensitive Single Bit Digital to Analog Converter - Systems and methods for a jitter insensitive 1-bit digital to analog converter (DAC) are described. The jitter insensitive 1-bit DAC employed in the feedback loop of a delta sigma analog to digital converter (ADC) converts a 1-bit digital data into the corresponding analog output. | 06-04-2009 |
20090140899 | Double Sampling DAC and Integrator - This disclosure relates to systems and methods for analog to digital conversion using delta sigma modulation. To this end, the delta sigma modulator includes a double sampling DAC and integrator and a 1-bit comparator, with reference loading insensitivity. | 06-04-2009 |
20100097255 | Temperature Compensated Delta-Sigma Modulators with Logarithmic Dynamic Range - Disclosed herein is a delta sigma (ΔΣ or DS) modulator and method for operating the same, the modulator including at least a first proportional to absolute temperature (PTAT) element that conditions an input signal, and a second PTAT element that conditions a reference signal. | 04-22-2010 |
20100308915 | Phase Margin Modification In Operational Transconductance Amplifiers - The present disclosure relates to phase margin modification in operational transconductance amplifiers. | 12-09-2010 |
20110037629 | Coupled Delta-Sigma Modulators - An apparatus and method for reducing error in converting a multi-bit signal to a single bit signal. An analog delta-sigma modulator receives an analog signal and converts it to a multi-bit digital signal that is provided to a digital delta-sigma modulator. The digital delta-sigma modulator introduces error by converting the multi-bit signal to a single-bit signal. The error from the conversion is fed back to the analog delta-sigma modulator which incorporates the error information into the analog signal before it is converted to a multi-bit digital signal. | 02-17-2011 |
20110298385 | ORGANIC LIGHT EMITTING DIODE DRIVER - Disclosed are controllable drive circuits for powering an organic light emitting diode (OLED) or other electronic load. According to one implementation, a circuit structure is provided that applies a pulse width modulated (PWM) drive current to an OLED. The time-average drive current to the OLED can be modulated in accordance with a periodically sampled control signal. In turn, the luminance of the OLED can be suitably varied over a control range. Circuit structures provided may be fabricated at least in part on a common substrate such that respective integrated circuit devices are defined. In one or more implementations, at least a portion of drive circuits may be fabricated within a 65 nanometer (or smaller) environment. | 12-08-2011 |
20120217171 | Sensor with Movable Part and Biasing - Methods and apparatuses are provided wherein a sensor which comprises at least two electrodes and a movable part is alternately biased with at least two different voltages. | 08-30-2012 |
20130015919 | System and Method for Capacitive Signal Source AmplifierAANM Kropfitsch; MichaelAACI KoettmannsdorfAACO ATAAGP Kropfitsch; Michael Koettmannsdorf ATAANM Ceballos; Jose LuisAACI VillachAACO ATAAGP Ceballos; Jose Luis Villach AT - According to an embodiment, a system for amplifying a signal provided by a capacitive signal source includes a first stage and a second stage. The first stage has a voltage follower device including an input terminal configured to be coupled to a first terminal of the capacitive signal source, and a first capacitor having a first end coupled to an output terminal of the capacitive signal source. The second stage includes a differential amplifier capacitively coupled to the output terminal of the voltage follower device. | 01-17-2013 |
20130051582 | System and Method for Low Distortion Capacitive Signal Source Amplifier - According to an embodiment, a method includes amplifying a signal provided by a capacitive signal source to form an amplified signal, detecting a peak voltage of the amplified signal, and adjusting a controllable impedance coupled to an output of the capacitive signal source in response to detecting the peak voltage. The controllable impedance is adjusted to a value inversely proportional to the detected peak voltage. | 02-28-2013 |
20130129116 | Glitch Detection and Method for Detecting a Glitch - System and method for detecting a glitch is disclosed. An embodiment comprises increasing a bias voltage of a first capacitor, sampling an input signal of a first plate of the first capacitor with a time period, mixing the input signal with the sampled input signal, and comparing the mixed signal with a reference signal. | 05-23-2013 |
20130271307 | System and Method for High Input Capacitive Signal Amplifier - In accordance with an embodiment, a method includes determining an amplitude of an input signal provided by a capacitive signal source, compressing the input signal in an analog domain to form a compressed analog signal based on the determined amplitude, converting the compressed analog signal to a compressed digital signal, and decompressing the digital signal in a digital domain to form a decompressed digital signal. In an embodiment, compressing the analog signal includes adjusting a first gain of an amplifier coupled to the capacitive signal source, and decompressing the digital signal comprises adjusting a second gain of a digital processing block. | 10-17-2013 |
20130335055 | System and Method for Boosted Switches - In accordance with an embodiment, a method includes activating a first semiconductor switch having a first switch node coupled to a first input of a bootstrap circuit, a second switch node, and a control node coupled to a first end of a capacitor of the bootstrap circuit. A first end of the capacitor is coupled to the first input of the bootstrap circuit and a second end of the capacitor is set to a first voltage. Next, the first end of the capacitor is decoupled from the first input of the bootstrap circuit, and the second end of the capacitor is set to a second voltage. The control node is boosted to a first activation voltage that turns on the first semiconductor switch. | 12-19-2013 |
20130335131 | System and Method for a Switched Capacitor Circuit - In an embodiment, a circuit includes a forward path circuit having an auto-zero switch coupled between an input of an amplifier and an output of the amplifier, a first chopping circuit having an input coupled to an input of the forward path circuit and an output coupled to the input of the amplifier, and a second chopping circuit having an input coupled to the output of the amplifier and an output coupled to an output of the forward path circuit. The circuit further includes a feedback circuit that has a feedback switch, a feedback capacitor including a first end coupled to an output of the amplifier, a third chopping circuit coupled between the input of the forward path circuit and a first end of a feedback switch, and a fourth chopping circuit coupled between a second end of the feedback switch and a second end of the feedback capacitor. | 12-19-2013 |
20130335247 | SYSTEM AND METHOD FOR CHOPPING OVERSAMPLED DATA CONVERTERS - In accordance with an embodiment, a circuit includes an analog chopping circuit having a first input coupled to a system input and a second input coupled to a first chopping signal, an oversampled data converter having an input coupled to an output of the analog chopping circuit, where the oversampled data converter is configured to produce an oversampled digital signal at an output of the oversampled data converter. The circuit further includes a digital filter having an input coupled to the output of the oversampled data converter, and a digital chopping circuit including a first input coupled to the output of the oversampled data converter, and a second input coupled to a second chopping signal. The digital filter is configured to filter quantization noise generated by the oversampled data converter. | 12-19-2013 |
20140077882 | System and Method for a Programmable Gain Amplifier - In accordance with an embodiment, a system includes a programmable gain amplifier having a switchable feedback capacitor coupled in parallel with a first capacitor and a controller. The controller is configured to couple the feedback capacitor between an input node of the programmable gain amplifier and an output node of the programmable gain amplifier in a first gain setting, and switch a first terminal of the feedback capacitor from the output of the programmable gain amplifier to a reference node while a second terminal of the feedback capacitor remains coupled to the input node of the programmable gain amplifier for a first time period when transitioning from the first gain setting to a second gain setting. | 03-20-2014 |
20140119573 | System and Method for Capacitive Signal Source Amplifier - In accordance with an embodiment, a system for amplifying a signal provided by a capacitive signal source includes a first voltage follower device, a second voltage follower device, and a first capacitor. The first voltage follower device includes an input terminal configured to be coupled to a first terminal of the capacitive signal source, and the second voltage follower device includes an input terminal coupled to the first output terminal of the first voltage follower device, and an output terminal coupled to a second output terminal of the first voltage follower device. Furthermore, first capacitor has a first end coupled to a first output terminal of the first voltage follower device, and a second end configured to be coupled to a second terminal of the capacitive signal source. | 05-01-2014 |
20140140538 | System and Method for High Input Capacitive Signal Amplifier - In accordance with an embodiment, a method includes determining an amplitude of an input signal provided by a capacitive signal source, compressing the input signal in an analog domain to form a compressed analog signal based on the determined amplitude, converting the compressed analog signal to a compressed digital signal, and decompressing the digital signal in a digital domain to form a decompressed digital signal. In an embodiment, compressing the analog signal includes adjusting a first gain of an amplifier coupled to the capacitive signal source, and decompressing the digital signal comprises adjusting a second gain of a digital processing block. | 05-22-2014 |
20140266827 | ADC WITH NOISE-SHAPING SAR - Representative implementations of devices and techniques provide analog to digital conversion of analog inputs. A multistage comparator using a feed-forward technique can provide noise shaping of conversion errors. For example, the comparator may feed a conversion error forward from a first stage to a next stage of the multistage comparator. | 09-18-2014 |
20150138006 | MULTI-RATE PIPELINED ADC STRUCTURE - Representative implementations of devices and techniques provide analog to digital conversion of analog inputs. A plurality of analog-to-digital converters (ADCs) can be arranged such that one or more of the ADCs is operating at a sampling rate that is less than others of the plurality of ADCs. For example, a sampling rate interpolator may be used to increase a sampling rate of signals output at the one or more ADCs operating at the lower sampling rate, allowing pipelining of the plurality of ADCs. | 05-21-2015 |
20150180500 | Quantizer - In one embodiment the quantizer includes a signal-to-phase converter configured to generate a phase signal according to an input signal and a phase difference digitization block configured to generate a quantization output according to differentiated samples of the phase signal, where the phase signal generated by the signal-to-phase converter has a sinusoidal shape. | 06-25-2015 |