Patent application number | Description | Published |
20080246644 | SYSTEM HAVING A SIGNAL CONVERTER - A system having a signal converter device, and a method for operating a system having a signal converter device is disclosed. One embodiment provides loading a capacitive device to a preparation voltage in a first operating phase, and loading the capacitive device to a measuring voltage in a second operating phase after the first operating phase. | 10-09-2008 |
20090085551 | Circuitry and Method for Monitoring a Supply Voltage - A method for monitoring the supply voltage of an electronic device includes the steps of: determining an operating condition of the electronic device, adjusting a plurality of reference voltages dependent on the operating condition of the electronic device, wherein each of the plurality of reference voltages is adjusted at a different time, and comparing the supply voltage of the electronic device with at least one of the plurality of reference voltages. | 04-02-2009 |
20090144587 | DEVICE AND METHOD FOR ELECTRONIC CONTROLLING - An electronic controlling device and method is disclosed. One embodiment provides at least one module performing specific functions within one of a plurality of module modes on reception of a corresponding module mode request. A system control unit is provided to operate the at least module in one of a plurality of module modes by distributing a corresponding system mode request. The at least one module is adapted to translate the distributed system mode request to a module mode request which is configurable. | 06-04-2009 |
20090167584 | SYSTEM HAVING A SIGNAL CONVERTER DEVICE AND METHOD OF OPERATING - A system having a signal converter device, and a method for operating a system having a signal converter device is disclosed. One embodiment provides loading a capacitive device to a preparation voltage in a first operating phase, and loading the capacitive device to a measuring voltage in a second operating phase after the first operating phase. | 07-02-2009 |
20100027303 | Devices and Methods for Converting or Buffering a Voltage - Embodiments of the invention relate to devices and methods for converting or buffering a voltage including an inductor configured to perform at least a primary function and to be reused to contribute to converting or buffering the voltage as a secondary function. | 02-04-2010 |
20100045336 | Method and Device for Programmable Power Supply with Configurable Restrictions - The invention involves a programmable power supply device with configurable restrictions to the programmability of the power supply device, wherein the programmable power supply device comprises a number of freeze/programmability levels, each freeze/programmability defining a dedicated access restriction to the programmability of the power supply device. | 02-25-2010 |
20100072971 | CIRCUIT FOR A SEMICONDUCTOR SWITCHING ELEMENT INCLUDING A TRANSFORMER - A circuit for a semiconductor switching element including a transformer. One embodiment provides a first voltage supply circuit having a first oscillator. A first transformer is connected downstream of the first oscillator. A first accumulation circuit for providing a first supply voltage is connected downstream of the first transformer. A driver circuit having input terminals for feeding in the first supply voltage and having output terminals for providing a drive voltage for the semiconductor switching element, designed to generate the drive voltage for the semiconductor switching element at least from the first supply voltage. | 03-25-2010 |
20100080243 | Serial Bus Structure - Embodiments of the invention relate to a bus structure for a serial bus for communicatively coupling a plurality of nodes. Each node is coupled to the transmit channel via a logic gate. The transmit channel is looped back as a receive channel to the receive terminals of all coupled nodes. | 04-01-2010 |
20100080321 | Method and apparatus for checking asynchronous transmission of control signals - In a method for asynchronously transmitting control signals from a transmitter end to at least one receiver via a plurality of control lines, control signals received via the individual control lines are logically combined with one another at the receiver end and the result of the logic combination is transmitted to the transmitter end. | 04-01-2010 |
20100109750 | Boost Mechanism Using Driver Current Adjustment for Switching Phase Improvement - System and method for providing a boost current to a switching transistor gate is disclosed. A boost capacitor precharged to a voltage level above a gate-source voltage is coupled to a switching transistor gate at the beginning of a switch-on phase. The boost capacitor is decoupled from the switching transistor gate when a boost capacitor voltage falls below the gate-source voltage and is again precharged to the voltage level above the gate-source voltage. A second-phase resistance is coupled between a supply voltage and the switching transistor gate. The second-phase resistance value is selected based upon a current peak detected in the switching transistor. A switch-off capacitor precharged to a voltage level below the gate-source voltage may be coupled to the switching transistor gate at the beginning of a switch-of phase. | 05-06-2010 |
20100156361 | System and Method for Transmitting Current Sharing Information among Paralleled Power Trains - An embodiment of the invention relates to a power control device configured to provide current-sharing control in a power converter including a plurality of power trains. The power control device transmits or receives a synchronization signal on a synchronization node to initiate a time frame that includes a plurality of time slots, and to control a switching activity of a power switch in a respective power train. The power control device further includes a current sharing bus node on which a digital current-sharing signal is transmitted in a designated time slot. The power control device determines a load current of the power converter and controls a power train current employing current data received on the current-sharing bus node from another power control device. The power control device may be a master power control device that transmits the synchronization signal on the synchronization node. | 06-24-2010 |
20100254478 | ARRANGEMENT AND METHOD FOR SIGNAL TRANSMISSION BETWEEN DIFFERENT VOLTAGE DOMAINS - An arrangement and method for signal transmission between different voltage domains is disclosed. One embodiment provides a first signal processing unit receiving a first supply voltage. A second signal processing unit receives a second supply voltage, the first supply voltage and the second supply voltage overlap each other in a first overlap range. A third signal processing unit receives a third supply voltage, the second supply voltage and the third supply voltage overlap each other in a second voltage overlap range. A first information signal from the first signal processing unit is transmitted to the second signal processing unit. A second information signal dependent on the first information signal from the second signal processing is transmitted to the third signal processing unit. | 10-07-2010 |
20100271250 | Analog to Digital Converter (ADC) with Comparator Function for Analog Signals - This disclosure relates to analog to digital converter (ADC) component with a comparator function for analog signals. | 10-28-2010 |
20100301332 | Detecting a Fault State of a Semiconductor Arrangement - Disclosed is a method for detecting a mechanical fault state of a semiconductor arrangement, using a temperature profile. | 12-02-2010 |
20100327946 | BOOST MECHANISM USING DRIVER CURRENT ADJUSTMENT FOR SWITCHING PHASE IMPROVEMENT - System and method for providing a boost current to a switching transistor gate is disclosed. A boost capacitor precharged to a voltage level above a gate-source voltage is coupled to a switching transistor gate at the beginning of a switch-on phase. The boost capacitor is decoupled from the switching transistor gate when a boost capacitor voltage falls below the gate-source voltage and is again precharged to the voltage level above the gate-source voltage. A second-phase resistance is coupled between a supply voltage and the switching transistor gate. The second-phase resistance value is selected based upon a current peak detected in the switching transistor. A switch-off capacitor precharged to a voltage level below the gate-source voltage may be coupled to the switching transistor gate at the beginning of a switch-of phase. | 12-30-2010 |
20110153889 | COUPLING DEVICES, SYSTEM COMPRISING A COUPLING DEVICE AND METHOD FOR USE IN A SYSTEM COMPRISING A COUPLING DEVICE - The invention relates to coupling devices, a system comprising a coupling device and a method for use in a system comprising a coupling device. | 06-23-2011 |
20110187376 | System and Method for Testing a Circuit - In one embodiment, a sensor for circuit testing has a first terminal and a second terminal. The first terminal is configured to be coupled to a first node of a first circuit via a first capacitor, and the second terminal is configured to be coupled to a second node of the first circuit. The sensor also has at least one transmitter and at least one receiver that measures a first transmission factor between the first terminal and the second terminal. The sensor determines that the first circuit is in a first state if the first transmission factor is above a first threshold, and determines that the first circuit is in a second state if the first transmission factor is below the first threshold. | 08-04-2011 |
20110189952 | System and Method for Receiving Data Across an Isolation Barrier - In one embodiment, A system for communication has a receiver for receiving data from a passive transmitter capacitively coupled to the receiver. The receiver has a sensing element having a plurality of terminals configured to be capacitively coupled to the passive transmitter and DC isolated from the passive transmitter. | 08-04-2011 |
20110204925 | Circuitry and Method for Monitoring a Supply Voltage - Embodiments related to comparing of a supply voltage are described and depicted. | 08-25-2011 |
20110273318 | Analog to digital converter (ADC) with comparator function for analog signals - This disclosure relates to analog to digital converter (ADC) component with a comparator function for analog signals. | 11-10-2011 |
20110304487 | FLOATING POINT TIMER TECHNIQUES - Aspects of the present disclosure relate to floating point timers and counters that are used in a variety of contexts. In some implementations, a floating point counter can be used to generate a wave form made up of a series of pulses with different pulse lengths. An array of these floating point counters can be used to implement a pool of delays. In other implementations, an array of floating point counters can be used to analyze waveforms on a number of different communication channels. Analysis of such waveforms may be useful in automotive applications, such as in wheel speed measurement for example, as well as other applications. | 12-15-2011 |
20120075009 | Charge Pump - A charge pump for transmitting energy and data has a primary side, a secondary side and a first coupling capacitance by way of which the primary side is connected to the secondary side, wherein the primary side is designed to periodically transmit energy in the form of a charge packet to the secondary side with the first coupling capacitance during a charge pump interval, the primary side being designed to impress an item of data on the charge pump interval by modulation, wherein the secondary side is designed to receive the item of data by demodulating the charge pump interval, wherein the secondary side is designed to impress an item of data on the charge pump interval by modulation, and wherein the primary side is designed to receive the item of data by demodulation of the charge pump interval. | 03-29-2012 |
20120110374 | Methods and Systems for Measuring I/O Signals - Some embodiments of the invention relate to an embedded processing system. The system includes a memory unit to store a plurality of operating instructions and a processing unit coupled to the memory unit. The processing unit can execute logical operations corresponding to respective operating instructions. An input/output (I/O) interface receives a first time-varying waveform and provides an I/O signal that is based on the first time-varying waveform. A comparison unit coupled to the processing unit and adapted to selectively assert an error signal based on whether the I/O signal has a predetermined relationship with a reference signal, wherein the predetermined relationship holds true during normal operation but fails to hold true when an unexpected event occurs and causes an unexpected change at least one of the I/O signal and reference signal. | 05-03-2012 |
20120218134 | Method for use in a Sigma-Delta Analog to Digital Converter, Sigma-Delta Analog to Digital Converters and Systems Comprising a Sigma-Delta Analog to Digital Converter - Some embodiments relate to a method for use in a sigma-delta analog to digital converter, sigma-delta analog to digital converters and systems comprising sigma-delta analog to digital converters. In accordance with an aspect of the invention, there is provided a method for use in a sigma-delta analog to digital converter (SD-ADC) comprising a modulator, a decimation filter, a decimation counter, and a decimator data output, wherein the method comprises receiving an external trigger signal and capturing a value of the decimation counter and a value of the decimator data output upon receiving the external trigger signal. | 08-30-2012 |
20120242381 | FLOATING POINT TIMER TECHNIQUES - Aspects of the present disclosure relate to floating point timers and counters that are used in a variety of contexts. In some implementations, a floating point counter can be used to generate a wave form made up of a series of pulses with different pulse lengths. An array of these floating point counters can be used to implement a pool of delays. In other implementations, an array of floating point counters can be used to analyze waveforms on a number of different communication channels. Analysis of such waveforms may be useful in automotive applications, such as in wheel speed measurement for example, as well as other applications. | 09-27-2012 |
20120278520 | SYSTEM AND METHOD OF TRANSMITTING DATA BETWEEN DEVICES CONNECTED VIA A BUS DEFINING A TIME SLOT DURING TRANSMISSION FOR RESPONSIVE OUTPUT INFORMATION FROM BUS DEVICES - A device and method are provided in which the data to be transmitted is transmitted in units together with information concerning the transmission and/or the use of the data. At least some of the units include at least one region which defines a time slot within which freely selectable devices can output onto the bus data representing freely selectable information at freely selectable points in time. | 11-01-2012 |
20130088264 | System, Drivers for Switches and Methods for Synchronizing Measurements of Analog-to-Digital Converters - A driver for a switch includes a primary side having a trigger input and a secondary side comprising an analog-to-digital converter (ADC). The primary side and the secondary side are separated by a galvanic isolation barrier and communicate via a communication circuit. The primary side is configured to receive a trigger signal at the trigger input and forward the trigger signal to the ADC of the secondary side of the driver via the communication circuit. The ADC is configured to start a measurement upon receiving the trigger signal. | 04-11-2013 |
20130097347 | SYSTEM AND METHOD OF TRANSMITTING DATA BETWEEN DEVICES CONNECTED VIA A BUS DEFINING A TIME SLOT DURING TRANSMISSION FOR RESPONSIVE OUTPUT INFORMATION FROM BUS DEVICES - Techniques and devices for transmitting data and information via a bus are provided. According to these techniques, data is transmitted in units or frames together with information that is required or useful for one or more of the transmission and the use of the data. If desired, at least some of the units or frames include a time slot within which freely selectable devices can output onto the bus data representing freely selectable information at freely selectable points in time. | 04-18-2013 |
20130135030 | Systems, Circuits and a Method for Generating a Configurable Feedback - A system can generate a configurable feedback. The system includes a number of circuitries that are coupled to a number of drivers and connected to each other in a chain via a single-wire connection. Control circuitry is connected to the plurality of circuitries and adapted to output configuration data to at least one circuitry of the plurality of circuitries to configure a feedback signal to be delivered by the plurality of circuitries to the control circuitry via the single-wire connection. | 05-30-2013 |
20130187656 | Methods for Monitoring Functionality of a Switch and Driver Units for Switches - A gate driver unit includes an input stage, an output stage, a read/write interface, and a monitoring stage. The input stage is configured to receive control signals and forward the control signals to the output stage and the monitoring stage. The read/write interface is configured to receive configuration data and forward the configuration data to the monitoring stage. The monitoring stage is configured to capture and evaluate signals of a power switch connected to the gate driver unit and synchronize the evaluation of the signals of the power switch to the control signals. The evaluation of the signals and the synchronization of the evaluation are based on the configuration data. | 07-25-2013 |
20130214956 | VIRTUAL ANALOG TO DIGITAL CONVERTER - The disclosure relates to analog to digital converters, in particular to logical circuit blocks, a system and a method, which provide functionality of an additional analog to digital converter. In accordance with an aspect of the disclosure, there is provided a logical circuit block, which is configured to be connected to a plurality of ADCs each including a plurality of input pins connected to a plurality of analog input channels. The logical circuit block is further configured to cause one ADC of the plurality of ADCs to perform an ADC conversion of an analog input signal received via a particular analog input channel of the plurality of analog input channels to which an input pin of the one ADC is connected. | 08-22-2013 |
20130223497 | Method and System for Compensating a Delay Mismatch Between a First Measurement Channel and a Second Measurement Channel - A method and a system for compensating a delay mismatch between a first measurement channel and a second measurement channel is disclosed. A method for compensating a delay mismatch between a first measurement channel and a second measurement channel includes providing a reference point for starting the first and second measurement channel, and starting the first measurement channel after expiration of a first delay period which begins at the reference point. The method further includes starting the second measurement channel after expiry of a second delay period which begins at the reference point, wherein a difference between a length of the first delay period and a length of the second delay period is substantially equal to the delay mismatch between the first measurement channel and the second measurement channel. | 08-29-2013 |
20130307589 | Driver Circuit for driving Semiconductor Switches - A driver circuit can be used to drive a semiconductor switch to an on-state or an off-state in accordance with a control signal. The operating voltage range of the control signal is represented by a reference voltage. And input stage receives the control signal and the reference voltage and generates a modified control signal. An output stage is coupled to the input stage and receives the modified control signal. The output stage is configured to provide a driver signal for driving the semiconductor switch on and off in accordance with the modified control signal. The input stage is configured to scale the control signal dependent on the level of the reference voltage, to compare the scaled control signal with at least one threshold value that is responsive to the reference voltage, and to generate the modified control signal dependent on the result of the comparison. | 11-21-2013 |
20130311691 | System and Method to Address Devices Connected to a Bus System - A system includes a bus system, such as a LIN bus system. A number of components are connected to the bus system. A first component of the components is configured to detect a direction of a current to detect a location of the first component in the bus system. Each of the components can have a unique address. | 11-21-2013 |
20140002141 | System and Method for a Driver Circuit | 01-02-2014 |
20140009162 | System and Method for Testing a Circuit - In an embodiment, a device comprises a circuit with at least one circuit element; measurement circuitry capable to test a state of the at least one circuit element during an operation of the circuit, the measurement circuitry comprising a first terminal configured to be coupled to a first node of the circuit via a first capacitor, a second terminal configured to be coupled to a second node of the circuit, wherein the measurement circuitry is configured to determine in situ an operating state of the at least one circuit element based on signals applied by the measurement circuitry to the circuit during the operation of the circuit. | 01-09-2014 |
20140019805 | METHODS AND SYSTEMS FOR MEASURING I/O SIGNALS - Some embodiments of the invention relate to an embedded processing system. The system includes a memory unit to store a plurality of operating instructions and a processing unit coupled to the memory unit. The processing unit can execute logical operations corresponding to respective operating instructions. An input/output (I/O) interface receives a first time-varying waveform and provides an I/O signal that is based on the first time-varying waveform. A comparison unit coupled to the processing unit and adapted to selectively assert an error signal based on whether the I/O signal has a predetermined relationship with a reference signal, wherein the predetermined relationship holds true during normal operation but fails to hold true when an unexpected event occurs and causes an unexpected change at least one of the I/O signal and reference signal. | 01-16-2014 |
20140133586 | Signal Transmission Arrangement with a Transformer and Signal Transmission Method - A circuit arrangement with a transmission arrangement is disclosed including a transformer. | 05-15-2014 |
20140162552 | System and Method for Receiving Data Across an Isolation Barrier - In one embodiment, a system for communication has a receiver for receiving data from a passive transmitter capacitively coupled to the receiver. The receiver has a sensing element having a plurality of terminals configured to be capacitively coupled to the passive transmitter and DC isolated from the passive transmitter. | 06-12-2014 |
20140218097 | SYSTEM AND METHOD FOR A DRIVER CIRCUIT - In accordance with an embodiment, a method of operating a gate driving circuit includes monitoring a signal integrity at an output of the gate driving circuit. If the signal integrity is poor based on the monitoring, output of the gate driving circuit is placed in a high impedance state and an external signal integrity failure signal is asserted. | 08-07-2014 |
20140347201 | METHOD AND SYSTEM FOR COMPENSATING A DELAY MISMATCH BETWEEN A FIRST MEASUREMENT CHANNEL AND A SECOND MEASUREMENT CHANNEL - A method and a system for compensating a delay mismatch between a first measurement channel and a second measurement channel is disclosed. A method for compensating a delay mismatch between a first measurement channel and a second measurement channel includes providing a reference point for starting the first and second measurement channel, and starting the first measurement channel after expiration of a first delay period which begins at the reference point. The method further includes starting the second measurement channel after expiry of a second delay period which begins at the reference point, wherein a difference between a length of the first delay period and a length of the second delay period is substantially equal to the delay mismatch between the first measurement channel and the second measurement channel. | 11-27-2014 |
20150039949 | DRIVE TRAIN CONTROL - Various techniques relating to drive train control are disclosed. In an embodiment, in a first mode of operation communication between a controller and a submodule of the drive train takes place via a first communication channel and optionally additionally via a second communication channel. In a second mode of operation, upon failure of the first communication channel, communication with the submodule of the drive train takes place via the second communication channel. | 02-05-2015 |
20150077161 | CIRCUIT INCLUDING A TRANSFORMER FOR DRIVING A SEMICONDUCTOR SWITCHING ELEMENT - A circuit for a semiconductor switching element including a transformer. One embodiment provides a first voltage supply circuit having a first oscillator. A first transformer is connected downstream of the first oscillator. A first accumulation circuit for providing a first supply voltage is connected downstream of the first transformer. A driver circuit having input terminals for feeding in the first supply voltage and having output terminals for providing a drive voltage for the semiconductor switching element, designed to generate the drive voltage for the semiconductor switching element at least from the first supply voltage. | 03-19-2015 |