Patent application number | Description | Published |
20140267735 | INVESTIGATION GENERATION IN AN OBSERVATION AND SURVEILLANCE SYSTEM - The present disclosure is directed to systems and methods for generating investigations of user behavior. In an example embodiment, the system includes a video camera configured to capture video of user activity, a video analytic module to perform real-time video processing of the captured video to generate non-video data from video, and a computer configured to receive the video and the non-video data from the video camera. The computer includes a video analytics module configured to analyze one of video and non-video data to identify occurrences of particular user behavior, and an investigation generation module configured to generate an investigation containing at least one video sequence of the particular user behavior. In some embodiments, the investigation is generated in near real time. The particular user behavior may be defined as an action, an inaction, a movement, a plurality of event occurrences, a temporal event and/or an externally-generated event. | 09-18-2014 |
20140270682 | SELF-HEALING VIDEO SURVEILLANCE SYSTEM - A self-healing video surveillance system is described. The self-healing video surveillance system includes one or more surveillance cameras that are configured to store configuration data of a network video recorder in operable communication with the surveillance cameras. The network video recorder includes configuration data, and a module configured to store the configuration data on the surveillance cameras and/or retrieve configuration data stored on the surveillance cameras. A new network video recorder introduced into the network retrieves the stored configuration data to self-configure with minimal or no human interaction. In embodiments, configuration data is distributed among a plurality of surveillance cameras, and may be stored in encrypted format. | 09-18-2014 |
20140313330 | VIDEO IDENTIFICATION AND ANALYTICAL RECOGNITION SYSTEM - An analytical recognition system includes one or more video cameras configured to capture video and a video analytics module configured to perform real-time video processing and analyzation of the captured video and generate non-video data. The video analytic module includes one or more algorithms configured to identify an abnormal situation. Each abnormal situation alerts the video analytics module to automatically issue an alert and track one or more objects or individuals by utilizing the one or more video cameras. The abnormal situation is selected from the group consisting of action of a particular individual, non-action of a particular individual, a temporal event, and an externally generated event. | 10-23-2014 |
Patent application number | Description | Published |
20090081885 | DEPOSITION SYSTEM FOR THIN FILM FORMATION - A process for depositing a thin film material on a substrate is disclosed, comprising simultaneously directing a series of gas flows from the output face of a delivery head of a thin film deposition system toward the surface of a substrate, and wherein the series of gas flows comprises at least a first reactive gaseous material, an inert purge gas, and a second reactive gaseous material, wherein the first reactive gaseous material is capable of reacting with a substrate surface treated with the second reactive gaseous material, wherein one or more of the gas flows provides a pressure that at least contributes to the separation of the surface of the substrate from the face of the delivery head. A system capable of carrying out such a process is also disclosed. | 03-26-2009 |
20090081886 | SYSTEM FOR THIN FILM DEPOSITION UTILIZING COMPENSATING FORCES - A process for depositing a thin film material on a substrate is disclosed, comprising simultaneously directing a series of gas flows from the output face of a delivery head of a thin film deposition system toward the surface of a substrate, and wherein the series of gas flows comprises at least a first reactive gaseous material, an inert purge gas, and a second reactive gaseous material, wherein the first reactive gaseous material is capable of reacting with a substrate surface treated with the second reactive gaseous material. A system capable of carrying out such a process is also disclosed. | 03-26-2009 |
20090217878 | SYSTEM FOR THIN FILM DEPOSITION UTILIZING COMPENSATING FORCES - A process for depositing a thin film material on a substrate is disclosed, comprising simultaneously directing a series of gas flows from the output face of a delivery head of a thin film deposition system toward the surface of a substrate, and wherein the series of gas flows comprises at least a first reactive gaseous material, an inert purge gas, and a second reactive gaseous material, wherein the first reactive gaseous material is capable of reacting with a substrate surface treated with the second reactive gaseous material. A system capable of carrying out such a process is also disclosed. | 09-03-2009 |
20090312553 | N-TYPE SEMICONDUCTOR MATERIALS FOR THIN FILM TRANSISTORS - A thin film transistor comprises a layer of organic semiconductor material comprising a tetracarboxylic diimide naphthalene-based compound having, attached to each of the imide nitrogen atoms, an aromatic moiety, at least one of which moieties is substituted with at least one electron donating group. Such transistors can further comprise spaced apart first and second contact means or electrodes in contact with said material. Further disclosed is a process for fabricating an organic thin-film transistor device, preferably by sublimation deposition onto a substrate, wherein the substrate temperature is no more than 100° C. | 12-17-2009 |
20140206137 | DEPOSITION SYSTEM FOR THIN FILM FORMATION - A process for depositing a thin film material on a substrate is disclosed, comprising simultaneously directing a series of gas flows from the output face of a delivery head of a thin film deposition system toward the surface of a substrate, and wherein the series of gas flows comprises at least a first reactive gaseous material, an inert purge gas, and a second reactive gaseous material, wherein the first reactive gaseous material is capable of reacting with a substrate surface treated with the second reactive gaseous material, wherein one or more of the gas flows provides a pressure that at least contributes to the separation of the surface of the substrate from the face of the delivery head. A system capable of carrying out such a process is also disclosed. | 07-24-2014 |
Patent application number | Description | Published |
20090070719 | Logic Block Timing Estimation Using Conesize - A system for logic block timing analysis may include a controller, and storage in communication with the controller. The storage may provide delay-versus-conesize values of a logic block. The system may further include a fitting module to provide a delay-cone based upon the delay-versus-conesize values of the logic block. The system may also include a conesize parser that uses the delay-cone to provide delay values through the logic block. The conesize parser may be used to validate the design of the logic block by comparing the delay-cone with a desired cycle time. | 03-12-2009 |
20090070720 | System to Identify Timing Differences from Logic Block Changes and Associated Methods - A system to identify timing differences due to logic block changes, the system may include a controller, and storage in communication with the controller. The controller may provide delay values of a previous logic block and a current logic block. The system may also include a timing-modeler to compare the delay values of the previous logic block with the current logic block for timing analysis. The system may further include an interface that provides a report based upon the previous logic block and the current logic block comparison. | 03-12-2009 |
20090100394 | Method, Apparatus, and Computer Program Product for Automatically Waiving Non-Compute Indications for a Timing Analysis Process - In the course of unit timing, there exists the possibility for a non-compute (N/C) on a particular net in an IC chip design, which could be caused by numerous things, including but not limited to a pin being tied to power, a floating output, or invalid timing test for a given phase at a test point. A process automatically verifies that all non-computes are understood and exist for valid reasons, in order to ensure all necessary paths are being timed. The process takes a conventional Comprehensive Report output of a unit timing run and generates macro specific N/C reports for designers to review and sign off on. | 04-16-2009 |