Zimin
Dmitry Zimin, Hedingen CH
Patent application number | Description | Published |
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20080213477 | INLINE VACUUM PROCESSING APPARATUS AND METHOD FOR PROCESSING SUBSTRATES THEREIN - An inline vacuum processing apparatus for processing of substrates in vacuum comprises at least one load-lock chamber, at least two subsequent deposition chambers to be operated with essentially the same set of coating parameters and at least one unload-lock chamber plus means for transferring, post-processing and/or handling substrates through and in the various chambers. A method for depositing a thin film on a substrate in such processing system comprises the steps of introducing a first substrate into a load-lock chamber, lowering the pressure in said chamber; transferring the substrate into a first deposition chamber; depositing a layer of a first material on said first substrate using a first set of coating parameters; transferring said first substrate into a second, subsequent deposition chamber of said inline system without breaking vacuum and depositing a further layer of said first material on said first substrate using substantially the same set of parameters. Simultaneously to step f) a second substrate is being treated in said inline vacuum system according to step d). | 09-04-2008 |
Lev Grigorievich Zimin, Kitakyushu-Shi JP
Patent application number | Description | Published |
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20100274237 | COOLING NEEDLE PROBE AND COOLING SYSTEM - To provide a cooling needle probe and cooling system which can accurately cool a minute region. A cooling needle probe | 10-28-2010 |
Michael Zimin, Austin, TX US
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20080304347 | ONE TIME PROGRAMMABLE ELEMENT SYSTEM IN AN INTEGRATED CIRCUIT - A system with a repairable memory array having redundant memory cells to replace one or more defective memory cells that are detected after fabrication. The system also includes non memory array circuits having circuitry that may adjust one or more operating parameters such as operating current, operating voltage, resistance, capacitance, timing characteristics and an operating mode. A set of one time programmable elements can be used to selectively store information for modifying operating parameters and replacing the defective memory cells with redundant memory cells. | 12-11-2008 |
20090003114 | Apparatus and Method for Reducing Power Consumption Using Selective Power Gating - A method for reducing power consumption of transistor-based circuit, the method includes: of receiving a low power mode indication; determining whether to supply power to at least a portion of the transistor-based circuit in response to a reset value of the transistor-based circuit and a state of the transistor-based circuit prior the receiving of the low power mode indication, and selectively providing power to at least a portion of the transistor-based circuit. An apparatus for reducing power consumption of a transistor-based circuit, the apparatus being connected to the transistor-based circuit, and is adapted to receive a low power mode indication, wherein the apparatus includes: means for determining whether to supply power to at least a portion of the transistor-based circuit in response a state of the transistor-based circuit prior the receiving of the low power mode indication; and means for power gating, adapted to selectively provide power to at least a portion of the transistor-based circuit in response to the determination. | 01-01-2009 |
Michael Zimin, Kiryat Bialik IL
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20080294927 | Method and System for Clock Skew Reduction in Clock Trees - A system that includes a clock tree and multiple variable delay components. The system is characterized by including a first set of fuses indicative of identities of variable delay components that belong to a first set of variable delay components, a second set of fuses indicative of delay values of the variable delay components that belong to the first set of variable delay components, and a second set of variable delay components that are set to at least one default delay value. A method for reducing clock skews, the method includes providing a clock tree that includes a set of variable delay components. The method is characterized by selecting a first set of variable delay components in view of timing violations occurring due clock skews, setting delay values of variable delay components that form a first set of variable delay components by programming fuses, and setting delay values of variable delay components that form a second set of variable delay components to at least one default value. | 11-27-2008 |
Yury L'Vovich Zimin, Kitakyushu-Shi JP
Patent application number | Description | Published |
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20100274237 | COOLING NEEDLE PROBE AND COOLING SYSTEM - To provide a cooling needle probe and cooling system which can accurately cool a minute region. A cooling needle probe | 10-28-2010 |