Chang, Irvine
Allen Chang, Irvine, CA US
Patent application number | Description | Published |
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20110141375 | METHOD AND APPARATUS FOR TRANSMITTING AND DOWNLOADING SETUP INFORMATION - Multiple channel maps are embedded in a television transmission and the appropriate channel corresponding to the particular television service used by the viewer is downloaded for use with the television receiver. Each channel map is accompanied by a channel map identifier which identifies the source of the television transmission and a geographic identifier. The source of a television transmission is automatically detected by monitoring the radio-frequency spectrum allocations of telecast stations. The geographic area identifier is determined by comparison with a user inputted geographic area identifier. The channel map having a channel map identifier corresponding to the detected television transmission source and the user inputted geographic area identifier is downloaded and stored for future use. | 06-16-2011 |
20130007834 | METHOD AND APPARATUS FOR TRANSMITTING AND DOWNLOADING SETUP INFORMATION - Multiple channel maps are embedded in a television transmission and the appropriate channel corresponding to the particular television service used by the viewer is downloaded for use with the television receiver. Each channel map is accompanied by a channel map identifier which identifies the source of the television transmission and a geographic identifier. The source of a television transmission is automatically detected by monitoring the radio-frequency spectrum allocations of telecast stations. The geographic area identifier is determined by comparison with a user inputted geographic area identifier. The channel map having a channel map identifier corresponding to the detected television transmission source and the user inputted geographic area identifier is downloaded and stored for future use. | 01-03-2013 |
20140109145 | METHOD AND APPARATUS FOR TRANSMITTING AND DOWNLOADING SETUP INFORMATION - Multiple channel maps are embedded in a television transmission and the appropriate channel corresponding to the particular television service used by the viewer is downloaded for use with the television receiver. Each channel map is accompanied by a channel map identifier which identifies the source of the television transmission and a geographic identifier. The source of a television transmission is automatically detected by monitoring the radio-frequency spectrum allocations of telecast stations. The geographic area identifier is determined by comparison with a user inputted geographic area identifier. The channel map having a channel map identifier corresponding to the detected television transmission source and the user inputted geographic area identifier is downloaded and stored for future use. | 04-17-2014 |
Arthur H. Chang, Irvine, CA US
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20110140772 | SELF-HEALING POWER AMPLIFIER: METHODS AND APPARATUS - An integrated power amplifier includes a divider and a combiner. The integrated power amplifier also includes two or more amplifiers. Each of the amplifier input terminals is electrically coupled to a divider output terminal and each of the amplifier output terminals is electrically coupled to a combiner input terminal. At least one power sensor is configured to provide a power amplifier performance metric. The divider and the combiner include a plurality of actuators. Each actuator has at least one actuator control terminal which is configured to provide an actuator setting. The actuators are configured via the actuator control terminals to optimize the power amplifier performance metric. Methods to simulate the operation of a self-healing power amplifier and a process for the operation of a self-healing circuit are also described. | 06-16-2011 |
20150069957 | RECONFIGURABLE COMPENSATOR WITH LARGE-SIGNAL STABILIZING NETWORK - During operation, the DC converter and a DC battery charger controller in a charger circuit transitions from a first error signal to a second error signal for use in charging a battery, wherein the first error signal and the second error signal, respectively, correspond to feedback sources in a plurality of feedback sources with a plurality of feedback sources. Then, the DC converter and a DC battery charger controller selects a gain and an impedance to ground of a damping circuit based on the selected second error signal, where the damping circuit applies the gain and the impedance to ground to the second error signal. Moreover, the DC converter and a DC battery charger controller selects one or more clamping voltages of a voltage-clamping circuit based on the selected second error signal, where the voltage-clamping circuit applies the one or more clamping voltages to an output from the damping circuit. | 03-12-2015 |
Arthur Hsu Chen Chang, Irvine, CA US
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20140167513 | Systems Approach To Photovoltaic Energy Extraction - Described is a method and apparatus for per-panel photovoltaic energy extraction with integrated converters. Also described are switched-capacitor (SC) converters have been evaluated for many applications because of the possibility for on-chip integration; applications to solar arrays are no exception. Also described is a comprehensive system-level look at solar installations, finding possibilities for optimization at and between all levels of operation in an array. Specifically, novel concepts include new arrangements and options for applying switched-capacitor circuits at 3 levels: for the panel and sub-panel level, as part of the overall control strategy, and for ensuring stable and robust interface to the grid with the possibility of eliminating or reducing the use of electrolytic capacitors. | 06-19-2014 |
20140339918 | Enhanced Stacked Switched Capacitor Energy Buffer Circuit - A stacked switched capacitor (SSC) energy buffer circuit includes a switching network and a plurality of energy storage capacitors. The switching network need operate at only a relatively low switching frequency and can take advantage of soft charging of the energy storage capacitors to reduce loss. Thus, efficiency of the SSC energy buffer circuit can be extremely high compared with the efficiency of other energy buffer circuits. Since circuits utilizing the SSC energy buffer architecture need not utilize electrolytic capacitors, circuits utilizing the SSC energy buffer architecture overcome limitations of energy buffers utilizing electrolytic capacitors. Circuits utilizing the SSC energy buffer architecture (without electrolytic capacitors) can achieve an effective energy density characteristic comparable to energy buffers utilizing electrolytic capacitors. The SSC energy buffer architecture exhibits losses that scale with the amount of energy buffered, such that a relatively high efficiency can be achieved across a desired operating range. | 11-20-2014 |
20140355322 | Stacked Switched Capacitor Energy Buffer Circuit - A stacked switched capacitor (SSC) energy buffer circuit includes a switching network and a plurality of energy storage capacitors. The switching network need operate at only a relatively low switching frequency and can take advantage of soft charging of the energy storage capacitors to reduce loss. Thus, efficiency of the SSC energy buffer circuit can be extremely high compared with the efficiency of other energy buffer circuits. Since circuits utilizing the SSC energy buffer architecture need not utilize electrolytic capacitors, circuits utilizing the SSC energy buffer architecture overcome limitations of energy buffers utilizing electrolytic capacitors. Circuits utilizing the SSC energy buffer architecture (without electrolytic capacitors) can achieve an effective energy density characteristic comparable to energy buffers utilizing electrolytic capacitors. The SSC energy buffer architecture exhibits losses that scale with the amount of energy buffered, such that a relatively high efficiency can be achieved across a desired operating range. | 12-04-2014 |
Christian Manuel Chang, Irvine, CA US
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20110307373 | System and method for Internet based peer-to-peer banking - A method for providing an Internet based peer-to-peer banking includes: providing a website; lender or borrower defining desired loan terms on the website; website communicating lender's or borrower's loan terms, respectively, to a borrower or lender respectively; the website storing data pertaining to the loan, the borrower, and the lender; the website sending periodic billing statements and reminders to the borrower regarding loan payments to be made and balances; the borrower and the lender choosing to make automatic payments through the website or make loan payments through other means; the borrower and the lender having the ability to report to the website all loan payments that have been made or missed; the website storing data pertaining to all made and missed loan payments; the website providing the record of the loan payments to the borrower and lender upon maturity or default of the loan. | 12-15-2011 |
Da-Yu Chang, Irvine, CA US
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20120071970 | PHYSIOLOGIC TRICUSPID ANNULOPLASTY RING - A prosthetic tricuspid remodeling annuloplasty ring for use in tricuspid valve repairs to provide annular support after reconstructive valve surgery. The ring maintains an optimal annular dimension to prevent excessive dilatation of the natural valve annulus while adapting to the dynamic motion of the tricuspid annulus during the cardiac cycle. An exemplary ring features a waveform contour and may be constructed of a titanium core having a varying cross-section for selective flexibility for good Z-axis or out-of plane movement. The “waveform” contour and selective flexibility of the different segments of this ring are designed to adapt to the complex motion of the annulus. This reduces the stress on the anatomical structures and therefore minimizes the risk of arrhythmia and ring dehiscence. | 03-22-2012 |
20120253457 | COMPRESSIBLE HEART VALVE ANNULUS SIZING TEMPLATES - Compressible heart valve annulus sizing templates suitable for minimally-invasive or otherwise reduced accessibility surgeries. The sizing templates may be folded, rolled, or otherwise compressed into a reduced configuration for passage through an access tube or other such access channel. Once expelled from the access tube the sizing templates expand to their original shape for use in sizing the annulus. The templates may be formed of an elastomeric polymer material such as silicone, a highly elastic metal such as NITINOL, or both. Grasping tabs or connectors for handles permit manipulation from outside the body. A NITINOL wireform may be compressed for passage through an access tube and expelled from the distal end thereof into a cloth cover to assume a sizer shape. | 10-04-2012 |
20130345801 | FORCE-BASED HEART VALVE SIZER - A valve sizer for determining an appropriate replacement valve size when performing a heart valve replacement procedure is provided. In one version the valve sizer has a hollow shaft with proximal and distal ends. A movable sizing element couples to the distal end of the shaft and is radially expandable between first, contracted and second, expanded positions. An actuator assembly on a handle includes an actuator coupled to a clutch member via a ball-spring-detent clutch. A rod extends through the shaft and maintains a fixed distance between the handle and a distal hub in the sizing element. Movement of the actuator causes axial movement of the shaft, thereby causing radial expansion of sizing petals relative to the hub. The clutch slips when a predetermined reaction force from the surrounding valve annulus is met by the petals. | 12-26-2013 |
20140188221 | SURGICAL HEART VALVES ADAPTED FOR POST-IMPLANT EXPANSION - A prosthetic heart valve configured to replace a native heart valve and having a support frame configured to be reshaped into an expanded form in order to receive and/or support an expandable prosthetic heart valve therein is disclosed, together with methods of using same. The prosthetic heart valve may be configured to have a generally rigid and/or expansion-resistant configuration when initially implanted to replace a native valve (or other prosthetic heart valve), but to assume a generally expanded form when subjected to an outward force such as that provided by a dilation balloon or other mechanical expander. | 07-03-2014 |
20150066137 | INTEGRATED BALLOON CATHETER INFLATION SYSTEM - An inflation system having two pressure vessels integrated into a balloon catheter. A pressurized chamber and a vacuum chamber are integrally attached to proximal end of the balloon catheter and activated by a common valve or switch. Pressure or vacuum is selectively transmitted to the balloon depending on the valve/switch position. The working fluid may be air, or a combination of air and saline with an intermediate piston/cylinder assembly. The balloon catheter may be a part of a heart valve delivery system with a balloon-expandable heart valve crimped onto the balloon. | 03-05-2015 |
James Y.c. Chang, Irvine, CA US
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20080265929 | Process Monitor for Monitoring and Compensating Circuit Performance - A method and system for monitoring and compensating the performance of an operational circuit is provided. The system includes one or more integrated circuit chips and a controller. Each integrated circuit chip includes one or more operational circuits, each operational circuit having at least one controllable circuit parameter. Each integrated circuit chip also includes a process monitor module at least partially constructed thereon. The controller is coupled to each process monitor module and to each operational circuit. The controller includes logic for evaluating the performance of an operational circuit based on data obtained from process monitor module and operational circuit related data stored in a memory. Based on the evaluation, the controller determines whether any deviations from desired or optimal performance of the circuit exist. If deviations exist, the controller generates a control signal to initiate adjustments to the operational circuit to compensate for the deviations. | 10-30-2008 |
20080284919 | Fully integrated tuner architecture - An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver. | 11-20-2008 |
20090085597 | Process Monitor for Monitoring an Integrated Circuit Chip - A system or apparatus for monitoring an Integrated Circuit (IC) chip includes: a sense circuit at least partially constructed on the IC chip and configured to produce one or more sense signals each indicative of a corresponding process-dependent circuit parameter of the IC chip; and a digitizer module configured to produce, responsive to the one or more sense signals, one or more digitized signals each representative of a corresponding one of the sense signals. A controller is configured to determine a value of one or more of the process-dependent circuit parameters based on one or more of the digitized signals. | 04-02-2009 |
20100245012 | Integrated Spiral Inductor - An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors with shields to increase circuit Q. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver. ESD protection is provided by a pad ring and ESD clamping structure that maintains signal integrity. Also provided are shunts at each pin to discharge ESD build up. The shunts utilize a gate boosting structure to provide sufficient small signal RF performance, and minimal parasitic loading. | 09-30-2010 |
20110067083 | Fully Integrated Tuner Architecture - An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver. | 03-17-2011 |
20110284840 | Process Monitor for Monitoring an Integrated Circuit Chip - A system or apparatus for monitoring an Integrated Circuit (IC) chip includes: a sense circuit at least partially constructed on the IC chip and configured to produce one or more sense signals each indicative of a corresponding process-dependent circuit parameter of the IC chip; and a digitizer module configured to produce, responsive to the one or more sense signals, one or more digitized signals each representative of a corresponding one of the sense signals. A controller is configured to determine a value of one or more of the process-dependent circuit parameters based on one or more of the digitized signals. | 11-24-2011 |
Janice Erica Chang, Irvine, CA US
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20150073296 | APPARATUS AND METHODS FOR MATCHING OF TINNITUS - Apparatuses and methods for matching the tinnitus of a subject are provided. A plurality of sounds are applied to a subject. The plurality of sounds includes a plurality of first sounds and further includes a plurality of second sounds. A first likeness score associated with the plurality of the sounds is received. Each first likeness score is representative of the similarity of the sound associated therewith to the tinnitus of the subject. At least one third sound is generated based on at least one of the plurality of first sounds and based on at least one of the plurality of second sounds. The at least one third sound is generated based on the first likeness scores associated with the plurality of sounds. A fourth sound is determined based on the at least one third sound. The fourth sound matches the tinnitus of the subject. | 03-12-2015 |
Ku G. Chang, Irvine, CA US
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20140289302 | MANAGING TASK OBJECT STATE UTILIZING A RELIABLE MESSAGING MODEL - Embodiments of the present invention address deficiencies of the art in respect to task object state management for workflow management systems and provide a novel and non-obvious method, system and computer program product for managing task object state utilizing a reliable messaging model. In an embodiment of the invention, a method for managing task object state utilizing a reliable messaging model is provided. The method includes transmitting according to a reliable messaging protocol a launch request for a task object in a workflow over a computer communications network to a remote server. The method also includes determining from the reliable messaging protocol whether or not the launch request has failed. Finally, the method includes responding to a determination that the launch request has failed, by transmitting a test request to the remote server using a protocol other than the reliable messaging protocol and setting a state of the task object as failed only if the remote server responds to the test request. | 09-25-2014 |
20140289558 | MANAGING TASK OBJECT STATE UTILIZING A RELIABLE MESSAGING MODEL - Embodiments of the present invention address deficiencies of the art in respect to task object state management for workflow management systems and provide a novel and non-obvious method, system and computer program product for managing task object state utilizing a reliable messaging model. In an embodiment of the invention, a method for managing task object state utilizing a reliable messaging model is provided. The method includes transmitting according to a reliable messaging protocol a launch request for a task object in a workflow over a computer communications network to a remote server. The method also includes determining from the reliable messaging protocol whether or not the launch request has failed. Finally, the method includes responding to a determination that the launch request has failed, by transmitting a test request to the remote server using a protocol other than the reliable messaging protocol and setting a state of the task object as failed only if the remote server responds to the test request. | 09-25-2014 |
Li-Chung Chang, Irvine, CA US
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20080227409 | WIRELESS RECEIVER WITH NOTCH FILTER TO REDUCE EFFECTS OF TRANSMIT SIGNAL LEAKAGE - This disclosure describes techniques for reducing adverse effects of TX signal leakage in a full-duplex, wireless communication device. The techniques make use of a notch filter to reject TX signal leakage in a signal processed in the RX path of the wireless communication device. The notch filter may be constructed as a complex notch filter using passive resistor and capacitor components to produce a notch frequency that attenuates TX signal leakage components in a desired signal. The notch filter may be applied to a down-converted, baseband signal produced by a passive mixer. | 09-18-2008 |
20090174481 | MULTI-LINEARITY MODE LNA HAVING A DEBOOST CURRENT PATH - A modified derivative superposition (MDS) low noise amplifier (LNA) includes a main current path and a cancel current path. Third-order distortion in the cancel path is used to cancel third-order distortion in the main path. In one novel aspect, there is a separate source degeneration inductor for each of the two current paths, thereby facilitating tuning of one current path without affecting the other current path. In a second novel aspect, a deboost current path is provided that does not pass through the LNA load. The deboost current allows negative feedback to be increased without generating headroom problems. In a third novel aspect, the cancel current path and/or deboost current path is programmably disabled to reduce power consumption and improve noise figure in operational modes that do not require high linearity. | 07-09-2009 |
20090258624 | METHOD AND APPARATUS FOR PROCESSING A COMMUNICATION SIGNAL IN A RECEIVER - A receiver includes a jammer detector configured to detect the presence or the absence of jamming in a communication signal within a gain state. The receiver further includes an amplifier configured to amplify the communication signal in a high linearity receiving mode or a low linearity receiving mode, wherein the high linearity receiving mode corresponds with a lower gain for the gain state in the amplifier relative to that of the low linearity receiving mode. In addition, the receiver includes a processing unit coupled to the jammer detector, the processing unit being configured to control the amplifier to amplify the communication signal in either the high linearity receiving mode or the low linearity receiving mode, based on the output of the jammer detector detecting the presence or the absence of jamming in the communication signal. A method is also provided for processing a communication signal in a receiver. | 10-15-2009 |
20110037518 | AMPLIFIERS WITH IMPROVED LINEARITY AND NOISE PERFORMANCE - Amplifiers with improved linearity and noise performance are described. In an exemplary design, an apparatus includes first through sixth transistors. The first transistor receives an input signal and provides an amplified signal. The second transistor receives the amplified signal and provides signal drive for an output signal. The third transistor receives the input signal and provides an intermediate signal. The fourth transistor provides bias for the third transistor in a high linearity mode. The fifth transistor receives the intermediate signal and provides signal drive for the output signal in a low linearity mode. The third and fourth transistors form a deboost path that is enabled in the high linearity mode to improve linearity. The third and fifth transistors form a cascode path that is enabled in the low linearity mode to improve gain and noise performance. The sixth transistor generates distortion component used to cancel distortion component from the first transistor. | 02-17-2011 |
20110110463 | RECEIVER WITH BALANCED I/Q TRANSFORMER - A receiver with a balanced I/Q transformer is described. In an exemplary design, the receiver includes an LNA that amplifies a received RF signal and provides a single-ended RF signal to the balanced I/Q transformer. The balanced I/Q transformer includes at least one primary coil and first and second secondary coils. The first secondary coil is magnetically coupled to the at least one primary coil and provides a first differential RF signal to a first mixer. The second secondary coil is magnetically coupled to the at least one primary coil and provides a second differential RF signal to a second mixer. The first and second mixers downconvert the first and second differential RF signals with I and Q LO signals, respectively, and provide differential I and Q downconverted signals. The primary and secondary coils may be fabricated on two conductive layers of an integrated circuit. | 05-12-2011 |
20120327825 | SIGNAL SPLITTING CARRIER AGGREGATION RECEIVER ARCHITECTURE - A wireless communication device configured for receiving a multiple carrier signal is described. The wireless communication device includes a primary signal splitting carrier aggregation architecture. The primary signal splitting carrier aggregation architecture includes a primary antenna and a transceiver chip. The primary signal splitting carrier aggregation architecture reuses a first diversity/simultaneous hybrid dual receiver path. The wireless communication device also includes a secondary signal splitting carrier aggregation architecture. The secondary signal splitting carrier aggregation architecture includes a secondary antenna and a receiver chip. The secondary signal splitting carrier aggregation architecture reuses a second diversity/simultaneous hybrid dual receiver path. | 12-27-2012 |
20130003617 | RECEIVER WITH BYPASS MODE FOR IMPROVED SENSITIVITY - A receiver with bypass mode for improved sensitivity is disclosed. An apparatus is provided that includes a non-bypass signal path coupled to a receiver, the non-bypass signal path comprising a filter, a bypass signal path coupled to the receiver, the bypass signal path configure to bypass the filter, and a switch configured to couple an antenna to the non-bypass signal path during time intervals when signals transmitted by a related local transmitter are transmitted with a signal power that exceeds a threshold, and to couple the antenna to the bypass signal path during other time intervals. In another aspect, the switch is configured to couple the antenna to the non-bypass signal path during time intervals when a jamming signal in a selected frequency range is received with a signal power that exceeds a threshold, and to couple the antenna to the bypass signal path during other time intervals. | 01-03-2013 |
20130230080 | MULTIPLE-INPUT AND MULTIPLE-OUTPUT CARRIER AGGREGATION RECEIVER REUSE ARCHITECTURE - A wireless communication device configured for receiving a wireless multiple-input and multiple-output signal. The wireless communication device includes a first multiple-input and multiple-output carrier aggregation receiver reuse architecture. The first multiple-input and multiple-output carrier aggregation receiver reuse architecture includes a first antenna, a second antenna and a transceiver chip. The first multiple-input and multiple-output carrier aggregation receiver reuse architecture reuses a first carrier aggregation receiver path. The wireless communication device also includes a second multiple-input and multiple-output carrier aggregation receiver reuse architecture. The second multiple-input and multiple-output carrier aggregation receiver reuse architecture includes a third antenna, a fourth antenna and a receiver chip. The second multiple-input and multiple-output carrier aggregation receiver reuse architecture reuses a second carrier aggregation receiver path. | 09-05-2013 |
20130231064 | SINGLE-CHIP SIGNAL SPLITTING CARRIER AGGREGATION RECEIVER ARCHITECTURE - A wireless communication device configured for receiving a multiple carrier signal is described. The wireless communication device includes a single-chip signal splitting carrier aggregation receiver architecture. The single-chip signal splitting carrier aggregation receiver architecture includes a primary antenna, a secondary antenna and a transceiver chip. The single-chip signal splitting carrier aggregation receiver architecture reuses a simultaneous hybrid dual receiver path. | 09-05-2013 |
20140072001 | CARRIER AGGREGATION RECEIVER ARCHITECTURE - A receiver architecture for carrier aggregation is disclosed. In an exemplary design, an apparatus (e.g., a wireless device, a circuit module, etc.) includes a plurality of low noise amplifiers (LNAs), a plurality of switches, and at least one downconverter. The LNAs receive and amplify at least one input radio frequency (RF) signal and provide at least one amplified RF signal. The switches are coupled to the outputs of the plurality of LNAs. The at least one downconverter is coupled to the plurality of switches, downconverts the at least one amplified RF signal, and provides at least one downconverted signal. The switches reduce the number of downconverters needed to support reception of transmissions on multiple sets of carriers via multiple receive antennas. The LNAs and the switches may be implemented on at least one front-end module or a back-end module. The downconverter(s) are implemented on the back-end module. | 03-13-2014 |
20140113578 | AMPLIFIERS WITH NOISE SPLITTING - Amplifiers with noise splitting to improve noise figure are disclosed. In an exemplary design, an apparatus (e.g., a wireless device, an integrated circuit, etc.) includes a plurality of amplifier circuits and at least one interconnection circuit. The amplifier circuits receive an input radio frequency (RF) signal. The interconnection circuit(s) are coupled between the plurality of amplifier circuits. Each interconnection circuit is closed to short the outputs or internal nodes of two amplifier circuits coupled to that interconnection circuit. The plurality of amplifier circuits may include a plurality of gain circuits coupled to a plurality of current buffers, one gain circuit and one current buffer for each amplifier circuit. Each amplifier circuit provides an output current, which may include a portion of the current from each of the plurality of gain circuits when the plurality of amplifier circuits are enabled. | 04-24-2014 |
20140171001 | RECEIVER CALIBRATION WITH LO SIGNAL FROM INACTIVE RECEIVER - Techniques for calibrating a receiver based on a local oscillator (LO) signal from another receiver are disclosed. In an exemplary design, an apparatus (e.g., a wireless device or an integrated circuit) includes first and second local oscillator (LO) generators. The first LO generator generates a first LO signal used by a first receiver for frequency downconversion. The second LO generator generates a second LO signal used by a second receiver for frequency downconversion in a first operating mode. The second LO signal is used to generate a test signal for the first receiver in a second operating mode. The second LO signal may be provided as the test signal or may be amplitude modulated with a modulating signal to generate the test signal. The test signal may be used to calibrate residual sideband (RSB), second order input intercept point (IIP2), receive path gain, etc. | 06-19-2014 |
20140213209 | SINGLE-INPUT MULTIPLE-OUTPUT AMPLIFIERS WITH INDEPENDENT GAIN CONTROL PER OUTPUT - Amplifiers with multiple outputs and separate gain control per output are disclosed. In an exemplary design, an apparatus (e.g., a wireless device or an integrated circuit) may include first and second amplifier circuits. The first amplifier circuit may receive and amplify an input radio frequency (RF) signal based on a first variable gain and provide a first amplified RF signal. The second amplifier circuit may receive and amplify the input RF signal based on a second variable gain and provide a second amplified RF signal. The input RF signal may include a plurality of transmitted signals being received by the wireless device. The first variable gain may be adjustable independently of the second variable gain. Each variable gain may be set based on the received power level of at least one transmitted signal being received by the wireless device. | 07-31-2014 |
20140240048 | AMPLIFIERS WITH MULTIPLE OUTPUTS AND CONFIGURABLE DEGENERATION INDUCTOR - Multi-output amplifiers with configurable source degeneration inductance and having good performance are disclosed. In an exemplary design, an apparatus (e.g., a wireless device or an integrated circuit) includes a gain transistor and a configurable degeneration inductor for an amplifier. The gain transistor receives an input signal and provides an amplified signal. The amplifier provides a single output signal in a first operating mode or a plurality of output signals in a second operating mode. The configurable degeneration inductor is coupled to the gain transistor and provides a first source degeneration inductance in the first operating mode or a second source degeneration inductance in the second operating mode. The second source degeneration inductance is less than the first source degeneration inductance and may be dependent on the number of output signals generated in the second operating mode. | 08-28-2014 |
20140253242 | AMPLIFIERS WITH INDUCTIVE DEGENERATION AND CONFIGURABLE GAIN AND INPUT MATCHING - Amplifiers with inductive degeneration and configurable gain and input matching are disclosed. In an exemplary design, an apparatus includes a gain transistor, an inductor, and an input matching circuit for an amplifier. The gain transistor has a variable gain determined based on its bias current. The inductor is coupled between the gain transistor and circuit ground. The input matching circuit is selectively coupled to the gain transistor based on the variable gain of the gain transistor. For example, the input matching circuit may be coupled to the gain transistor in a low-gain mode and decoupled from the gain transistor in the high-gain mode. In an exemplary design, the input matching circuit includes a resistor, a capacitor, and a second transistor coupled in series. The resistor is used for input matching of the amplifier. The second transistor couples or decouples the resistor to or from the gain transistor. | 09-11-2014 |
20140266461 | SPLIT AMPLIFIERS WITH IMPROVED LINEARITY - Split amplifiers with configurable gain and linearization circuitry are disclosed. In an exemplary design, an apparatus includes first and second amplifier circuits and a linearization circuit, which may be part of an amplifier. The first and second amplifier circuits are coupled in parallel and to an amplifier input. The linearization circuit is also coupled to the amplifier input. The first and second amplifier circuits are enabled in a high-gain mode. One of the first and second amplifier circuits is enabled in a low-gain mode. The linearization circuit is enabled in the second mode and disabled in the first mode. The amplifier is split into multiple sections. Each section includes an amplifier circuit and is a fraction of the amplifier. High linearly may be obtained using one amplifier circuit and the linearization circuit in the low-gain mode. | 09-18-2014 |
20140300417 | AMPLIFIERS WITH BOOSTED OR DEBOOSTED SOURCE DEGENERATION INDUCTANCE - Amplifiers with boosted or deboosted source degeneration inductance are disclosed. In an exemplary design, an apparatus includes an amplifier circuit and a feedback circuit. The amplifier circuit receives an input signal and provides an output signal and includes a source degeneration inductor. The feedback circuit is coupled between a node of the amplifier circuit and the source degeneration inductor. The feedback circuit provides feedback to vary an input impedance of an amplifier including the amplifier circuit and the feedback circuit. The feedback circuit may be programmable and may be enabled to provide feedback or disabled to provide no feedback. Alternatively, the feedback circuit may always be enabled to provide feedback. In either case, the feedback circuit may have a variable gain to provide a variable input impedance for the amplifier. | 10-09-2014 |
20140302802 | ROUTING AND SHIELDING OF SIGNAL LINES TO IMPROVE ISOLATION - Techniques for routing and shielding signal lines to improve isolation between the signal lines are disclosed. In an exemplary design, an apparatus includes first, second, and third signal lines and a switch. The first, second, and third signal lines are configurable to carry first, second, and third signals, respectively. The switch is coupled between the second signal line and AC ground and is closed when the second signal line is not carrying the second signal. The second signal line isolates the first and third signal lines when the switch is closed. Adjacent signal lines are not active at the same time. A signal line may include positive and negative signal lines, which may have at least one cross over in order to cancel coupling between the positive and negative signal lines. | 10-09-2014 |
20140347142 | TRANSFORMER WITH INTEGRATED NOTCH FILTER - Techniques for providing low-cost and effective jammer rejection for a radio receiver. In an aspect, a notch filter is provided between a transformer and a differential mixer in the receiver. The notch frequency of the notch filter may be selected to correspond to an expected jammer frequency to effectively attenuate the jammer signal prior to down-conversion mixing by the mixer. The notch filter may be implemented using various techniques, e.g., an L-C combination having adjustable capacitance, and/or elliptic or Chebyshev filters. | 11-27-2014 |
20140348274 | RECEIVER FRONT END FOR CARRIER AGGREGATION - Techniques for providing a receiver front end supporting carrier aggregation with gain alignment and improved matching across modes. In an aspect, auxiliary circuitry is configurable to selectively enable or disable mutual coupling between a source degeneration inductor of an LNA input transistor and an auxiliary inductor. A negative turns ratio coupling is provided between the inductors, such that the effective inductance of the source degeneration inductor is lowered when mutually coupled to the auxiliary inductor. In a non-carrier aggregation (non-CA) mode, the auxiliary inductor is disabled, while in a carrier aggregation (CA) mode, the auxiliary inductor is enabled. In this manner, using a single transistor, gain alignment across non-CA and CA modes is achieved. Furthermore, matching is preserved across non-CA and CA modes using a single external matching component. | 11-27-2014 |
20150035600 | AMPLIFIERS WITH CONFIGURABLE MUTUALLY-COUPLED SOURCE DEGENERATION INDUCTORS - Amplifiers with configurable mutually-coupled source degeneration inductors are disclosed. In an exemplary design, an apparatus (e.g., a wireless device or an integrated circuit) includes a gain transistor and a plurality of inductors, which may implement an amplifier. The gain transistor receives an input signal and provides an amplified signal. The plurality of inductors are mutually coupled, are coupled to the gain transistor, and provide a programmable source degeneration inductance for the gain transistor. The inductors may have a positive coupling coefficient and may provide a larger source degeneration inductance. Alternatively, the inductors may have a negative coupling coefficient and may provide a smaller source degeneration inductance. | 02-05-2015 |
20150070803 | ELECTRO-STATIC DISCHARGE PROTECTION FOR INTEGRATED CIRCUITS - Techniques for improving electro-static discharge (ESD) performance in integrated circuits (IC's). In an aspect, one or more protective diodes are provided between various nodes of the IC. For example, protective diode(s) may be provided between the drain and gate of an amplifier input transistor, and/or between the drain and ground, etc. In certain exemplary embodiments, the amplifier may be a cascode amplifier. Further aspects for effectively dealing with ESD phenomena are described. | 03-12-2015 |
20150084688 | BASEBAND PROCESSING CIRCUITRY - Techniques for designing baseband processing circuitry for radio IC's. In an aspect, techniques for differential-to-single-ended conversion in a baseband portion of the IC are disclosed to reduce the pin count and package size for RF IC's. In another aspect, the converter includes selectable narrowband and wideband amplifiers, wherein the wideband amplifiers may be implemented using transistor devices having smaller area than corresponding transistor devices of narrowband amplifiers. Further techniques for bypassing one or more elements, and for implementing a low-pass filter of the converter using an R-C filter network, are described. | 03-26-2015 |
Mann Chang, Irvine, CA US
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20090077043 | SYSTEM AND METHOD FOR ACCESSING NON-COMPATIBLE CONTENT REPOSITORIES - Systems and methods access non-compatible content repositories that are not natively accessible to a content management system. A metadata registry maintains metadata about content stored in both compatible and non-compatible repositories. For content in a non-compatible repository, the metadata indicates a repository interface capable of accessing the non-compatible repository. The content manager communicates with the repository interfaces to access the content in non-compatible repositories. The content manager may receive a request for content in a non-compatible repository, refer to the metadata registry to select a repository interface to employ, transmit a request for the requested content to the selected repository interface, and receive the requested content from the repository interface. A repository interface registry maintains information about available repository interfaces. Entries may be added to either the metadata registry and the repository interface registry, thus allowing the systems and methods to be extended to be able to access additional non-compatible repositories. | 03-19-2009 |
Matthew Chang, Irvine, CA US
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20110319845 | Diaper structure with urine sensor - The present invention is to provide a diaper structure including two electrode strips, wherein the two electrode strips are disposed inside the diaper at a bottom position thereof and electrically connected to each other when both in contact with urine, and two metal button seats are disposed inside the diaper and are electrically connected to the two electrode strips respectively. Each of the two metal button seats has a first fastening portion disposed on the outside surface of the diaper and fastened with an electrical detection device, so that the two metal button seats are electrically connected to the electrical detection device via the two first fastening portions respectively for enabling the electrical detection device to send out a wetness signal when the two electrode strips are electrically connected to each other due to in contact with urine, thereby urging the caregiver to change the diaper structure immediately. | 12-29-2011 |
Ray-Chi Chang, Irvine, CA US
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20110141291 | MULTI-PHASE BLACK LEVEL CALIBRATION METHOD AND SYSTEM - Multi-phase black level calibration (BLC) methods and systems are generally disclosed. According to one embodiment of the present invention, an image sensor comprises a pixel sensor array, a timing generator, and a front-end processing block. The front-end processing block also includes a first summing junction, a first BLC block, and a second BLC block. According to a first timing signal from the timing generator, the first BLC block is configured to iteratively generate a first calibration signal in a first phase based on a first set of adjusted black level signals associated with a first set of black pixels, a changing accumulator step, and a predetermined condition associated with a first target black level. According to a second timing signal from the timing generator, the second BLC block is configured to generate a second calibration signal for a second summing junction to apply to an image signal associated with one or more active pixels in the frame in a second phase. | 06-16-2011 |
Ricky Chang, Irvine, CA US
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20090281677 | SYSTEMS AND METHODS FOR ASSESSING AND OPTIMIZING ENERGY USE AND ENVIRONMENTAL IMPACT - Systems and methods for assessing and optimizing energy use and environmental impact can be designed to receive energy consumption and emission data from one or more energy consumption sources of a facility over a network. The data can be transformed into a database format that can be processed and analyzed. The data can be validated according to predefined validation rules. The data can be aggregated according to predefined time intervals and stored in memory. The data can be used to generate a report to a user, for example, via a user interface. | 11-12-2009 |
20100145629 | SYSTEMS AND METHODS FOR ASSESSING AND OPTIMIZING ENERGY USE AND ENVIRONMENTAL IMPACT - Systems and methods for assessing and optimizing energy use and environmental impact can be designed to receive energy consumption and emission data from one or more energy consumption sources of a facility over a network. The data can be transformed into a database format that can be processed and analyzed. The data can be validated according to predefined validation rules. The data can be aggregated according to predefined time intervals and stored in memory. The data can be used to generate a report to a user, for example, via a user interface. | 06-10-2010 |
Rong-Feng Chang, Irvine, CA US
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20090031044 | High-Speed MAC Address Search Engine - Disclosed is an apparatus and method for storing and searching computer node addresses in a computer network system. In one embodiment, the apparatus comprises a frame forwarding device such as a switch. The switch includes two MAC address tables including a primary MAC address table and secondary MAC address table both for storing and searching MAC addresses. The primary table stores records that contain compressed values of MAC addresses. The records are contained in storage locations that are referenced using the compressed value of the MAC address as a search index. In order to account for searching collisions that may result from different MAC addresses compressing to the same value, each record in the primary address table is linked to a chain of records in the secondary table. The records in the secondary table store the full value of the MAC address. Each chain of records in the secondary address table contains MAC addresses the present invention. | 01-29-2009 |
20090086733 | Compact Packet Switching Node Storage Architecture Employing Double Data Rate Synchronous Dynamic RAM - A two-chip/single-die switch architecture and a method for accessing a DDR SDRAM memory store in a switching environment are presented. The two-chip/single-die architecture includes an internal memory storage block on the single-die, an external memory storage interface to a Double Data Rate Synchronous Dynamic Random Access Memory (DDR SDRAM), an external memory manager, and a packet data transfer engine effecting packet data transfers between an internal memory store and the external DDR SDRAM memory. The packet data transfer engine operates as an adaptation layer addressing issues related to employing appropriate: addressing schemes, granule sizes, memory transfer burst sizes, access timing, etc. The packet data transfer engine includes a minimal number of dual mode operational blocks such as: a queue manager, and adaptation receive and transmit blocks. The method relates to a packet data transfer discipline addressing random memory access latencies incurred in employing DDR SDRAM, using predictive bank switching to hide random access latencies, packet length dependent variable memory write burst lengths to minimize bank switching, and performing memory read and write operations during corresponding read and write windows. Advantages are derived from the a space-efficient two-chip/single-die switching node architecture implemented with a reduced amount of dual mode logic, and also from DDR SDRAM bandwidth utilization efficiencies. | 04-02-2009 |
Ruisheng Chang, Irvine, CA US
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20120279845 | Use of Micro-Structured Plate for Controlling Capacitance of Mechanical Capacitor Switches - Micro capacitive switches and methods of manufacturing micro capacitive switches at variable nominal capacitance value using micro-structures on the contact plates of the same dimension. In a preferred embodiment, a separately manufactured contact plate can be mounted to a movable magnet in order to be actuated to “on” and “off” state of the capacitive switch. Depending on the contact plate's surface condition, variable contact capacitance at “on” state can be precisely specified by geometrical properties of the micro-structures on the surface, such as the density, size and depth. | 11-08-2012 |
Sheng-Chiao Chang, Irvine, CA US
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20100150368 | Apparatus, System, and Method for Audio Communications - An apparatus is provided in one example embodiment and includes an earpiece that includes at least one switch that senses physical contact with an end user operating the apparatus. The contact triggers an application to be initiated for the apparatus. In more specific embodiments, one or more additional switches are provided to sense physical contact from the end user and trigger the application based on at least two of the switches sensing the contact. In still other embodiments, a microphone is provided and is coupled to a body element and operable to receive voice data from the end user. | 06-17-2010 |
William W. Chang, Irvine, CA US
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20120116444 | APPARATUSES AND METHODS FOR TREATING WOUNDS - A clamp apparatus is particularly configured for controlling bleeding by applying localized pressure to a wound site without strangulating the body member. A restraint supports the body member and inhibits bending thereof. A clear pressure pad having a protuberance is applied to the wound site. The protuberance may include a magnifying lens to magnify the wound site. Slots may be formed in the protuberance and a backing and aligned to receive a needle so that the transparent, magnifying pressure pad may be applied to a patient while undergoing an injective procedure, e.g., angiography. A pressure source provides force to the pressure pad. Strangulation is either prevented by wrapping an inflatable pressure cuff around the restraint or facilitated by wrapping the cuff directly around the body member without a restraint. An inflatable pressure pad is also provided to be applied to a wound site without a restraint. | 05-10-2012 |
Zensheu Chang, Irvine, CA US
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20080258841 | Wireless acoustic-electric feed-through for power and signal transmission - An embodiment provides electrical energy from a source on one side of a medium to a load on the other side of the medium, the embodiment including a first piezoelectric to generate acoustic energy in response to electrical energy from the source, and a second piezoelectric to convert the received acoustic energy to electrical energy used by the load. Other embodiments are described and claimed. | 10-23-2008 |