Patent application number | Description | Published |
20100321841 | ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT - Disclosed herein are embodiments of electrostatic discharge (ESD) protection circuits. In certain embodiments an ESD protection circuit may include two series resistor-capacitor (RC) circuits. One series RC circuit may have a short time constant and may selectively activate a current shunt between two power rails in response to an ESD event. Accordingly, the ESD circuit may be able to respond to fast ramping ESD events. The other series RC circuit has a longer time constant, and maintains the current shunt in an active state for a sufficient amount of time to allow the ESD event to be completely discharged. | 12-23-2010 |
20120212260 | Dynamic Feedback-Controlled Output Driver with Minimum Slew Rate Variation from Process, Temperature and Supply - In examples, apparatus and methods are provided that mitigate buffer slew rate variations due to variations in output capacitive loading, a fabrication process, a voltage, and/or a temperature (PVT). An exemplary embodiment includes an inverting buffer having an input and an output, as well as an active resistance series-coupled with a capacitor between the input and the output. The resistance of the active resistance varies based on a variation in a fabrication process, a voltage, and/or temperature. The active resistance can be a passgate. In another example, a CMOS inverter's output is coupled to the input of the inverting buffer, and two series-coupled inverting buffers are coupled between the input of the CMOS inverter and the output of the inverting buffer. | 08-23-2012 |
20130181751 | SLEW-RATE LIMITED OUTPUT DRIVER WITH OUTPUT-LOAD SENSING FEEDBACK LOOP - Output driver feedback circuitry is configured to sense an amount of output capacitance of an output pad and to adjust the strength of the output driver accordingly. The feedback circuitry adjusts the output driver within a single cycle. A chain of delay reference signals is generated by representative capacitive loads that replicate a range of actual output loads. Adjustments to the output driver are based on a comparison of the delay reference signals with output of the output driver. | 07-18-2013 |
20130181759 | ON-CHIP COARSE DELAY CALIBRATION - Process, voltage and temperature corners of an on-chip device under calibration are obtained by comparing the outputs of different on-chip components such as active on-chip components and passive-on chip components in response to an input. A first on-chip delay line including a number of active devices, which generate an array of outputs D[ ]) at different stages of the delay. A second on-chip delay line generates a single output (CLK). A DFF array samples the array of outputs (D[ ]) with the single output clock CLK. The different delay variations in different process and temperature corners cause different outputs from the DFF array. The different outputs from the DFF array provide information about the process and temperature corner that can be for rapid calibration of the on-chip device under calibration within one cycle of the CLK. | 07-18-2013 |
20130187692 | TRANSITION TIME LOCK LOOP WITH REFERENCE ON REQUEST - Output driver feedback circuitry limits output slew rates across a wide range of output loads. A transition time lock loop architecture of the feedback circuitry compares a transition time pulse with a reference pulse to adjusts transition time of an output signal for various process-voltage-temperature (PVT) process corners, output voltage domains and output capacitances. Reference pulse generation circuitry provides a reference pulse in phase with the transition time pulse for each rise and fall of the output signal. | 07-25-2013 |
20140091860 | SYSTEM AND METHOD OF IMPLEMENTING INPUT/OUTPUT DRIVERS WITH LOW VOLTAGE DEVICES - An input/output (I/O) driver is disclosed that employs a compensation circuit to limit the voltages across devices of the driver from exceeding a defined threshold to allow lower voltage devices to implement the operation of the driver. In particular, the driver employs a pull-up circuit including first and second switching devices coupled between a first voltage rail and an output of the driver. The driver employs a pull-down circuit including third and fourth switching devices coupled between the output and a second voltage rail. The I/O driver employs a compensation circuit configured to apply a compensation voltage to the node between the first and second switching devices and to the node between the third and fourth switching devices at the appropriate times to maintain the respective voltages across the second and third switching devices at or below a defined threshold, such as a reliability limit, during the operation of the driver. | 04-03-2014 |
20140098448 | ELECTROSTATIC PROTECTION FOR STACKED MULTI-CHIP INTEGRATED CIRCUITS - One feature pertains to a multi-chip module that comprises at least a first integrated circuit (IC) die and a second IC die. The second IC die has an input/output (I/O) node electrically coupled to the first IC die by a through substrate via. The second die's active surface also includes a fuse that is electrically coupled to the I/O node and adapted to protect the second IC die from damage caused by an electrostatic discharge (ESD). In particular, the fuse protects the second IC die from ESD that may be generated as a result of electrically coupling the first die to the second die during the manufacturing of the multi-chip module. Upon coupling the first die to the second die, the fuse may bypass the ESD current generated by the ESD to ground. After packaging of the multi-chip module is complete, the fuse may be blown open. | 04-10-2014 |
20140327105 | ELECTROSTATIC DISCHARGE DIODE - A method includes thinning a back-side of a substrate to expose a portion of a first via that is formed in the substrate. The method also includes forming a first diode at the back-side of the substrate. The first diode is coupled to the first via. | 11-06-2014 |
20150042401 | PASSING HIGH VOLTAGE INPUTS USING A CONTROLLED FLOATING PASS GATE - An input receiver includes a first pass transistor coupled between an input pad and an internal receiver node. The first pass transistor includes a controlled floating gate capacitively coupled to the input pad. A source follower transistor couples between the internal receiver node and a power supply. A gate for the source follower transistor couples to the input pad. | 02-12-2015 |
Patent application number | Description | Published |
20080317731 | Phospholipases, Nucleic Acids Encoding Them and Methods for Making and Using Them - The invention provides novel polypeptides having phospholipase activity, including, e.g., phospholipase A, B, C and D activity, patatin activity, phosphatidic acid phosphatases (PAP)) and/or lipid acyl hydrolase (LAH) activity, nucleic acids encoding them and antibodies that bind to them. Industrial methods, e.g., oil degumming, and products comprising use of these phospholipases are also provided. | 12-25-2008 |
20090053191 | PHOSPHOLIPASES, NUCLEIC ACIDS ENCODING THEM AND METHODS FOR MAKING AND USING THEM - The invention provides novel polypeptides having phospholipase activity, including, e.g., phospholipase A, B, C and D activity, patatin activity, lipid acyl hydrolase (LAH) activity, nucleic acids encoding them and antibodies that bind to them. Industrial methods, e.g., oil degumming, and products comprising use of these phospholipases are also provided. | 02-26-2009 |
20100216192 | TAILORED MULTI-SITE COMBINATORIAL ASSEMBLY - The present invention provides a novel method of producing a plurality of modified polynucleotides having different combinations of various mutations at multiple sites by a tailored multi-site combinatorial assembly, comprising adding at least two or at least three primers to a double stranded template polynucleotide in a single reaction mixture, wherein the primers are not overlapping, and wherein each of the primers comprise at least one mutation different from the other primers, wherein at least one primer is a forward primer that can anneal to a minus strand of the template and at least one primer is a reverse primer that can anneal to a plus strand of the template, and subjecting the reaction mixture to a polymerase extension reaction to yield a plurality of extended modified polynucleotides from the at least three primers. The method can be performed without employing a ligation step prior to transforming the extended modified polynucleotides into a cell. The plurality of extended modified polynucleotides can be treated with an enzyme for destroying the template polynucleotide prior to transforming in to the cell. | 08-26-2010 |
20120100581 | PHOSPHOLIPASES, NUCLEIC ACIDS ENCODING THEM AND METHODS FOR MAKING AND USING THEM - The invention provides novel polypeptides having phospholipase activity, including, e.g., phospholipase A, B, C and D activity, patatin activity, phosphatidic acid phosphatases (PAP)) and/or lipid acyl hydrolase (LAH) activity, nucleic acids encoding them and antibodies that bind to them. Industrial methods, e.g., oil degumming, and products comprising use of these phospholipases are also provided. | 04-26-2012 |
20150072397 | GENE ENCODING CELLULASE - Polynucleotide sequences are provided encoding a thermostable cellulase and directing its increased expression are provided, and the use of the thermostable cellulase in hydraulic fracturing methods and the treatment of flowback fluids. | 03-12-2015 |
20150087029 | GENES ENCODING CELLULASE FOR HYDROLYZING GUAR FRACTURING FLUIDS UNDER EXTREME WELL CONDITIONS - Polynucleotide sequences encoding a thermostable cellulase and directing its increased expression are provided, and hydraulic fracturing compositions comprising such thermostable cellulase. | 03-26-2015 |
Patent application number | Description | Published |
20100260757 | USE OF PLP WITH PEG-rMETase IN VIVO FOR ENHANCED EFFICACY - This invention relates to methods of modifying pyridoxal 5′ phosphate (PLP) dependent enzymes to extend the serum half-life of the enzyme, extend the in vivo period of methionine depletion in a host, and decrease the immunogenicity of the enzyme. A preferred PLP-dependent enzyme to be modified is a methioninase, preferably a recombinant methioninase (rMETase). The invention further relates to compositions comprising a modified PLP-dependent enzyme and methods of using the same. | 10-14-2010 |
20100331529 | METHODS FOR INCREASING PROTEIN POLYETHYLENE GLYCOL (PEG) CONJUGATION - The present invention relates to highly conjugated proteins and methods for making such proteins. In particular, the present invention relates to methods for linking additional sites to a protein for conjugation with activated polyethylene glycol (PEG) linkers, without denaturing the protein. The invention also relates to highly conjugated proteins with decreased immunogenicity and increased circulating half-life. | 12-30-2010 |
20120316321 | METHODS FOR IDENTIFYING MARKERS FOR EARLY-STAGE HUMAN CANCER, CANCER PROGRESSION AND RECURRENCE - A method is described to identify secreted proteins identified with stages of malignancy of cancer. The proteins are initially identified by trapping them with a fluorescent protein containing vector that can insert in any gene. The secreted proteins are initially identified by their fluorescence. Secreted proteins identifying tumors with specific degrees of malignancy are isolated to determine if they can serve as markers of cancer progression. | 12-13-2012 |
20130252306 | METHODS FOR INCREASING PROTEIN POLYETHYLENE GLYCOL (PEG) CONJUGATION - The present invention relates to highly conjugated proteins and methods for making such proteins. In particular, the present invention relates to methods for linking additional sites to a protein for conjugation with activated polyethylene glycol (PEG) linkers, without denaturing the protein. The invention also relates to highly conjugated proteins with decreased immunogenicity and increased circulating half-life. | 09-26-2013 |
20140193801 | SCHIFF-BASE CONJUGATE OF N, N-DIBUTYL-P-PHENYLENEDIAMINE WITH PYRIDOXAL 5'-PHOSPHATE FOR IMPROVED HOMOCYSTEINE ASSAYS USING PYRIDOXAL 5'-PHOSPHATE-DEPENDENT ENZYMES - A composition, method and kit for performing a two-reagent enzymatic homocysteine assay, wherein a single homocysteinase enzyme and a Schiff-based conjugate of N,N-dibutyl-p-phenyldiamine (DBPDA) with pyridoxal 5′-phosphate (PLP) are used to measure total homocysteine in plasma or serum. The assay measures a chromophore reaction product of H | 07-10-2014 |
20140205583 | USE OF PLP WITH PEG-rMETase IN VIVO FOR ENHANCED EFFICACY - This invention relates to methods of modifying pyridoxal 5′ phosphate (PLP) dependent enzymes to extend the serum half-life of the enzyme, extend the in vivo period of methionine depletion in a host, and decrease the immunogenicity of the enzyme. A preferred PLP-dependent enzyme to be modified is a methioninase, preferably a recombinant methioninase (rMETase). The invention further relates to compositions comprising a modified PLP-dependent enzyme and methods of using the same. | 07-24-2014 |