Hwang, Hwaseong-Si
Byoung Won Hwang, Hwaseong-Si KR
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20110074754 | DEVICE FOR GENERATING RGB GAMMA VOLTAGE AND DISPLAY DRIVING APPARATUS USING THE SAME - The present invention relates to a device for generating RGB gamma voltage and a display driving apparatus using the same. The device for generating RGB gamma voltage includes: an RGB gamma compensation voltage output unit that outputs a plurality of R, G, B gamma compensation voltage corresponding to gamma compensation data with respect to R, G, and B signals; a multiplexer that receives the R, G, and B gamma compensation voltages among the outputted gamma compensation voltages one by one and selects and outputs any one gamma compensation voltage among the R, G, and B gamma compensation voltages in accordance with an RGB selection control signal; and a multiplexer controller that generates an RGB selection control signal corresponding to an output order of the R, G, and B signals and transmits the generated signal to the multiplexer and controls the signal outputted from the multiplexer in accordance with the RGB selection control signal. | 03-31-2011 |
20110074805 | MEDIAN FILTER, APPARATUS AND METHOD FOR CONTROLLING AUTO BRIGHTRNESS USING THE SAME - The present invention provides an automatic brightness control device including an illuminance sensing unit for sensing an external illuminance value in real time; a brightness classifying unit for classifying the illuminance value sensed in real time by the illuminance sensing unit into two or more configured brightness levels by comparing the sensed illuminance value with a reference illuminance value; a median filter unit for filtering a median value among the brightness levels classified by the brightness classifying unit; a gamma curve selecting unit for selecting a gamma curve which corresponds to the median value filtered by the median filter unit; and an illuminance control unit for controlling illuminance according to the gamma curve selected by the gamma curve selecting unit. | 03-31-2011 |
Chang Wan Hwang, Hwaseong-Si KR
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20150148557 | MOLECULAR LAYER DEPOSITION USING REDUCTION PROCESS - A material is deposited onto a substrate by exposing the substrate to a metal-containing precursor to adsorb metal atoms of the metal-containing precursor to the substrate. The substrate injected with the metal-containing precursor is exposed to an organic precursor to deposit a layer of material by a reaction of the organic precursor with the metal atoms adsorbed to the substrate. The substrate is exposed to radicals of a reducing agent to increase reactivity of the material deposited on the substrate. The radicals of the reducing agent are produced by applying a voltage differential with electrodes to a gas such as hydrogen. The substrate may be exposed to radicals before and/or after exposing the substrate to the organic precursor. The substrate may be sequentially exposed to two or more different organic precursors. The material deposited on the substrate may be a metalcone such as Alucone, Zincone, Zircone, Titanicone, or Nickelcone. | 05-28-2015 |
20150159271 | DEPOSITION OF NON-ISOSTRUCTURAL LAYERS FOR FLEXIBLE SUBSTRATE - A plurality of non-isostructural layers are deposited onto a substrate. An inorganic layer is deposited onto the substrate by adsorbing metal atoms to the substrate. The inorganic layer on the substrate is exposed to a hydrocarbon-containing source precursor to deposit a first hydrocarbon-containing layer by adsorbing the hydrocarbon-containing source precursor onto the inorganic layer. The first hydrocarbon-containing layer on the substrate is exposed to a reactant precursor to increase reactivity of the first hydrocarbon-containing layer on the substrate, and a second hydrocarbon-containing layer is deposited onto the first hydrocarbon-containing layer on the substrate. The process may be repeated to deposit the plurality of layers. The second hydrocarbon-containing layer may have higher hydrocarbon content and may be deposited at a higher deposition rate than the first hydrocarbon-containing layer. | 06-11-2015 |
20160032452 | Atomic Layer Deposition Method Using Source Precursor Transformed by Hydrogen Radical Exposure - A film of source precursor molecules injected onto a substrate are reacted with hydrogen radicals, such as those produced in a hydrogen plasma, prior to reaction with a reactant precursor. This replaces the functional groups of the reactant precursor (e.g., methyl groups in alkyl groups) with hydrogen, thus reducing the overall size of the source precursor molecule. An additional cycle of source precursor molecules are injected onto the substrate, some of which occupy portions of the substrate surface left unoccupied by the now absent methyl functional groups. This increases the density of source precursor molecules (i.e., reaction sites) on the substrate. The reactivity of the source precursor molecules exposed to hydrogen radicals (or an H | 02-04-2016 |
Chang Youn Hwang, Hwaseong-Si KR
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20080205841 | OPTICAL WAVEGUIDE SHEET AND MANUFACTURING METHOD THEREOF - An optical waveguide sheet that has an auxiliary layer for preventing light transmitted through the waveguide sheet from leaking or being lost and a manufacturing method thereof. The waveguide sheet transmits light from a light emitting element thereinto, and has a reflecting pattern for reflecting light forward. At least one auxiliary layer for providing a total reflection condition for preventing the light from leaking or being lost when the light is transmitted into the waveguide sheet is coated on the waveguide sheet. | 08-28-2008 |
20090093282 | MOBILE COMMUNICATION TERMINAL HAVING FRAGRANCE MEMBER - A mobile communication terminal includes a fixed body, and a movable body coupled with the fixed body. At least one of the fixed body and the movable body has a fragrance member at a portion thereof that generates friction when the movable body moves. | 04-09-2009 |
20140118903 | CASE FRAME AND MANUFACTURING METHOD THEREOF - A case frame used in various devices and a method of manufacturing the case frame are provided. The method includes forming the case frame in a shape corresponding to a product to which the case frame is applied, forming a first painting layer with a color of a material applied to a surface of the formed case frame, depositing a transparent oxide deposition layer having a refractive index on an upper portion of the first painting layer, and forming a second painting layer on an upper portion of the transparent oxide deposition layer. Accordingly, the case frame can have an excellent texture by reproducing a brightness and a color anisotropy on the basis of a viewing angle by adding only a simple manufacturing process, thereby being able to improve quality of an electronic device in general and to promote a user's desire for purchasing the device. | 05-01-2014 |
20140266924 | ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME - An electronic device and a method for manufacturing an outer housing of the electronic device are provided. The electronic device includes an outer housing including a portion including a base including a non-conductive material and a plurality of islands formed on or above the base, wherein the plurality of islands include metallic materials, wherein the plurality of islands are spaced apart from each other, and wherein the plurality of islands form a two-dimensional (2D) pattern. The method includes injection-molding a base and forming a plurality of islands on or above the base, wherein the plurality of islands include metallic materials, and wherein the plurality of islands are spaced apart from each other to form a 2D pattern. | 09-18-2014 |
20150065209 | COVER MEMBER AND METHOD FOR MANUFACTURING THE SAME - A cover member and a method for manufacturing the same are provided. The cover member includes a case on at least a portion of which a material pattern is formed and a color layer formed on the material pattern provided on the case, in which a portion of the color layer is at least partially marked different from the material pattern. | 03-05-2015 |
Chan Soo Hwang, Hwaseong-Si KR
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20100110970 | WIRELESS NETWORK USING SUPERPOSITION CODING SCHEME - An operation method of a relay node in a wireless network using a superposition coding scheme is provided. In particular, a relay node may receive a first transmission message from a first source node in a first time slot. The relay node may also receive a second transmission message from a second source node in a second time slot. The relay node may then transmit a relay message to a first destination node corresponding to the first source node and a second destination node corresponding to the second source node in a third time slot, the relay message being associated with the first transmission message and the second transmission message | 05-06-2010 |
Daegil Hwang, Hwaseong-Si KR
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20120085589 | Muffler for Vehicle - A muffler for a vehicle includes a plurality of baffles fixed at a predetermined distance in a longitudinal direction of a muffler housing, an exhaust gas inflow pipe, an intermediate pipe, and a plurality of exhaust gas outflow pipes having an inlet thereof positioned in the same chamber defined by the adjacent pair of the baffles with the outlet of the intermediate pipe to considerably reduce exhaust noise, flow-induced noise, and booming noise of exhaust gas. The muffler is effectively protected from thermal damage of a vehicle by implementing a sound-absorbing heat-insulating material therein, and impresses consumers with dynamic, powerful, and polished image by making the exhaust gas outflow pipe in a dual type composed of first and second exhaust gas outflow pipes and disposing the outlet at the lower center of a rear bumper to be exposed to the outside, thereby considerably improving productivity of vehicles. | 04-12-2012 |
Deagil Hwang, Hwaseong-Si KR
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20120055736 | MUFFLER FOR VEHICLE - A muffler for a vehicle may include a plurality of baffles to form a plurality of chambers, an exhaust gas inflow pipe having an outlet connected to one of the chambers inside the muffler housing through the baffles, an intermediate pipe disposed in parallel with the exhaust gas inflow pipe in the muffler housing through the baffles to fluid connect at least two chambers and a plurality of exhaust gas outflow pipes having an inlet positioned with an outlet of the intermediate pipe in any one chamber divided by the baffles and an outlet protruding outward through the muffler housing, without passing through the baffles, such that the exhaust gas passing through the intermediated pipe may be discharged outside the muffler housing. | 03-08-2012 |
Eui-Seok Hwang, Hwaseong-Si KR
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20090067623 | Method and apparatus for performing fast authentication for vertical handover - A method and apparatus for performing fast authentication for a vertical handover are provided. The method includes requesting a handover from a serving network to a target network and generating a derivative Master Session Key (MSK) for key generation, and transmitting the derivative MSK to the target network. Accordingly, a key negotiation process can start by skipping an access authentication process. Therefore, there is an advantage in that a fast authentication process can be achieved. | 03-12-2009 |
20090086679 | Apparatus and method for supporting vertical handover on a wireless communication system - A broadband wireless communication system is provided. An apparatus for an information server (IS) comprises an event module for determining whether updating the network information of at least one access network (AN) is needed, a generator module for generating at least one Information_Get_Request packet for requesting the network information of the at least one AN when the updating is needed, a communication module for transmitting at least one Information_Get_Request packet to the at least one AN, and a database (DB) module for storing network information within an Information_Get_Response packet received from the at least one AN. | 04-02-2009 |
20090088162 | Method and system for supporting IP Multimedia Subsystem for voice call continuity based on media-independent handover - Provided is a method and system for supporting IMS VCC based on an MIH. In a method of supporting a multimedia service for an MIH-based VCC, neighbor network information is obtained from an MIH server periodically or according to an event trigger and scanning the neighbor network. The capacity of at least one more candidate networks is detected from the scanning results to prepare a handover. A target network is determined among the candidate networks to reserve resources and a handover command event is generated to perform a domain transfer. The handover is completed after the performing of the domain transfer. | 04-02-2009 |
20090088163 | Apparatus and method for performing vertical handover in a wireless communication system - A vertical handover method and apparatus in a wireless communication system are provided, in which a serving network selects a target network for a vertical handover of a terminal from among at least one candidate target network to which the terminal can perform the vertical handover, transmits information about the selected target network to the terminal, and requests the vertical handover of the terminal to the target network, the target network acquires a profile of the terminal from a policy store, upon receipt of the vertical handover request from the serving network, the terminal requests a connection to the target network, and the target network transmits information about a router to which the terminal will connect to the terminal, upon receipt of the connection request from the terminal and updates a proxy binding for the terminal in the policy store. | 04-02-2009 |
20090147752 | Method, apparatus and system for assigning internet protocol address in communication system based on media independent handover - Provided is a method, apparatus and system for assigning an IP address in a communication system based on a Media Independent Handover (MIH). In the method, information about a neighbor network is obtained through an MIH service. In the event of a handover to a heterogeneous network, one or more New Care of Addresses (NCoAs) are generated using the information about the neighbor network. The generated NCoA is transmitted to a candidate network through the MIH service. A Duplicate Address Detection (DAD) operation is performed on the NCoA. | 06-11-2009 |
Ho-Bin Hwang, Hwaseong-Si KR
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20120007529 | Image forming apparatus, motor control apparatus and motor control method thereof - An image forming apparatus includes an engine unit used for performing an image forming job, an engine control unit which controls the operation of the engine unit, a brushless direct current (BLDC) motor which drives the engine unit, a sensor unit which senses the driving information of the BLDC motor, a communication interface unit which receives a digital control command with respect to the BLDC motor from the engine control unit, a driving signal unit which generates a driving signal to control the BLDC motor, and a digital control unit which controls the operation of the driving signal unit in a digital PLL manner, based on the received digital control command, the detected driving information and a digital gain value as a control factor with respect to the BLDC motor. | 01-12-2012 |
20130070318 | IMAGE SCANNING APPARATUS AND PAPER TRANSFER METHOD OF THE IMAGE SCANNING APPARATUS - An image scanning apparatus includes a scanning unit which scans paper, a paper transfer unit which transfers the paper to the scanning unit using a BLDC (Brushless DC) motor, a sensor unit which senses driving information of the BLDC motor, a scan controlling unit which controls operations of the scanning unit, and generates a control command including information regarding a driving direction of the BLDC motor, a driving signal unit which generates a driving signal for controlling the BLDC motor, and a digital controlling unit which controls operations of the driving signal unit in a digital method based on a generated control command, sensed driving information and a digital gain value according to a driving direction of the BLDC motor. | 03-21-2013 |
20140070740 | IMAGE FORMING APPARATUS, MOTOR CONTROL APPARATUS AND MOTOR CONTROL METHOD - An image forming apparatus includes an engine unit to perform an image forming job; an engine control unit to control the operation of the engine unit; a brushless direct current (BLDC) motor to drive the engine unit; a sensor unit to sense electric angle information and driving velocity information of the BLDC motor; a communication interface to receive a digital control command with respect to the BLDC motor from the engine control unit; a driving signal unit to generate a driving signal to control the BLDC motor; and a digital control unit to control the operation of the driving signal unit in a digital phase locked loop (PLL) manner for feedback controls the BLDC motor, based on the received digital control command, the detected electric angle information and the driving velocity information and a digital gain value as a control factor with respect to the BLDC motor. | 03-13-2014 |
20140333250 | IMAGE FORMING APPARATUS, MOTOR CONTROL APPARATUS, AND METHOD OF CONTROLLING A MOTOR - An image forming apparatus may include an engine portion used to perform an image forming job, a step motor configured to start the engine portion, a driver including a resistor that measures current that flows to a coil of the step motor and is configured to provide a predetermined constant current to the step motor, and a drive controller configured to measure a load level of the step motor based on a voltage value of the resistor and to control the driver to provide the constant current that corresponds to the measured load level. | 11-13-2014 |
Ho Ik Hwang, Hwaseong-Si KR
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20100157097 | VOICE RECORDABLE TERMINAL AND ITS IMAGE PROCESSING METHOD - A voice recordable terminal and its image processing method are provided. The image processing method includes determining whether or not capturing is selected when a recording function of storing voice data is performed, acquiring at least one meta image when the capturing is selected, and storing at least one voice file including the acquired meta image and the voice data. | 06-24-2010 |
20110159469 | MULTIMEDIA APPARATUS - A multimedia apparatus is provided. The multimedia apparatus extracts a workout prescription including at least one method of exercise based on user information inputted by a user. As a result, the user is able to set and manage his exercise method using the multimedia apparatus. | 06-30-2011 |
20110160550 | METHOD FOR TAGGING CONDITION INFORMATION AND MULTIMEDIA APPARATUS USING THE SAME - A method for tagging condition information and a multimedia apparatus using the same are provided. The method includes measuring condition information of a user who is enjoying content, and tagging the content with the measured condition information. Accordingly, the user's condition information for each content is checked and the user's condition information is adjusted using the condition information tagged onto the contents. | 06-30-2011 |
20110160884 | MULTIMEDIA DEVICE AND METHOD FOR CONTROLLING OPERATION THEREOF - A multimedia apparatus and a method for controlling operations thereof are provided. The multimedia apparatus includes an input unit for receiving a selection signal, a sensing unit for sensing disposition of the multimedia apparatus, and a controller for, if the selection signal is input, performing different operations depending on the disposition. Accordingly, various operations of the multimedia apparatus may be controlled by simple manipulation. | 06-30-2011 |
Hongkyu Hwang, Hwaseong-Si KR
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20100123212 | Semiconductor device and method of manufacturing the same - Provided are a semiconductor device and a method of manufacturing a semiconductor device. The semiconductor device may include first and second conductive lines separated from each other on a semiconductor substrate; a fuse line on the first and second conductive lines; a first conductive via between the fuse line and the first conductive line and a second conductive via between the fuse line and the second conductive line; and a dummy conductive via disposed between the first and second conductive vias, the dummy conductive via being connected to the fuse line so that a portion of the dummy conductive via is removed together with a portion of the fuse line when the fuse line is cut. | 05-20-2010 |
Hong Sun Hwang, Hwaseong-Si KR
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20130159617 | MEMORY SYSTEM, AND A METHOD OF CONTROLLING AN OPERATION THEREOF - A memory system that includes a memory device and a memory controller. The memory device includes a plurality of memory cells, and a first storage unit configured to store information about a weak cell from among the plurality of memory cells. The memory controller is configured to transmit an operation command signal to the memory device, and control an operation of the memory device by using the information about the weak cell provided from the first storage unit. If the operation command signal is related to an operation to be performed using a first of the memory cells and the first memory cell is the weak cell, the memory device is configured to transmit the information about the weak cell to the memory controller. | 06-20-2013 |
20140068203 | MEMORY DEVICE FOR REDUCING A WRITE FAIL, A SYSTEM INCLUDING THE SAME, AND A METHOD THEREOF - A memory system includes a memory device and a memory controller. The memory device includes a plurality of memory cells. The memory controller is configured to continuously perform a plurality of write commands on the memory device between an active command and a precharge command. In the memory system, when after a first write operation having a last write command of the plurality of write commands is performed and then the precharge command is issued, the last write command is issued for a second write operation after the precharge command. The first write operation and the second write operation write a same data to memory cells of plurality of memory cells having a same address. | 03-06-2014 |
Hyungsuk Hwang, Hwaseong-Si KR
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20140253669 | CONFERENCE CALL TERMINAL AND METHOD FOR OPERATING USER INTERFACE THEREOF - A method and an apparatus for operating a User Interface (UI) of a conference call terminal are provided. The method includes operating a first camera and a second camera when a conference call is initiated, outputting an output image of a conference call screen comprising a first image and a second image collected from the first camera and the second camera, the first image and the second image being arranged not to overlap, and distinguishing a speaking person's image from another person's image, when the speaking person's image is detected in the output image of the conference call screen. | 09-11-2014 |
20150220720 | ELECTRONIC DEVICE AND METHOD FOR CONTROLLING ACCESS TO GIVEN AREA THEREOF - A method for operating an electronic device is provided. The method includes determining validity of a first key, generating, when the first key is valid, a second key, and granting access to a designated area of the electronic device by use of the second key. Other various embodiments are possible on the basis of the above method. | 08-06-2015 |
20150269543 | METHOD AND APPARATUS FOR ISSUING ELECTRONIC MONEY AT ELECTRONIC DEVICE - A method and an apparatus for issuing electronic money from an electronic device are provided. The method includes accessing, by a first electronic device, an electronic payment server by executing an electronic payment application, displaying a banking list received from the electronic payment server, displaying a template for creating the electronic money of a specific banking facility selected from the banking list, receiving an input of at least one feature of the electronic money in a template, and transmitting the template including the at least one feature of the electronic money to the electronic payment server to issue the electronic money. | 09-24-2015 |
Hyun Sik Hwang, Hwaseong-Si KR
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20130222355 | ELECTROWETTING DISPLAY DEVICE AND DRIVING METHOD THEREOF - The present invention applies the voltage that is swung to the notch electrode of each pixel of the electrowetting display device to reset the oil layer to not backflow such that an additional element is not disposed in the pixel, thereby increasing the aperture ratio of the pixel. Also, the reset signal generator generating and applying the reset signal is disposed inside the electrowetting display device such that additional wiring may not be disposed in the outer part of the panel. | 08-29-2013 |
20130257914 | ELECTROWETTING DISPLAY DEVICE - A display device includes a display capacitor, a data switching device, and a reset switching device. The data switching device may transmit a data voltage to the display capacitor in response to an activating gate signal that is applied to the data switching device for a activating gate signal duration. The reset switching device may transmit a storage voltage to the display capacitor in response to an activating reset signal that is applied to the first reset switching device for an activating reset signal duration. The storage voltage is configured for resetting a pixel associated with the first display capacitor. The activating reset signal duration is longer than the activating gate signal duration. | 10-03-2013 |
20140085276 | DISPLAY DRIVING METHOD AND INTEGRATED DRIVING APPRATUS THEREOF - A driving method of a display device includes: determining each of a plurality of pixel rows of the display device as one of a motion picture display pixel row and a still image display pixel row by comparing image data of each of the pixel rows in a current frame and in a previous frame; and driving the motion picture display pixel row with a motion picture frequency and driving the still image display pixel row with a still image display frequency, which is lower than or equal to the motion picture frequency, where a plurality of still image display pixel rows are driven with at least two still image display frequencies. | 03-27-2014 |
20140160182 | DISPLAY DEVICE AND DRIVING METHOD THEREOF - A display device includes a display panel including a gate line, a data line, and a pixel connected to the gate line and the data line, a data driver connected to the data line, a gate driver connected to the gate line, and a signal controller controlling the data driver and the gate driver, wherein a circuits powering power source voltage that is normally used for driving the data driver is selectively not applied during a new-image blanking time when the signal controller is not supplying image data to the data driver. | 06-12-2014 |
20150029170 | METHOD OF DRIVING A DISPLAY PANEL AND DISPLAY DEVICE PERFORMING THE SAME - A method of driving a display panel is disclosed. In one aspect, the display panel includes a plurality of pixels, each of the pixels including a first transistor connected to a first gate line and a pixel electrode and a second transistor connected to a second gate line and the pixel electrode. The method including alternately providing the first gate line with a gate signal and a reverse bias signal and alternately providing the second gate line with the gate signal when the first gate line is provided with the reverse bias signal and the reverse bias signal when the first gate line is provided with the gate signal. | 01-29-2015 |
20150062189 | 3D IMAGE DISPLAY APPARATUS AND DRIVING METHOD THEREOF - An image display control unit in a three-dimensional image display apparatus is configured to drive gate lines and the data lines so as to provide the display panel with a left eye image signal during a first frame in which a right eye image signal is displayed on the display panel, and with the right eye image signal during a second frame in which the left eye image signal is displayed on the display panel. During the first frame, each of the pixels provides a second capacitor with the right eye image signal, and a first capacitor with the left eye image signal. During the second frame, each of the pixels provides the first capacitor with the right eye image signal, and the second capacitor with the left eye image signal. A backlight unit maintains a turn-on state during the first and second frames. | 03-05-2015 |
20150192812 | LIQUID CRYSTAL DISPLAY HAVING IMPROVED TRANSMITTANCE AND LUMINANCE CHARACTERISTICS - A liquid crystal display according to an exemplary embodiment includes: a first subpixel electrode configured to have a first voltage applied thereto; a second subpixel electrode configured to have a second voltage applied thereto; a third subpixel electrode configured to have a third voltage applied thereto; an insulating layer between the first subpixel electrode and the second subpixel electrode or between the second subpixel electrode and the third subpixel electrode; and a common electrode configured to have a common voltage applied thereto, wherein the second subpixel electrode and the third subpixel electrode overlap each other with the insulating layer positioned therebetween, the first subpixel electrode and the third subpixel electrode are disposed at opposing sides of the gate line, and the first voltage and the third voltage are different. | 07-09-2015 |
20150221248 | LIQUID CRYSTAL DISPLAY - A liquid crystal display includes: a liquid crystal panel comprising a plurality of pixel areas, each having a plurality of pixels; and a signal controller configured to receive an original image signal and to generate a target image signal corresponding to the original image signal by using a kickback voltage at each gray level in the original image signal, wherein the signal controller comprises a dithering unit configured to generate a corrected image signal based on dithering patterns corresponding to the target image signal. | 08-06-2015 |
In Hwang, Hwaseong-Si KR
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20140050438 | IMPACT SENSOR OF ACTIVE HOOD SYSTEM - An impact sensor of an active hood system includes a rear member, optical fiber sensors, a front member and membrane switch. Each of the optical fiber sensors is disposed on upper and lower portions of a front of the rear member and senses an impact force delivered from a bumper at the time of a crash with a pedestrian. The front member is disposed at the front of the rear member and has a protrusion part pressing the optical fiber sensors by the impact force delivered from the bumper at the time of the crash with the pedestrian. The membrane switch is disposed between the front member and the optical fiber sensor, divided into a plurality of regions from a left of the front member to a right thereof, and configured to sense a region which is pressed when the pedestrian crashes with the region. | 02-20-2014 |
20140138961 | HOOD LATCH STRUCTURE - A hood latch structure may include a base plate mounted in a vehicle, a pole rotatably provided at the base plate, a hood release cable having one end connected to the pole to rotate the pole, and a latch having a first end rotatably mounted at the base plate and a latching groove formed at a center thereof to allow a hood striker to be selectively inserted thereinto, wherein the latching groove may be selectively engaged with the pole. | 05-22-2014 |
Inhyun Hwang, Hwaseong-Si KR
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20140332163 | LAMINATING APPARATUS OF MANUFACTURING ORGANIC LIGHT EMITTING DISPLAY - A laminating apparatus for an organic light emitting display includes a vacuum chamber, a stage disposed in the vacuum chamber, the stage being configured to mounted receive an organic light emitting display substrate module, a sealing unit disposed in the vacuum chamber, the sealing unit being configured to heat and pressurize a peripheral area of the organic light emitting display substrate module and to form a pressurizing line, and a moving unit that controls a location of the sealing unit. The sealing unit has a plurality of heating/pressurizing lines, at least two of imaginary extension lines of the plurality of heating/pressurizing lines meet at a corner. | 11-13-2014 |
In-Hyun Hwang, Hwaseong-Si KR
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20140322842 | DONOR SUBSTRATE, METHOD OF MANUFACTURING DONOR SUBSTRATE, AND METHOD OF MANUFACTURING ORGANIC LIGHT-EMITTING DISPLAY DEVICE - Aspects of the present invention are directed toward donor substrate, method of manufacturing donor substrate, and method of manufacturing organic light-emitting display device. According to an embodiment of the present invention, a donor substrate includes a base layer which includes an element region and an encapsulation region surrounding the element region; a transfer assist layer which is disposed on the base layer and includes a first uneven portion disposed on the encapsulation region; and a transfer layer which is disposed on the transfer assist layer. The first uneven portion is formed on a surface of the transfer assist layer which contacts the transfer layer. | 10-30-2014 |
In-Jun Hwang, Hwaseong-Si KR
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20110062448 | Field effect semiconductor devices and methods of manufacturing field effect semiconductor devices - Field effect semiconductor devices and methods of manufacturing the same are provided, the field effect semiconductor devices include a second semiconductor layer on a first surface of a first semiconductor layer, a first and a second third semiconductor layer respectively on two sides of the second semiconductor layer, a source and a drain respectively on the first and second third semiconductor layer, and a gate electrode on a second surface of the first semiconductor layer. | 03-17-2011 |
20110212582 | Method Of Manufacturing High Electron Mobility Transistor - A method of manufacturing a High Electron Mobility Transistor (HEMT) may include forming first and second material layers having different lattice constants on a substrate, forming a source, a drain, and a gate on the second material layer, and changing the second material layer between the gate and the drain into a different material layer, or changing a thickness of the second material layer, or forming a p-type semiconductor layer on the second material layer. The change in the second material layer may occur in an entire region of the second material layer between the gate and the drain, or only in a partial region of the second material layer adjacent to the gate. The p-type semiconductor layer may be formed on an entire top surface of the second material layer between the gate and the drain, or only on a partial region of the top surface adjacent to the gate. | 09-01-2011 |
20110215378 | High electron mobility transistors exhibiting dual depletion and methods of manufacturing the same - High electron mobility transistors (HEMT) exhibiting dual depletion and methods of manufacturing the same. The HEMT includes a source electrode, a gate electrode and a drain electrode disposed on a plurality of semiconductor layers having different polarities. A dual depletion region exists between the source electrode and the drain electrode. The plurality of semiconductor layers includes an upper material layer, an intermediate material layer and a lower material layer, and a polarity of the intermediate material layer is different from polarities of the upper material layer and the lower material layer. | 09-08-2011 |
20110221482 | Semiconductor device - Provided is a semiconductor device that may include a switching device having a negative threshold voltage, and a driving unit between a power terminal and a ground terminal and providing a driving voltage for driving the switching device. The switching device may be connected to a virtual ground node having a virtual ground voltage that is greater than a ground voltage supplied from the ground terminal and may be turned on when a difference between the driving voltage and the virtual ground voltage is greater than the negative threshold voltage. | 09-15-2011 |
20110272741 | High electron mobility transistors and methods of manufacturing the same - High electron mobility transistors (HEMTs) and methods of manufacturing the same. A HEMT may include a source electrode, a gate electrode, a drain electrode, a channel formation layer including at least a 2-dimensional electron gas (2DEG) channel, a channel supplying layer for forming the 2DEG channel in the channel formation layer, a portion of the channel supplying layer including a first oxygen treated region. The channel supplying layer may include a second oxygen treated region that extends from the first oxygen treated region towards the drain electrode, and the depth and concentration of oxygen of the second oxygen treated region may be less than those of the first oxygen treated region. | 11-10-2011 |
20110272743 | High Electron Mobility Transistors Including Lightly Doped Drain Regions And Methods Of Manufacturing The Same - High electron mobility transistors (HEMTs) including lightly doped drain (LDD) regions and methods of manufacturing the same. A HEMT includes a source, a drain, a gate, a channel supplying layer for forming at least a 2-dimensional electron gas (2DEG) channel, and a channel formation layer in which at least the 2DEG channel is formed. The channel supplying layer includes a plurality of semiconductor layers having different polarizabilities. A portion of the channel supplying layer is recessed. One of the plurality of semiconductor layers, which is positioned below an uppermost layer is an etching buffer layer, as well as a channel supplying layer. | 11-10-2011 |
20110273221 | Driving circuits, power devices and electronic devices including the same - A power device includes a switching device having a control terminal and an output terminal; and a driving circuit configured to provide a driving voltage to the control terminal such that a voltage between the control terminal and the output terminal remains less than or equal to a critical voltage. A rise time required for the driving voltage to reach a target level is determined according to current-voltage characteristics of the switching device. And, when the voltage between the control terminal and the output terminal exceeds the critical voltage, leakage current is generated between the control terminal and the output terminal. | 11-10-2011 |
20110303952 | High Electron Mobility Transistors And Methods Of Fabricating The Same - A High electron mobility transistor (HEMT) includes a source electrode, a gate electrode, a drain electrode, a channel forming layer in which a two-dimensional electron gas (2DEG) channel is induced, and a channel supplying layer for inducing the 2DEG channel in the channel forming layer. The source electrode and the drain electrode are located on the channel supplying layer. A channel increase layer is between the channel supplying layer and the source and drain electrodes. A thickness of the channel supplying layer is less than about 15 nm. | 12-15-2011 |
20120037958 | POWER ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME - According to an example embodiment, a power electronic device includes a first semiconductor layer, a second semiconductor layer on a first surface of the first semiconductor layer, and a source, a drain, and a gate on the second semiconductor layer. The source, drain and gate are separate from one another. The power electronic device further includes a 2-dimensional electron gas (2DEG) region at an interface between the first semiconductor layer and the second semiconductor layer, a first insulating layer on the gate and a second insulating layer adjacent to the first insulating layer. The first insulating layer has a first dielectric constant and the second insulating layer has a second dielectric constant less than the first dielectric constant. | 02-16-2012 |
20120086049 | E-Mode High Electron Mobility Transistor And Method Of Manufacturing The Same - According to an example embodiment, a high electron mobility transistor (HEMT) includes a substrate, a buffer layer on the substrate, a channel layer on the buffer layer, and a barrier structure on the channel layer. The buffer layer includes a 2-dimensional electron gas (2DEG). A polarization of the barrier structure varies in a region corresponding to a gate electrode. The HEMT further includes and the gate electrode, a source electrode, and a drain electrode on the barrier structure. | 04-12-2012 |
20120088341 | Methods Of Manufacturing High Electron Mobility Transistors - The methods may include forming a first material layer on a substrate, increasing electric resistance of the first material layer, and forming a source pattern and a drain pattern, which are spaced apart from each other, on the first material layer, a band gap of the source and drain patterns greater than a band gap of a first material layer. | 04-12-2012 |
20120112202 | E-Mode High Electron Mobility Transistors And Methods Of Manufacturing The Same - An Enhancement-mode (E-mode) high electron mobility transistor (HEMT) includes a channel layer with a 2-Dimensional Electron Gas (2DEG), a barrier layer inducing the 2DEG in the channel layer, source and drain electrodes on the barrier layer, a depletion layer on the barrier layer between the source and drain electrodes, and a gate electrode on the depletion layer. The barrier layer is recessed below the gate electrode and the depletion layer covers a surface of the recess and extends onto the barrier layer around the recess. | 05-10-2012 |
20120280244 | High Electron Mobility Transistors And Methods Of Manufacturing The Same - High electron mobility transistors (HEMTs) and methods of manufacturing the same. A HEMT may include a channel layer and a channel supply layer, and the channel supply layer may be a multilayer structure. The channel supply layer may include an etch stop layer and an upper layer on the etch stop layer. A recess region may be in the upper layer. The recess region may be a region recessed to an interface between the upper layer and the etch stop layer. A gate electrode may be on the recess region. | 11-08-2012 |
20130001587 | HIGH ELECTRON MOBILITY TRANSISTORS AND METHODS OF MANUFACTURING THE SAME - High electron mobility transistors (HEMTs) including a cavity below a drain and methods of manufacturing HEMTS including removing a portion of a substrate below a drain. | 01-03-2013 |
20130032816 | HIGH ELECTRON MOBILITY TRANSISTORS AND METHODS OF MANUFACTURING THE SAME - High electron mobility transistors (HEMTs) including a substrate and a HEMT stack on the substrate, the HEMT stack including a compound semiconductor layer that includes a 2-dimensional electron gas (2DEG), an upper compound semiconductor layer that has a polarization index higher than a polarization index of the compound semiconductor layer, and a source electrode, a drain electrode, and a gate that are disposed on the upper compound semiconductor layer. The substrate may be a nitride substrate that has a dielectric constant and a thermal conductivity higher than a dielectric constant and a thermal conductivity of a silicon substrate. The substrate may include an insulating layer that has a dielectric constant and a thermal conductivity higher than a dielectric constant and a thermal conductivity of the silicon substrate, a metal layer that is deposited on the insulating layer, and a plate that is attached to the metal layer. | 02-07-2013 |
20130069074 | POWER DEVICE AND METHOD OF MANUFACTURING THE SAME - According to an example embodiment, a power device includes a substrate, a nitride-containing stack on the substrate, and an electric field dispersion unit. Source, drain, and gate electrodes are on the nitride-containing stack. The nitride-containing stack includes a first region that is configured to generate a larger electric field than that of a second region of the nitride-containing stack. The electric field dispersion unit may be between the substrate and the first region of the nitride-containing stack. | 03-21-2013 |
20130099285 | HIGH ELECTRON MOBILITY TRANSISTOR HAVING REDUCED THRESHOLD VOLTAGE VARIATION AND METHOD OF MANUFACTURING THE SAME - According to example embodiments a transistor includes a channel layer on a substrate, a first channel supply layer on the channel, a depletion layer, a second channel supply layer, source and drain electrodes on the first channel supply layer, and a gate electrode on the depletion layer. The channel includes a 2DEG channel configured to generate a two-dimensional electron gas and a depletion area. The first channel supply layer corresponds to the 2DEG channel and defines an opening that exposes the depletion area. The depletion layer is on the depletion area of the channel layer. The second channel supply layer is between the depletion layer and the depletion area. | 04-25-2013 |
20130146890 | HIGH ELECTRON MOBILITY TRANSISTOR - A high electron mobility transistor (HEMT) according to example embodiments includes a first semiconductor layer, a second semiconductor layer on the first semiconductor layer, and a reverse diode gate structure on the second semiconductor layer. A source and a drain may be on at least one of the first semiconductor layer and the second semiconductor layer. A gate electrode may be on the reverse diode gate structure. | 06-13-2013 |
20130175538 | SUBSTRATE STRUCTURE, SEMICONDUCTOR DEVICE FABRICATED FROM THE SAME, AND METHOD OF FABRICATING THE SEMICONDUCTOR DEVICE - According to example embodiments, a substrate structure may include a GaN-based third material layer, a GaN-based second material layer, a GaN-based first material layer, and a buffer layer on a non-GaN-based substrate. The GaN-based first material layer may be doped with a first conductive type impurity. The GaN-based second material layer may be doped with a second conductive type impurity at a density that is less than a density of the first conductive type impurity in the first GaN-based material layer. The GaN-based third material layer may be doped with a first conductive type impurity at a density that is less than the density of the first conductive type impurity of the GaN-based first material layer. After a second substrate is attached onto the substrate structure, the non-GaN-based substrate may be removed and a GaN-based vertical type semiconductor device may be fabricated on the second substrate. | 07-11-2013 |
20130175539 | HIGH ELECTRON MOBILITY TRANSISTORS AND METHODS OF MANUFACTURING THE SAME - According to example embodiments, a high electron mobility transistor (HEMT) includes a channel supply layer and a channel layer. The channel layer may include an effective channel region and a high resistivity region. The effective channel region may be between the high resistivity region and the channel supply layer. The high resistivity region may be a region into which impurities are ion-implanted. According to example embodiments, a method of forming a HEMT includes forming a device unit, including a channel layer and a channel supply layer, on a first substrate; adhering a second substrate to the device unit; removing the first substrate; and forming a high resistivity region by ion-implanting impurities into at least a portion of the channel layer. | 07-11-2013 |
20130234207 | HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - According to example embodiments, a high electron mobility transistor (HEMT) includes: stack including a buffer layer, a channel layer containing a two dimensional electron gas (2DEG) channel, and a channel supply layer sequentially stacked on each other, the stack defining a first hole and a second hole that are spaced apart from each other. A first electrode, a second electrode, and third electrode are spaced apart from each other along a first surface of the channel supply layer. A first pad is on the buffer layer and extends through the first hole of the stack to the first electrode. A second pad is on the buffer layer and extends through the second hole of the stack to the second electrode. A third pad is under the stack and electrically connected to the third electrode. | 09-12-2013 |
20130252410 | SELECTIVE LOW-TEMPERATURE OHMIC CONTACT FORMATION METHOD FOR GROUP III-NITRIDE HETEROJUNCTION STRUCTURED DEVICE - A method for forming a selective ohmic contact for a Group III-nitride heterojunction structured device may include forming a conductive layer and a capping layer on an epitaxial substrate including at least one Group III-nitride heterojunction layer and having a defined ohmic contact region, the capping layer being formed on the conductive layer or between the conductive layer and the Group III-nitride heterojunction layer in one of the ohmic contact region and non-ohmic contact region, and applying at least one of a laser annealing process and an induction annealing process on the substrate at a temperature of less than or equal to about 750° C. to complete the selective ohmic contact in the ohmic contact region. | 09-26-2013 |
20130294151 | MAGNETIC MEMORY DEVICES AND METHODS OF OPERATING THE SAME - A magnetic memory device includes: a free layer for storing information; and a reference layer disposed on a first surface of the free layer. The reference layer includes at least two magnetic domains and a magnetic domain wall between the at least two magnetic domains. The reference layer extends past both ends of the free layer. The magnetic memory device further includes a switching element connected to a second surface of the free layer. Another magnetic memory device includes: a first reference layer having a first magnetic domain wall; a second reference layer having a second magnetic domain wall; and a memory structure between the first and second reference layers. The memory structure includes: a first free layer adjacent to the first reference layer; a second free layer adjacent to the second reference layer; and a switching element between the first and second free layers. | 11-07-2013 |
20130307026 | HIGH ELECTRON MOBILITY TRANSISTORS AND METHODS OF MANUFACTURING THE SAME - According to example embodiments, High electron mobility transistors (HEMTs) may include a discontinuation region in a channel region. The discontinuation region may include a plurality of 2DEG unit regions that are spaced apart from one another. The discontinuation region may be formed at an interface between two semiconductor layers or adjacent to the interface. The discontinuation region may be formed by an uneven structure or a plurality of recess regions or a plurality of ion implantation regions. The plurality of 2DEG unit regions may have a nanoscale structure. The plurality of 2DEG unit regions may be formed in a dot pattern, a stripe pattern, or a staggered pattern. | 11-21-2013 |
20140021511 | HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - A high electron mobility transistor (HEMT) according to example embodiments includes a channel layer, a channel supply layer on the channel layer, a source electrode and a drain electrode on at least one of the channel layer and the channel supply layer, a gate electrode between the source electrode and the drain electrode, and a Schottky electrode forming a Schottky contact with the channel supply layer. An upper surface of the channel supply layer may define a Schottky electrode accommodation unit. At least part of the Schottky electrode may be in the Schottky electrode accommodation unit. The Schottky electrode is electrically connected to the source electrode. | 01-23-2014 |
20140027779 | HIGH ELECTRON MOBILITY TRANSISTOR - According to example embodiments, a high electron mobility transistor includes: a channel layer including a 2-dimensional electron gas (2DEG); a contact layer on the channel layer; a channel supply layer on the contact layer; a gate electrode on a portion of the channel layer; and source and drain electrodes on at least one of the channel layer, the contact layer, and the channel supply layer. The contact layer is configured to form an ohmic contact on the channel layer. The contact layer is n-type doped and contains a Group III-V compound semiconductor. The source electrode and the drain electrode are spaced apart from opposite sides of the gate electrode. | 01-30-2014 |
20140097470 | HIGH-ELECTRON MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - According to example embodiments, a HEMT includes a channel supply layer on a channel layer, a p-type semiconductor structure on the channel supply layer, a gate electrode on the p-type semiconductor structure, and source and drain electrodes spaced apart from two sides of the gate electrode respectively. The channel supply layer may have a higher energy bandgap than the channel layer. The p-type semiconductor structure may have an energy bandgap that is different than the channel supply layer. The p-type semiconductor structure may include a hole injection layer (HIL) on the channel supply layer and be configured to inject holes into at least one of the channel layer and the channel supply in an on state. The p-type semiconductor structure may include a depletion forming layer on part of the HIL. The depletion forming layer may have a dopant concentration that is different than the dopant concentration of the HIL. | 04-10-2014 |
20140147973 | METHOD OF PACKAGING POWER DEVICES AT WAFER LEVEL - A method of packaging power devices at a wafer level is disclosed. The method includes preparing a wafer having a plurality of nitride power devices thereon, each of the plurality of nitride power devices having a plurality of electrodes thereon; forming a polymer layer on the plurality of nitride power devices; exposing each of the electrodes from the polymer layer; forming a solder bump on the exposed electrodes; forming a molding layer covering the solder bump on the polymer layer; and removing the wafer and exposing the solder bump. | 05-29-2014 |
20140151749 | HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - According to example embodiments, a high electron mobility transistor (HEMT) includes a channel layer; a channel supply layer on the channel layer; a source electrode and a drain electrode spaced apart from each other on one of the channel layer and the channel supply layer; a gate electrode on a part of the channel supply layer between the source electrode and the drain electrode; a first depletion-forming layer between the gate electrode and the channel supply layer; and a at least one second depletion-forming layer on the channel supply layer between the gate electrode and the drain electrode. The at least one second depletion-forming layer is electrically connected to the source electrode. | 06-05-2014 |
20140266400 | METHOD OF REDUCING CURRENT COLLAPSE OF POWER DEVICE - According to example embodiments, a method of operating a power device includes applying a control voltage to a control electrode of the power device, where the control electrode is electrically separated from a source electrode, a drain electrode, and a gate electrode of the power device. The control voltage is separately applied to the control electrode. The method may include applying a negative control voltage to the control electrode prior to applying a gate voltage to the gate electrode. | 09-18-2014 |
20140291728 | POWER DEVICE CHIP AND METHOD OF MANUFACTURING THE POWER DEVICE CHIP - According to example embodiments, a power device chip includes a plurality of unit power devices classified into a plurality of sectors, a first pad and a second pad. At least one of the first and second pads is divided into a number of pad parts equal to a number of the plurality of sectors. The first pad is connected to first electrodes of the plurality of unit power devices, and the second pad is connected to second electrodes of the plurality of unit power devices. The unit power devices may be diodes. The power device chip may further include third electrodes in the plurality of unit power devices, and a third pad may be connected to the third electrodes. In this case, the unit power devices may be high electron mobility transistors (HEMTs). Pad parts connected to defective sectors may be excluded from bonding. | 10-02-2014 |
20140327043 | HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - Provided are a high electron mobility transistor (HEMT) and a method of manufacturing the HEMT. The HEMT includes: a channel layer comprising a first semiconductor material; a channel supply layer comprising a second semiconductor material and generating two-dimensional electron gas (2DEG) in the channel layer; a source electrode and a drain electrode separated from each other in the channel supply layer; at least one depletion forming unit that is formed on the channel supply layer and forms a depletion region in the 2DEG; at least one gate electrode that is formed on the at least one depletion forming unit; at least one bridge that connects the at least one depletion forming unit and the source electrode; and a contact portion that extends from the at least one bridge under the source electrode. | 11-06-2014 |
20150108547 | HIGH ELECTRON MOBILITY TRANSISTOR - According to example embodiments, a high electron mobility transistor (HEMT) includes a channel layer having a 2-dimensional electron gas (2DEG), a channel supply layer on the channel layer, a source electrode and a drain electrode spaced apart from each other on one of the channel layer and the channel supply layer, at least one channel depletion layer on the channel supply layer; a gate electrode on at least a part of the channel depletion layer, and at least one bridge connecting the channel depletion layer and the source electrode. The channel depletion layer is configured to form a depletion region in the 2DEG. The HEMT has a ratio of a first impedance to a second impedance that is a uniform value. The first impedance is between the gate electrode and the channel depletion layer. The second impedance is between the source electrode and the channel depletion layer. | 04-23-2015 |
20150123139 | HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - Provided are a high electron mobility transistor and/or a method of manufacturing the same. The high electron mobility transistor includes a channel layer, a channel supply layer formed on the channel layer to generate a two-dimensional electron gas (2DEG), a depletion forming layer formed on the channel supply layer, a gate electrode formed on the depletion forming layer, and a barrier layer formed between the depletion forming layer and the gate electrode. Holes may be prevented from being injected into the depletion forming layer from the gate electrode, thereby reducing a gate forward current. | 05-07-2015 |
20150221745 | HIGH ELECTRON MOBILITY TRANSISTORS AND METHODS OF MANUFACTURING THE SAME - High electron mobility transistors (HEMTs) including a substrate and a HEMT stack on the substrate, the HEMT stack including a compound semiconductor layer that includes a 2-dimensional electron gas (2DEG), an upper compound semiconductor layer that has a polarization index higher than a polarization index of the compound semiconductor layer, and a source electrode, a drain electrode, and a gate that are disposed on the upper compound semiconductor layer. The substrate may be a nitride substrate that has a dielectric constant and a thermal conductivity higher than a dielectric constant and a thermal conductivity of a silicon substrate. The substrate may include an insulating layer that has a dielectric constant and a thermal conductivity higher than a dielectric constant and a thermal conductivity of the silicon substrate, a metal layer that is deposited on the insulating layer, and a plate that is attached to the metal layer. | 08-06-2015 |
20150221746 | METHODS OF MANUFACTURING HIGH ELECTRON MOBILITY TRANSISTORS - The methods may include forming a first material layer on a substrate, increasing electric resistance of the first material layer, and forming a source pattern and a drain pattern, which are spaced apart from each other, on the first material layer, a band gap of the source and drain patterns greater than a band gap of a first material layer. | 08-06-2015 |
In Sang Hwang, Hwaseong-Si KR
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20110185905 | Electric precipitator and electrode plate thereof - An electric precipitator to collect contaminants, such as dust, using electrical attraction. The electric precipitator includes high-voltage electrode plates and low-voltage electrode plates alternately stacked to form an electrification region and a collection region in an air flow direction, wherein each of the high-voltage electrode plates includes a discharge electrode to generate discharge between the discharge electrode and an opposite electrode so that contaminants are electrified in the electrification region and a collection electrode disposed over the electrification region and the collection region to collect the electrified contaminants in the collection region. | 08-04-2011 |
20120160106 | ELECTRIC PRECIPITATOR - An electric precipitator includes a charge unit disposed at an upstream part and a dust collection unit disposed at a downstream part, the charge unit includes charge electrodes and a discharge wire disposed between two neighboring charge electrodes and separated from the charge electrodes, the dust collection unit includes high voltage electrodes, front ends of which are opposite to the charge unit, and low voltage electrodes, front ends of which are opposite to the charge unit and which alternate with high voltage electrodes, and the front ends of high voltage electrodes protrude toward the charge unit as compared to the front ends of low voltage electrodes, thereby guiding electrons to the discharge electrodes due to an electric field formed between the front ends of the high voltage electrodes and the discharge electrodes and thus reducing current leakage through the low voltage electrodes. | 06-28-2012 |
20140090562 | HUMIDIFIER - A humidifier including a spray unit configured to apply electric charge to water, and to spray water having electric charge applied thereto, an evaporation unit formed with a duct in which evaporation of the electrically-charged water being sprayed is taken place, and configured to guide a vapor and a foreign substance, which are separated from each other through the evaporation, to an outside, and a dust collection unit configured to collect the foreign substance at an inside the duct by forming an electric field, the humidifier capable of performing a large-capacity humidification by the generation of the electrically charged droplets, and capable of removing the foreign substance included in the droplets by using the electrical force, thereby enhancing the cleanliness of the humidification, and by using an electric field, accelerating the evaporation so that the size of the duct is minimized, and thus manufacturing the humidifier in a compact size. | 04-03-2014 |
Inseok Hwang, Hwaseong-Si KR
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20110031992 | TESTER AND SEMICONDUCTOR DEVICE TEST APPARATUS HAVING THE SAME - Provided are a tester and a semiconductor device test apparatus having the tester. The tester includes a tested head configured to transfer electronic signals to a probe card. The tester also includes a leveling unit is provided on the tester head. The leveling unit is configured to apply a load to the probe card to maintain a level state of the probe card. | 02-10-2011 |
In Seok Hwang, Hwaseong-Si KR
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20140017041 | APPARATUS FOR TESTING A WAFER - An apparatus for testing a wafer includes a wafer chuck on which the wafer is loaded to perform a wafer test process. The wafer chuck is maintained at a high temperature in a predetermined temperature range. The apparatus for testing a wafer further includes a wafer handling arm supporting the wafer and transferring the wafer to the wafer chuck, and a wafer heating module coupled to the wafer handling arm, arranged parallel to the wafer, and preheating the wafer to be loaded on the wafer chuck. | 01-16-2014 |
20150219710 | WAFER TEST APPARATUS - A wafer test apparatus includes a probe station comprising a probe card that contacts a wafer positioned on a chuck during a wafer test. A test head is disposed on the probe card and tests electrical characteristics of a semiconductor chip positioned on the wafer. A probe card horizontality adjustment unit is positioned between the test head and the probe card and adjusts horizontality of the probe card during the wafer test. | 08-06-2015 |
In-Yong Hwang, Hwaseong-Si KR
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20090148678 | FLEXIBLE PRINTED CIRCUIT, DISPLAY DEVICE INCLUDING THE SAME, AND MANUFACTURING METHOD THEREOF - A flexible printed circuit film includes a film including a first region of an adhesion region and a second region outside of the adhesion region, a signal wire formed on the second region, and reinforcement wiring connected to the signal wire and formed on the first region and the second region. The reinforcement wiring includes a bent portion having a plurality of inner corners and a plurality of outer corners, and the inner corners of the reinforcement wiring are spaced apart from a boundary between the first region and the second region. Accordingly, even though an external force is applied to the flexible printed circuit film, the reinforcement wiring may be prevented from being easily damaged. | 06-11-2009 |
20100214519 | TAPE CARRIER PACKAGE AND LIQUID CRYSTAL DISPLAY DEVICE HAVING THE SAME - A tape carrier package (TCP) includes a base film, an integrated circuit (IC) chip and an output pad group. The IC chip is formed on the base film. The output pad group is formed on a first end of the base film. The output pad group includes a plurality of output blocks having a plurality of output pads, wherein the plurality of output pads in an output block have substantially the same width as each other. The widths of the output pads from one output block to another output block are different from each other. | 08-26-2010 |
Jae Woong Hwang, Hwaseong-Si KR
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20140121872 | METHOD FOR PREVENTING ABNORMAL VIBRATION OF HYBRID VEHICLE - A method prevents an abnormal vibration of a hybrid vehicle. In the method, information is inputted into an engine management system (EMS) by sensing an engine rpm, a transmission rpm, a gear shift, a signal of an accelerator pedal sensor (APS), and an engine torque. It is determined whether or not a current engine rpm and a current engine torque fall within a predetermined rpm and damper reflection torque range that is a range of abnormal vibration occurrence. The engine torque and a motor torque are mutually corrected when the current engine torque falls within the range of the abnormal vibration occurrence. Here, the abnormal vibration is prevented by avoiding an inflection point of a damper at a resonance point of a driving system while maintaining a total driving torque. | 05-01-2014 |
Jung-Seok Hwang, Hwaseong-Si KR
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20150287437 | NONVOLATILE MEMORY DEVICE - A nonvolatile memory device includes a first memory block connected to first word lines, a second memory block arranged in a direction perpendicular to the first memory block and is connected to second word lines, first pass transistors for enabling the first word lines, and second pass transistors for enabling the second word lines. The first and second pass transistors are arranged in a horizontal direction with respect to the first and second memory blocks. | 10-08-2015 |
Jung-Woo Hwang, Hwaseong-Si KR
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20090245982 | UNIT FOR OPENING INSERT FOR TEST TRAY AND METHOD OF MOUNTING SEMICONDUCTOR DEVICE USING THE SAME - A unit for opening an insert of a test tray which comprises an accommodating space for accommodating a semiconductor device and a support for supporting the semiconductor device accommodated in the accommodating space, the unit includes a body, a pair of opening devices provided in the body to open the insert, and a positioning guide unit protruding to be inserted into an accommodating space for a semiconductor device when opening the insert and supporting the semiconductor device that is transferred into the accommodating space to be spaced upward apart from a support provided in the accommodating space. | 10-01-2009 |
20100001739 | TEST TRAY FOR TEST HANDLER - A test tray for a test handler is disclosed that is loaded with semiconductor devices and then carries them along a predetermined circulation route. The test tray allows one fixing unit to fix a plurality of adjacent insert modules to the receiving spaces of the frame, thereby efficiently using the space of the frame and allowing a relatively large number of insert modules to be installed in the same area, in comparison to the conventional test tray. | 01-07-2010 |
20110265316 | OPENER FOR TEST HANDLER - An opener for a test handler is provided. Even when holding members of inserts of a carrier board are manipulated to release semiconductor devices that have been in a held state, a predetermined distance can remain between an upper surface of the opening plate and a lower surface of the insert, thus preventing the inserts from becoming defective. | 11-03-2011 |
Jun Oh Hwang, Hwaseong-Si KR
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20110073252 | Conductive paste and method of manufacturing printed circuit board using the same - The present invention provides a conductive paste including: a conductive powder particle including a polymer powder and a first low melting point metal and a second low melting point metal which are sequentially provided on a surface of the polymer powder and have different melting points; and a binder mixed in the conductive powder particle, and a method of manufacturing a printed circuit board using the same. | 03-31-2011 |
Jun-Sik Hwang, Hwaseong-Si KR
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20110051985 | PIEZOELECTRIC MICRO SPEAKER HAVING PISTON DIAPHRAGM AND METHOD OF MANUFACTURING THE SAME - Provided are a piezoelectric micro speaker having a piston diaphragm and a method of manufacturing the piezoelectric micro speaker. The piezoelectric micro speaker includes: a substrate having a cavity formed therein; a vibrating membrane that is disposed on the substrate and covers at least a center part of the cavity; a piezoelectric actuator disposed on the vibrating membrane so as to vibrate the vibrating membrane; and a piston diaphragm that is disposed in the cavity and performs piston motion by vibration of the vibrating membrane. When the vibrating membrane vibrates by the piezoelectric actuator, the piston diaphragm, which is connected to the vibrating membrane through a piston bar, performs a piston motion in the cavity. | 03-03-2011 |
20110064250 | PIEZOELECTRIC MICRO SPEAKER INCLUDING ANNULAR RING-SHAPED VIBRATING MEMBRANES AND METHOD OF MANUFACTURING THE PIEZOELECTRIC MICRO SPEAKER - A piezoelectric micro speaker and a method of manufacturing the same are provided. The piezoelectric micro speaker includes a substrate having a cavity formed therein and a diaphragm that is disposed on the substrate that overlaps the cavity. A plurality of first vibrating membranes having concentric annular ring shapes are disposed in a first region of the diaphragm corresponding to a center of the cavity. A second vibrating membrane including a different material from that of the first vibrating membranes is formed in the second region of the diaphragm corresponding to an edge of the cavity. A piezoelectric actuator for vibrating the first vibrating membranes is formed on and between the concentric annular rings of the first vibrating membranes. | 03-17-2011 |
20110075867 | PIEZOELECTRIC MICRO SPEAKER INCLUDING WEIGHT ATTACHED TO VIBRATING MEMBRANE AND METHOD OF MANUFACTURING THE SAME - Provided are a piezoelectric micro speaker and a method of manufacturing the same. The piezoelectric micro speaker includes: a substrate having a cavity therein; a diaphragm that is disposed on the substrate, the diaphragm including a vibrating membrane that overlaps the cavity; a piezoelectric actuator that is disposed on the vibrating membrane; and a weight that is disposed in the cavity and attached to a center portion of the vibrating membrane. | 03-31-2011 |
20110075879 | PIEZOELECTRIC MICRO SPEAKER WITH CURVED LEAD WIRES AND METHOD OF MANUFACTURING THE SAME - A micro speaker includes a substrate having a cavity formed therein, a diaphragm formed on the substrate overlapping the cavity. The diaphragm includes a first vibration membrane formed in a first area corresponding to a center portion of the cavity and a second vibration membrane formed in a second area corresponding to an edge portion of the cavity and formed of material different from that used for the first vibration membrane. A piezoelectric actuator is formed including a first electrode layer formed on the first vibration membrane, a piezoelectric layer formed on the first electrode layer, and a second electrode layer formed on the piezoelectric layer, and first and second curved lead wires, respectively connected to the first and second electrode layers across the second area, which are symmetrical to the center of the piezoelectric actuator. | 03-31-2011 |
20110085684 | PIEZOELECTRIC MICRO SPEAKER - Provided is a piezoelectric micro speaker. The piezoelectric micro speaker includes a device plate having a front cavity, a front plate having a radiation hole which communicates with the front cavity in front of the device plate, and a rear plate having a rear cavity and a vent portion. A rear portion of the device plate forms a wall of the vent portion. The device plate includes at least one first vent hole which communicates with the vent portion, and the front plate includes at least one second vent hole which communicates with the first vent hole. | 04-14-2011 |
20130050802 | ELECTROWETTING DEVICE AND METHOD OF MANUFACTURING THE SAME - In one embodiment, the electrowetting device includes a first medium; a second medium that is not mixed with the first medium and has a refractive index different from a refractive index of the first medium; an upper electrode that adjusts an angle of a boundary surface between the first medium and the second medium; and a barrier wall that has a side surface surrounding the first and second mediums, allows the upper electrode to be disposed on a portion of the side surface, and has irregular widths. | 02-28-2013 |
20140124818 | LIGHT EMITTING DEVICE AND METHOD OF FABRICATING THE SAME - A light emitting device (LED) includes a stress control layer having a compressive stress on a substrate, a bonding layer on the stress control layer, a semiconductor layer on the bonding layer and including an active region for emitting light on the bonding layer, a first electrode on a lower surface of the substrate, and a second electrode on the semiconductor layer. The compressive stress of the stress control layer is between about 1 and about 20 GPa. | 05-08-2014 |
20140162053 | BONDED SUBSTRATE STRUCTURE USING SILOXANE-BASED MONOMER AND METHOD OF MANUFACTURING THE SAME - A bonded substrate structure includes a siloxane-based monomer layer between a first substrate and a second substrate, the siloxane-based monomer layer bonding the first substrate and the second substrate. The first substrate and the second substrate may be one of a silicon substrate and a silicon oxide substrate, respectively. | 06-12-2014 |
20140299231 | METAL-BASED SOLDER COMPOSITE INCLUDING CONDUCTIVE SELF-HEALING MATERIALS - A solder composite is provided. The solder composite may include: a metal-based solder matrix, a capsule dispersed in the solder matrix, and a self-healing material that is encapsulated in the capsule. The self-healing material may be configured to react with the solder matrix when in contact with the solder matrix such that at least one of an electrically conductive intermetallic compound and an electrically conductive alloy is formed. | 10-09-2014 |
Ki Han Hwang, Hwaseong-Si KR
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20150278898 | ELECTRONIC INFORMATION LABEL, SERVER, AND METHOD OF TRANSMITTING CALL SIGNAL - An Electronic Information Label (EIL), a server, and a method of transmitting a call signal are provided. According to an exemplary embodiment, an EIL includes: a receiver configured to receive manipulation from a user; a detector configured to cause an interrupt signal by detecting the manipulation received in the receiver; and a call request transmitter configured to wake up in response to detection of the interrupt signal, and transmit a call request signal to a management server to request a call for a person in charge. | 10-01-2015 |
Ki-Hyun Hwang, Hwaseong-Si KR
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20140054676 | VERTICAL TYPE SEMICONDUCTOR DEVICES INCLUDING OXIDATION TARGET LAYERS - A vertical type semiconductor device can include a vertical pillar structure that includes a channel pattern with an outer wall. Horizontal insulating structures can be vertically spaced apart from one another along the vertical pillar structure to define first vertical gaps therebetween at first locations away from the outer wall and to define second vertical gaps therebetween at the outer wall, where the second vertical gaps are wider than the first vertical gaps. Horizontal wordline structures can be conformally located in the first and second vertical gaps between the vertically spaced apart horizontal insulating structures, so that the horizontal wordline structures can be vertically thinner across the first vertical gaps than across the second vertical gaps. | 02-27-2014 |
20150187790 | METHODS OF FORMING VERTICAL TYPE SEMICONDUCTOR DEVICES INCLUDING OXIDATION TARGET LAYERS - A vertical type semiconductor device can include a vertical pillar structure that includes a channel pattern with an outer wall. Horizontal insulating structures can be vertically spaced apart from one another along the vertical pillar structure to define first vertical gaps therebetween at first locations away from the outer wall and to define second vertical gaps therebetween at the outer wall, where the second vertical gaps are wider than the first vertical gaps. Horizontal wordline structures can be conformally located in the first and second vertical gaps between the vertically spaced apart horizontal insulating structures, so that the horizontal wordline structures can be vertically thinner across the first vertical gaps than across the second vertical gaps. | 07-02-2015 |
Kyu-Man Hwang, Hwaseong-Si KR
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20120273741 | PHASE CHANGE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME - A method of manufacturing a phase change memory device includes forming a lower electrode layer pattern and an insulating interlayer covering the lower electrode layer pattern, forming a first opening in the insulating interlayer to expose the lower electrode layer pattern, forming an oxide layer pattern on the sidewall of the first opening and a lower electrode under the oxide layer pattern by partially removing the oxide layer and the lower electrode layer pattern, forming an insulation layer filling a remaining portion of the first opening, removing the oxide layer pattern by a wet etching process to form a second opening, and forming a phase change material pattern on the lower electrode such that the phase change material pattern fills the second opening. | 11-01-2012 |
Kyung-Wook Hwang, Hwaseong-Si KR
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20130341658 | LIGHT-EMITTING DEVICE HAVING DIELECTRIC REFLECTOR AND METHOD OF MANUFACTURING THE SAME - A light-emitting device includes a first conductive semiconductor layer formed on a substrate, a mask layer formed on the first conductive semiconductor layer and having a plurality of holes, a plurality of vertical light-emitting structures vertically grown on the first conductive semiconductor layer through the plurality of holes, a current diffusion layer surrounding the plurality of vertical light-emitting structures on the first conductive semiconductor layer, and a dielectric reflector filling a space between the plurality of vertical light-emitting structures on the current diffusion layer. | 12-26-2013 |
20140183546 | NITRIDE-BASED SEMICONDUCTOR LIGHT-EMITTING DEVICE - A nitride-based semiconductor light-emitting device includes an n-type nitride-based semiconductor layer, an active layer, a p-type nitride-based semiconductor layer, an ohmic contact layer covering a portion of the p-type nitride-based semiconductor layer upper surface, and a p electrode including a first portion contacting the p-type nitride-based semiconductor layer and a second portion contacting the ohmic contact layer. | 07-03-2014 |
20140203240 | SEMICONDUCTOR LIGHT EMITTING DEVICE AND MANUFACTURING METHOD OF THE SAME - A semiconductor light emitting device includes a substrate; a base layer made of a first conductivity-type semiconductor and disposed on the substrate; a plurality of nanoscale light emitting units disposed in a region of an upper surface of the base layer and including a first conductivity-type nano-semiconductor layer protruding from the upper surface of the base layer, a nano-active layer disposed on the first conductivity-type nano-semiconductor layer, and a second conductivity-type nano-semiconductor layer disposed on the nano-active layer; and a light emitting laminate disposed in a different region of the upper surface of the base layer and having a laminated active layer. | 07-24-2014 |
20140203292 | SEMICONDUCTOR LIGHT EMITTING DEVICE - A semiconductor light emitting device includes a light-transmissive substrate, a light-transmissive buffer layer disposed on the light-transmissive substrate, and a light emitting structure. The light-transmissive buffer layer includes a first layer and a second layer having different refractive indices and disposed alternately at least once. The light emitting structure includes a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer sequentially disposed on the buffer layer. | 07-24-2014 |
20140203293 | NITRIDE SEMICONDUCTOR LIGHT EMITTING DEVICE - A nitride semiconductor light emitting device includes a substrate, a multi-layer structure, a light-transmitting concave-convex structure and a light emitting structure. The multi-layer structure has layers of a first layer and a second layer such that the first and second layers have different refractive indexes and are alternately stacked. The concave-convex structure is disposed in an upper surface of the multi-layer structure and includes a light-transmitting material. The light emitting structure is disposed on the multi-layer structure and includes a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer. | 07-24-2014 |
20140206116 | SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME - There are provided a semiconductor light emitting device and a method of manufacturing the same. A method of manufacturing a plurality of light emitting nanostructures of a semiconductor light emitting device includes: forming a plurality of first conductivity type semiconductor cores on a first type semiconductor seed layer, each first conductivity type semiconductor core formed through an opening in an insulating film; forming an active layer on each first conductivity type semiconductor core; forming, using a mask pattern, a second conductivity type semiconductor layer on each active layer to cover the active layer, to form a plurality of light emitting nanostructures; and forming an electrode on the plurality of light emitting nanostructures. | 07-24-2014 |
20140264254 | SEMICONDUCTOR LIGHT EMITTING DEVICE AND ILLUMINATION APPARATUS INCLUDING THE SAME - There is provided a light emitting device including a plurality of nanoscale light emitting structures spaced apart from one another on a first conductivity-type semiconductor base layer, the plurality of nanoscale light emitting structures each including a first conductivity-type semiconductor core, an active layer and a second conductivity-type semiconductor layer, and an electrode connected to the second conductivity-type semiconductor layer. The electrode is disposed between a first nanoscale light emitting structure and a second nanoscale light emitting structure among the plurality of nanoscale light emitting structures, and the electrode has a height lower than a height of the plurality of nanoscale light emitting structures. | 09-18-2014 |
20140367727 | LIGHT-EMITTING DEVICE HAVING DIELECTRIC REFLECTOR AND METHOD OF MANUFACTURING THE SAME - A light-emitting device includes a first conductive semiconductor layer formed on a substrate, a mask layer formed on the first conductive semiconductor layer and having a plurality of holes, a plurality of vertical light-emitting structures vertically grown on the first conductive semiconductor layer through the plurality of holes, a current diffusion layer surrounding the plurality of vertical light-emitting structures on the first conductive semiconductor layer, and a dielectric reflector filling a space between the plurality of vertical light-emitting structures on the current diffusion layer. | 12-18-2014 |
20150041822 | SEMICONDUCTOR LIGHT EMITTING DEVICE - A semiconductor light emitting device includes a substrate, a reflective layer and a light emitting structure. The reflective layer includes at least two porous layers alternately disposed on the substrate and having different porosities. The light emitting structure is disposed on the reflective layer and includes a first conductivity-type semiconductor layer, an active layer and a second conductivity-type semiconductor layer. | 02-12-2015 |
20150129833 | LIGHT EMITTING DEVICE PACKAGE - A light emitting device package includes a package substrate, a light emitting device, a resin portion and a light scattering agent. The light emitting device is disposed on the package substrate and includes a plurality of light emitting nanostructures. The resin portion is disposed on the package substrate and seals the light emitting device. The light scattering agent is dispersed in the resin portion and includes a material having a refractive index greater than a refractive index of a material forming the resin portion. | 05-14-2015 |
20150129834 | SEMICONDUCTOR LIGHT EMITTING DEVICE - There is provided a semiconductor light emitting device including a first conductivity-type semiconductor base layer, a plurality of light emitting nanostructures disposed on the first conductivity-type semiconductor base layer to be spaced apart from one another, each light emitting nanostructure including a first conductivity-type semiconductor core, an active layer and a second conductivity-type semiconductor layer, and a filling layer including a refractive portion disposed between the light emitting nanostructures and a cover portion filled between the light emitting nanostructures and enclosing the refractive portion. | 05-14-2015 |
20150144873 | NANOSTRUCTURE SEMICONDUCTOR LIGHT EMITTING DEVICE - A nanostructure semiconductor light emitting device includes a plurality of light emitting nanostructures, each of which including a nanocore formed of a first conductivity-type semiconductor material, and an active layer and a second conductivity-type semiconductor layer sequentially disposed on a surface of the nanocore, a contact electrode disposed on a surface of the second conductivity-type semiconductor layer and formed of a transparent conductive material, a first light transmissive portion filling space between the plurality of light emitting nanostructures and formed of a material having a first refractive index, and a second light transmissive portion disposed on an upper surface of the first light transmissive portion to cover the plurality of light emitting nanostructures and formed of a material having a second refractive index higher than the first refractive index. | 05-28-2015 |
20150207038 | SEMICONDUCTOR LIGHT-EMITTING DEVICE - A semiconductor light-emitting device includes a first conductive type semiconductor layer having a main surface, a plurality of vertical type light-emitting structures protruding upward from the first conductive type semiconductor layer; a transparent electrode layer covering the plurality of vertical type light-emitting structures; and an insulation-filling layer disposed on the transparent electrode layer. The insulation-filling layer extends parallel to the first conductive type semiconductor layer so as to cover the plurality of vertical type light-emitting structures. A selected one of the first conductive type semiconductor layer and the insulation-filling layer, which is disposed on a light transmission path through which light generated from the plurality of vertical type light-emitting structures is radiated externally, has an uneven outer surface. The uneven outer surface is opposite to an inner surface of the selected one, and the inner surface faces the plurality of vertical type light-emitting structures. | 07-23-2015 |
20150280062 | NANOSTRUCTURE SEMICONDUCTOR LIGHT EMITTING DEVICE - A nanostructure semiconductor light emitting device includes a base layer, an insulating layer, a plurality of light emitting nanostructures, and a contact electrode. The base layer is formed of a first conductivity-type semiconductor material. The insulating layer is disposed on the base layer. Each light emitting nanostructure is disposed in a respective opening of a plurality of openings in the base layer, and includes a nanocore formed of the first conductivity-type semiconductor material, and an active layer and a second conductivity-type semiconductor layer sequentially disposed on a surface of the nanocore. The contact electrode is spaced apart from the insulating layer and is disposed on a portion of the second conductivity-type semiconductor layer. A tip portion of the light emitting nanostructure has crystal planes different from those on side surfaces of the light emitting nanostructure. | 10-01-2015 |
20150325745 | THREE-DIMENSIONAL LIGHT-EMITTING DEVICE AND FABRICATION METHOD THEREOF - A three-dimensional (3D) light-emitting device may include a plurality of 3D light-emitting structures formed apart from one another, each 3D light-emitting structure including: a semiconductor core vertically grown on one surface and doped in a first conductive type; an active layer formed so as to surround a surface of the semiconductor core; and a first semiconductor layer formed so as to surround a surface of the active layer and doped in a second conductive type. The 3D light-emitting device may include: a first porous insulating layer formed between lower corner portions of the 3D light-emitting structures so as to expose upper end portions of the 3D light-emitting structures; a first electrode electrically connected to the first semiconductor layer; and a second electrode electrically connected to the semiconductor core. | 11-12-2015 |
20150372195 | SEMICONDUCTOR LIGHT EMITTING DEVICE AND MANUFACTURING METHOD OF THE SAME - A semiconductor light emitting device includes a substrate; a base layer made of a first conductivity-type semiconductor and disposed on the substrate; a plurality of nanoscale light emitting units disposed in a region of an upper surface of the base layer and including a first conductivity-type nano-semiconductor layer protruding from the upper surface of the base layer, a nano-active layer disposed on the first conductivity-type nano-semiconductor layer, and a second conductivity-type nano-semiconductor layer disposed on the nano-active layer; and a light emitting laminate disposed in a different region of the upper surface of the base layer and having a laminated active layer. | 12-24-2015 |
Kyu Young Hwang, Hwaseong-Si KR
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20110157208 | IMAGE PROCESSING APPARATUS AND METHOD - Provided is an image processing apparatus. The image processing apparatus may synthesize an input frame with texture information of another frame and provide an output frame with an enhanced texture component. | 06-30-2011 |
20120033872 | APPARATUS AND METHOD FOR GENERATING EXTRAPOLATED VIEW BASED ON IMAGE RESIZING - A view extrapolation apparatus and a view extrapolation method to generate images at a plurality of virtual points using a relatively small number of input images are disclosed. The view extrapolation apparatus and the view extrapolation method output a view at a reference point, the view at the reference point being formed of frames according to time, generating the frames of the view at the reference point to generate a resized frame, and generating an extrapolated view at a virtual point using the resized frame. | 02-09-2012 |
20120169722 | METHOD AND APPARATUS GENERATING MULTI-VIEW IMAGES FOR THREE-DIMENSIONAL DISPLAY - A method and apparatus for generating multi-view images are provided. An error suspicious area may be detected from a reference view image. A foreground-first image may be generated by foreground-first warping including regarding the error suspicious area as a foreground, and a background-first image may be generated by background-first warping including regarding the error suspicious area as a background. The foreground-first image and the background-first image may be blended, and an output view image in a predetermined viewpoint may be generated. | 07-05-2012 |
20120212480 | MULTI-VIEW RENDERING APPARATUS AND METHOD USING BACKGROUND PIXEL EXPANSION AND BACKGROUND-FIRST PATCH MATCHING - An apparatus and method for restoring a hole generated in multi-view rendering are provided. A hole in an output view may be restored using temporally neighboring images. | 08-23-2012 |
20130016897 | METHOD AND APPARATUS FOR PROCESSING MULTI-VIEW IMAGE USING HOLE RENDERING - A method and apparatus for processing a multi-view image are provided. A priority may be assigned to each hole pixel in a hole region generated when an output view is generated. The priority of each hole pixel may be generated by combining a structure priority, a confidence priority, and a disparity priority. Hole rendering may be applied to a target patch including a hole pixel having a highest priority. The hole pixel may be restored by searching for a source patch most similar to a background of the target patch, and copying a pixel in the found source patch into a hole pixel of the target patch. | 01-17-2013 |
20130106844 | IMAGE PROCESSING APPARATUS AND METHOD | 05-02-2013 |
20130162787 | METHOD AND APPARATUS FOR GENERATING MULTI-VIEW - An image processing method and apparatus. The image processing apparatus may generate a standard viewpoint layer and use the standard viewpoint layer to recover holes within at least one output view having different viewpoints. Holes within output views may be collectively recovered, using the standard viewpoint layer. The image processing apparatus may adaptively apply inter-frame inpainting that uses an accumulated background layer to generate the standard viewpoint layer, and intra-frame inpainting that uses an initial standard viewpoint layer including a hole. The accumulated background layer may include information associated with a background of a standard viewpoint layer generated in a previous frame. | 06-27-2013 |
20150015683 | METHOD AND APPARATUS FOR PROCESSING MULTI-VIEW IMAGE USING HOLE RENDERING - A method and apparatus for processing a multi-view image are provided. A priority may be assigned to each hole pixel in a hole region generated when an output view is generated. The priority of each hole pixel may be generated by combining a structure priority, a confidence priority, and a disparity priority. Hole rendering may be applied to a target patch including a hole pixel having a highest priority. The hole pixel may be restored by searching for a source patch most similar to a background of the target patch, and copying a pixel in the found source patch into a hole pixel of the target patch. | 01-15-2015 |
20150288946 | IMAGE PROCESSING APPARATUS AND METHOD TO ADJUST DISPARITY INFORMATION OF AN IMAGE USING A VISUAL ATTENTION MAP OF THE IMAGE - Provided is an image processing apparatus. A region of interest (ROI) configuration unit may generate a visual attention map according to a visual attention of a human in correspondence to an input three dimensional (3D) image. A disparity adjustment unit may adjust disparity information, included in the input 3D image, using the visual attention map. Using the disparity information adjusted result, a 3D image having a decreased visual fatigue may be generated and be displayed. | 10-08-2015 |
Sang-Jhun Hwang, Hwaseong-Si KR
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20150340074 | MEMORY MODULE HAVING ADDRESS MIRRORING FUNCTION - A memory module having an address minoring function is provided. The memory module includes a register that allows mode registers of first memory chips of a first rank and mode registers of second memory chips of a second rank to be identically programmed in response to a mode register set (MRS) command during a rank-merged test mode. The register sets address signals, which are symmetrically connected to the first and second memory chips through through-via-holes (TVHs) or blind-via-holes (BVHs) of a printed circuit board, to be selectively mirrored. | 11-26-2015 |
Sang Youn Hwang, Hwaseong-Si KR
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20140357843 | IMMUNOGLOBULIN FC VARIANTS - The present invention relates to immunoglobulin Fc variants having an increased binding affinity for FcRn, which is characterized by including one or more amino acid modifications selected from the group consisting of 307S, 308F, 380S, 380A, 428L, 429K, 430S, 433K and 434S (this numbering is according to the EU index) in the constant region of a native immunoglobulin Fc fragment. Owing to the high binding affinity for FcRn, the immunoglobulin Fc variants according to the present invention show more prolonged in vivo half-life, and thus can be used for the preparation of a long-acting formulation of protein drugs. | 12-04-2014 |
20150329611 | INSULINOTROPIC PEPTIDE DERIVATIVE WITH MODIFIED N-TERMINAL CHARGE - The present invention relates to an insulinotropic peptide derivative with a modified N-terminal charge and a pharmaceutical composition including the same. Specifically, the insulinotropic peptide derivative is characterized in that the N-terminal positive charge of the insulinotropic peptide is modified to a neutral or net negative charge at neutral pH. The insulinotropic peptide derivative according to the present invention is rapidly dissociated from the GLP-1 receptor owing to the above modification in the N-terminal charge, and exhibits enhanced insulinotropic ability and blood glucose-lowering activity compared to the native insulinotropic peptide while maintaining its stability in blood. Accordingly, the insulinotropic peptide derivative of the present invention is very useful for the treatment of type 2 diabetes. | 11-19-2015 |
20150359859 | A METHOD OF VIRUS INACTIVATION IN COMPOSITION COMPRISING FACTOR VII - The present invention relates to a method for inactivating viruses in a composition comprising blood coagulation factor VII, and more particularly, to a method for inactivating viruses comprising adding a surfactant to a composition comprising blood coagulation factor VII or a derivative thereof and a method for preparing a virus-inactivated composition comprising blood coagulation factor VII or the derivative thereof. | 12-17-2015 |
20160000931 | SITE-SPECIFIC INSULIN CONJUGATE - Provided are an insulin conjugate having improved insulin receptor binding affinity and increased activity, in which a non-peptidyl polymer and an immunoglobulin Fc region are site-specifically linked to an amino acid residue of the insulin beta chain excluding the N-terminus thereof via a covalent bond, a long-acting formulation including the same, and a preparation method thereof. The insulin conjugate of the present invention is used to provide an insulin formulation which exhibits a remarkably increased in vivo activity of the peptide. | 01-07-2016 |
Seung Hai Hwang, Hwaseong-Si KR
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20160036401 | CONTROL KNOB DEVICE - A control knob device that may be used in a vehicle to control audio volume or the like includes a shaft connected with a knob cap, an elastic member pressed by the shaft to be elastically deformed, and a switch located adjacent to the elastic member. The switch includes a switch part configured to output a signal upon a deformation of the elastic member. A deformable member deformed by a load greater than that when the elastic member is deformed and the switch outputs the signal, is configured to change a relative position between the knob cap and the shaft. | 02-04-2016 |
Soo-Man Hwang, Hwaseong-Si KR
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20080205183 | SELF-REFRESH CONTROL CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME - A refresh control circuit in a semiconductor memory device includes a refresh controller, a voltage generator and a word line enable circuit. The refresh period controller generates a control signal in response to a self-refresh signal, the control signal indicating a nominal initiation of a refresh period. The voltage generator generates an output voltage in response to the control signal. The output voltage is boosted from a low voltage to a high voltage during the refresh period. The word line enable circuit generates a word line enable signal in response to the control signal, wherein the word line enable signal is activated following a delay after the nominal initiation of the refresh period, and the delay allows the voltage generator to fully boost the output voltage. | 08-28-2008 |
Soomin Hwang, Hwaseong-Si KR
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20100195066 | System and method for treating substrate - A method and system for treating a substrate are provided. The system includes a coating unit, a pre/post-exposure treatment unit, and a developing unit. Each of the units includes a load port and an index module. The pre/post-exposure treatment unit includes first and second modules that are arranged in different layers. The first module performs a process for coating a protective layer on the wafer before an exposure process. The second module performs a process for cleaning the wafer and a post-exposure bake process after the exposure process. | 08-05-2010 |
20120307217 | SYSTEM AND METHOD FOR TREATING SUBSTRATE - A method and system for treating a substrate are provided. The system includes a coating unit, a pre/post-exposure treatment unit, and a developing unit. Each of the units includes a load port and an index module. The pre/post-exposure treatment unit includes first and second modules that are arranged in different layers. The first module performs a process for coating a protective layer on the wafer before an exposure process. The second module performs a process for cleaning the wafer and a post-exposure bake process after the exposure process. | 12-06-2012 |
Soo Min Hwang, Hwaseong-Si KR
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20100058985 | Photoresist supply apparatus and photoresist supply method - Provided is a photoresist supply apparatus. The photoresist supply apparatus includes a discharge nozzle, a metering pump, a trap tank, a bottle, and a first drain line. The discharge nozzle discharges a photoresist onto a wafer. The metering pump supplies the photoresist of a fixed quantity into the discharge nozzle. The trap tank temporarily stores the photoresist to be supplied from the metering pump to the discharge nozzle. The bottle contains the photoresist stored in the trap tank. The bubble discernment member determines whether bubbles exist in the standby photoresist to be supplied from the pump to the discharge nozzle. The first drain line connects the pump to a waste liquid tank to drain the standby photoresist from the pump to the waste liquid tank when the bubble discernment member checks the bubbles. | 03-11-2010 |
Soon-Hyon Hwang, Hwaseong-Si KR
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20150260079 | CYLINDER BLOCK - A cylinder block including a water jacket for maintaining an engine at a proper temperature during operation thereof may include a plurality of cylinders formed within the cylinder block so that a number of pistons are respectively inserted into the cylinders, and a heat sink formed in the water jacket provided to enclose side surfaces of the plural cylinders. | 09-17-2015 |
Su Hwan Hwang, Hwaseong-Si KR
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20090025492 | APPARATUS FOR ADJUSTING POSITION OF VERTEBRAL COLUMN OF DUMMY MODEL FOR ESTIMATING FEELING OF SITTING IN SEAT - An apparatus for adjusting a position of the vertebral column of a dummy model for estimating the feeling of sitting in a seat almost exactly mimics the characteristics of the vertebral joints of a human being. The apparatus comprises a pelvic plate; a plurality of lumbar joints, stacked on the pelvic plate so as to be spaced apart from each other, and having joint springs installed in front and rear portions thereof centered around a rotation center interconnecting two adjacent ones thereof; femur joints rotatably installed below the pelvic plate, and connected with one end of each femur bar; and pelvic pivoting members transmitting rotating force of the femur joints, which is caused by vertical pivoting of the femur bars, to the pelvic plate, and changing a vertical angle of the pelvic plate. | 01-29-2009 |
20090056481 | PELVIS ASSEMBLY FOR DUMMY MODEL - A pelvis assembly for a dummy includes a pelvic plate attached to a lumbar region of the dummy, and one of more pelvic units, attached to the pelvic plate to transmit motion from a femur bar of the dummy to the plate. Each pelvic unit includes a hip joint, attached to the femur bar; a rotary axle, a first end of which is attached to the hip joint, and which is disposed laterally, to rotate together with the hip joint when the femur bar pivots vertically; and one or more pelvic angle adjusters, installed near a second end of the rotary axle, to transmit rotation of the rotary axle to the pelvic plate, thereby changing a vertical angle of the pelvic plate. | 03-05-2009 |
20090151444 | Human Dummy System for Evaluating Comfort of Seat - A human dummy system for evaluating the comfort of a seat comfort includes sensor units and a data processing unit. The sensor units are attached to the relevant joints of a human dummy, and detect the angles of the relevant joints. The data processing unit calculates information about relative locations of adjacent joints on the basis of the information about the angles of the relevant joints, and calculates the absolute location of a specific joint through coordinate system transformation between the information about relative locations and the joints of the human dummy. | 06-18-2009 |
20100117414 | Intelligent Vehicle Seat Support System - An intelligent vehicle seat support system may include an air storage tank for storing air and supplying the air when needed, a plurality of air cushions disposed in a vehicle seat in contact with a human body, and configured to selectively expand and shrink depending on the air flow, a pressure sensor for measuring air pressure of each air cushion, an air control valve disposed between the air storage tank and the air cushions, and configured to control the air that flows into each of the air cushions, and a control unit for, when a passenger takes the vehicle seat, automatically controlling the air control valve so that it starts injecting air into each of the air cushions, and, when the air pressure of each air cushion is higher than a preset reference value, controlling the air control valve so that it stops injecting air into each air cushion. | 05-13-2010 |
20120013155 | AUTOMATIC MOVING APPARATUS FOR PRE-CRASH HEADREST - An automatic moving apparatus may include a collision prediction sensor, a control unit comparing a value measured by the collision prediction sensor, with a reference value stored in the control unit, and outputting a control signal when it may be determined that the value measured by the collision prediction sensor is higher than the reference value, and a headrest moving unit moving a headrest unit toward a passenger's head before the headrest unit comes into contact with the passenger's head, and including a stay rod connected to the headrest unit, both sides of the stay rod being placed in a vertical direction, tilting device tilting the stay rod forwards or backwards relative to a seatback in response to the control signal of the control unit, and vertical moving device moving the stay rod in a vertical direction in response to the control signal of the control unit. | 01-19-2012 |
Sujeong Hwang, Hwaseong-Si KR
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20140127210 | BISPECIFIC ANTIGEN BINDING PROTEIN COMPLEX AND PREPARATION METHODS OF BISPECIFIC ANTIBODIES - A bispecific antigen binding protein complex comprising a first polypeptide comprising a first antigen binding site at an N terminus; a second polypeptide comprising a second antigen binding site at an N terminus; and a linker connecting the first polypeptide and the second polypeptide; wherein the linker comprises a tag at one terminus thereof, and wherein the tag is connected to a C-terminus of the first polypeptide or to an N-terminus of the second polypeptide, and comprises a cleavable amino acid sequence; as well as related compositions and methods. | 05-08-2014 |
Su-Jeong Hwang, Hwaseong-Si KR
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20140378664 | PROTEIN COMPLEX, BISPECIFIC ANTIBODY INCLUDING THE PROTEIN COMPLEX, AND METHOD OF PREPARATION THEREOF - A protein complex comprising a first polypeptide comprising a first antigen-binding region; a second polypeptide comprising a second antigen-binding region; and | 12-25-2014 |
Sung Dar Hwang, Hwaseong-Si KR
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20100184531 | STRUCTURE OF PUTTER HEAD FOR GOLF - A structure of a putter head for golf improves straightforwardness of a hit golf ball direction and disperses an instantaneous shock impact between the golf ball and the putter head, to thereby improve a hitting sense, and minimize air resistance to thus enable a player to perform a stable golf playing operation. The golf putter head structure includes a number of throughholes which penetrate the front portion and the rear portion of the putter head, respectively; and a number of protrusions which are inserted into and contact the dimples of the golf ball when a player hits a golf ball by the putter head. | 07-22-2010 |
Sung-Kyu Hwang, Hwaseong-Si KR
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20150195927 | ELECTRONIC DEVICE HAVING WATERPROOF STRUCTURE - An electronic device is provided. The electronic device includes an electronic component connected to a Printed Circuit Board (PCB), a housing comprising a recess configured to accommodate the electronic component and a hole formed in at least part of the recess to pass the PCB, and a sealing member disposed in at least part of the hole and configured to cover at least part of the PCB. | 07-09-2015 |
Sung-Won Hwang, Hwaseong-Si KR
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20140008608 | SEMICONDUCTOR LIGHT-EMITTING DEVICES INCLUDING CONTACT LAYERS TO FORM REFLECTIVE ELECTRODES - A semiconductor light-emitting device includes a contact layer. The contact layer has the composition ratio of Al elements which varies gradually therein. A region formed by an Al element in the contact layer of the semiconductor light-emitting device may improve light extraction efficiency of the light emitted from an active layer and facilitate a formation of the reflective electrode. | 01-09-2014 |
20150221823 | SEMICONDUCTOR LIGHT EMITTING DEVICE - There is provided a semiconductor light emitting device including: a first conductivity-type semiconductor base layer; a mask layer disposed on the first conductivity-type semiconductor base layer and including a graphene layer with a plurality of openings exposing the first conductivity-type semiconductor base layer; and a plurality of light emitting nanostructures disposed on the openings and each including a first conductivity-type semiconductor core, an active layer, and a second conductivity-type semiconductor layer. | 08-06-2015 |
Sunmin Hwang, Hwaseong-Si KR
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20140364158 | MOBILE TERMINAL AND METHOD FOR CONTROLLING THE SAME - A mobile terminal for storing supplementary information together with a captured screen when the mobile terminal captures a screen displayed on a display unit, and a controlling method thereof is provided. The method of controlling a mobile terminal including a display unit includes capturing a screen of a process displayed on the display unit, extracting supplementary information associated with the process displayed on the display unit, and storing the extracted supplementary information together with the captured screen, as a captured image. | 12-11-2014 |
20150220720 | ELECTRONIC DEVICE AND METHOD FOR CONTROLLING ACCESS TO GIVEN AREA THEREOF - A method for operating an electronic device is provided. The method includes determining validity of a first key, generating, when the first key is valid, a second key, and granting access to a designated area of the electronic device by use of the second key. Other various embodiments are possible on the basis of the above method. | 08-06-2015 |
Sun Min Hwang, Hwaseong-Si KR
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20130119932 | BATTERY CHARGING APPARATUS - A battery charging apparatus includes an input power processing unit configured to receive an AC power and convert the received AC power into an output voltage for power conversion; a hybrid power converting unit configured to use a common transformer to separately convert the output voltage of the input power processing unit into a first voltage and a second voltage for charging a high voltage battery and an auxiliary battery; a high voltage charging unit configured to drop the first voltage output from the hybrid power converting unit and charge the high voltage battery with the dropped first voltage; and an auxiliary voltage charging unit configured to generate an auxiliary voltage by dropping the second voltage output from the hybrid power converting unit or a voltage of the high voltage battery, and charge the auxiliary battery with the auxiliary voltage. | 05-16-2013 |
20140274021 | METHOD AND DEVICE FOR CONTROLLING USE OF EXTERNAL DATA NETWORK VIA MOBILE ACCESS POINT - A method and a device for controlling external data network use via a mobile Access Point (AP) are provided. A host device set as the mobile AP determines whether a data-less mode is set, blocks a client device from using the external data network via the mobile AP, if the data-less mode is set, and permits the client device to use the external data network via the mobile AP, if the data-less mode is released. A client device connected to a mobile AP determines whether a data-less mode is set for a host device set as the mobile AP, if the client device is connected to the host device in a state of being connected to a wireless data network, maintains the connection to the wireless data network, if the data-less mode is set, and releases the connection to the wireless data network, if the data-less mode is released. | 09-18-2014 |
20140307143 | APPARATUS AND METHOD FOR SHOOTING VIDEO IN TERMINAL - An apparatus for shooting video in a terminal is provided. The apparatus includes a display configured to sequentially display, on a video shooting progress bar, a plurality of indications indicating a plurality of associated sharing applications capable of sharing content based on a video size supported by each of the plurality of sharing applications, in a video shooting mode, and a controller configured to display a change in a video size corresponding to video shooting time on the video shooting progress bar in the video shooting mode, thereby controlling the display to sequentially display types of sharing applications capable of supporting the video size changed during video shooting. | 10-16-2014 |
20140316777 | USER DEVICE AND OPERATION METHOD THEREOF - A user device having a voice recognition function and an operation method thereof are provided. The operation method includes detecting whether there is an input from at least one sensor in response to execution of an application which may use voice recognition and activating or inactivating the voice recognition in response to the detection of the input. | 10-23-2014 |
20150244853 | METHOD FOR COMMUNICATING WITH NEIGHBOR DEVICE, ELECTRONIC DEVICE, AND STORAGE MEDIUM - A method in which a second electronic device communicates with a neighbor device is provided. The method includes connecting to a first electronic device, receiving first information for a third electronic device from the first electronic device, and controlling the third electronic device using the first information, wherein the first information includes control right information for the third electronic device. | 08-27-2015 |
Taekyoung Hwang, Hwaseong-Si KR
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20140307474 | DISPLAY DEVICE - A display device includes a display panel, a protective member, a light guide member, a light source, and a light leakage preventing member. The display device includes a display surface concavely curved in a first direction. The light leakage preventing member is coupled to the protective member to be movable according to expansion or contraction of the light guide member. The light leakage preventing member contracts and expands according to the expansion or contraction of the light guide member, and includes an elastic part to prevent the light source from being damaged by the expansion of the light guide member. | 10-16-2014 |
Wansik Hwang, Hwaseong-Si KR
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20100227479 | Semiconductor device and associated methods of manufacture - Provided are a semiconductor device and a method of fabricating the same. The method includes forming a metal nitride layer and a metal oxide layer on a semiconductor substrate to be in contact with each other, and annealing the substrate including the metal nitride layer and the metal oxide layer to form a metal oxynitride layer. | 09-09-2010 |
20110233648 | Three-Dimensional Semiconductor Memory Devices And Methods Of Fabricating The Same - Three-dimensional semiconductor memory devices and methods of fabricating the same. The three-dimensional semiconductor devices include an electrode structure with sequentially-stacked electrodes disposed on a substrate, semiconductor patterns penetrating the electrode structure, and memory elements including a first pattern and a second pattern interposed between the semiconductor patterns and the electrode structure, the first pattern vertically extending to cross the electrodes and the second pattern horizontally extending to cross the semiconductor patterns. | 09-29-2011 |
20130334593 | THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES AND METHODS OF FABRICATING THE SAME - Three-dimensional semiconductor memory devices and methods of fabricating the same. The three-dimensional semiconductor devices include an electrode structure with sequentially-stacked electrodes disposed on a substrate, semiconductor patterns penetrating the electrode structure, and memory elements including a first pattern and a second pattern interposed between the semiconductor patterns and the electrode structure, the first pattern vertically extending to cross the electrodes and the second pattern horizontally extending to cross the semiconductor patterns. | 12-19-2013 |
20150311301 | THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES AND METHODS OF FABRICATING THE SAME - Three-dimensional semiconductor memory devices and methods of fabricating the same. The three-dimensional semiconductor devices include an electrode structure with sequentially-stacked electrodes disposed on a substrate, semiconductor patterns penetrating the electrode structure, and memory elements including a first pattern and a second pattern interposed between the semiconductor patterns and the electrode structure, the first pattern vertically extending to cross the electrodes and the second pattern horizontally extending to cross the semiconductor patterns. | 10-29-2015 |
Wan-Sik Hwang, Hwaseong-Si KR
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20110256708 | Methods of Manufacturing Flash Memory Devices by Selective Removal of Nitrogen Atoms - A method of manufacturing a flash memory device includes: forming a dielectric layer on an active region of a substrate having an isolation region and the active region; forming a floating gate on the dielectric layer; forming an isolation layer in the isolation region; forming a nitride layer including a first nitride layer portion formed on an exposed surface of the floating gate and a second nitride layer portion formed on an exposed surface of the isolation layer; selectively removing nitrogen atoms from the second nitride layer portion of the nitride layer; forming an inter-gate dielectric layer on both the first nitride layer portion and the isolation layer; and forming a control gate on the inter-gate dielectric layer. | 10-20-2011 |
Wonjun Hwang, Hwaseong-Si KR
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20110126662 | PARKING BRAKE SYSTEM OF VEHICLE - A parking brake system may include a lever mounting bracket including a vertical portion, an operating lever including a vertical fixing portion and a bending-fixing portion, wherein the vertical fixing portion is rotatably coupled to the vertical portion by an end portion of a lever hinge, and the bending-fixing portion is disposed from the vertical portion with a predetermined distance and rotatably coupled to the vertical portion by the other end of the lever hinge, a rotary shaft disposed with a predetermined distance from the lever hinge and having one end connected to the bending-fixing portion, a cable rod having one end connected to a portion of the rotary shaft at a predetermined distance from the vertical portion of the lever mounting bracket, and an equalizer connected to the other end of the cable rod by an adjust nut. | 06-02-2011 |
Young-Ho Hwang, Hwaseong-Si KR
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20160006376 | SYSTEM FOR CONTROLLING FAULT TOLERANCE - A system for controlling fault tolerance may include a first controller connected to a driver, a first switch connected in parallel to the first controller, a first capacitor connected in parallel to the first switch, a second switch connected in parallel to the first capacitor and different from the first switch, a first power supply connected in parallel to the first capacitor and connected in series to the second switch, and a second capacitor connected to the first switch and a ground of the first power supply and different from the first capacitor. When the first controller is broken down, the second switch may be turned off to interrupt power supply from the first power supply, and the first switch may be turned on to discharge electric charges charged in the second capacitor. | 01-07-2016 |
Young-Kuk Hwang, Hwaseong-Si KR
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20100137838 | NON-PVC SYSTEM TUBE FOR BIOMEDICAL - The present invention relates to a medical tube, comprising an inner layer comprising 50 to 90% by weight of polypropylene-based elastomer and 10 to 50% by weight of polypropylene, based on the total weight of the inner layer; an intermediate layer comprising 45 to 55% by weight of polypropylene-based elastomer and 45 to 55% by weight of polypropylene, based on the total weight of the intermediate layer; and an outer layer comprising 20 to 55% by weight of polypropylene-based elastomer and 45 to 80% by weight of polypropylene, based on the total weight of the outer layer. | 06-03-2010 |
Youngnam Hwang, Hwaseong-Si KR
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20100097842 | RESISTANCE VARIABLE MEMORY DEVICE PROGRAMMING MULTI-BIT DATA - A phase change memory device is provided to simultaneously program multi-bit data. The phase change memory device includes a memory cell array in which multi-bit data is stored, a buffer circuit storing a lower bit and an upper bit of the multi-bit data, a write driver applying program current to the memory cell array, and a control logic controlling the write driver to simultaneously program the multi-bit data. | 04-22-2010 |
20100097849 | VARIABLE RESISTANCE MEMORY DEVICE PERFORMING PROGRAM AND VERIFICATION OPERATION - A variable resistance memory device includes; a memory cell array comprising a plurality of memory cells, a pulse shifter shifting a plurality of program pulses to generate a plurality of shifted program pulses, a write and verification driver receiving the plurality of shifted program pulses to provide a program current that varies with the plurality of shifted program pulses to the plurality of memory cells, and control logic providing the plurality of program pulses to the pulse shifter and the write and verification driver during a program/verification operation, such at least two write data bits are programmed to the memory cell array in parallel during the program/verification operation. | 04-22-2010 |
20110233503 | METHODS OF FORMING PHASE-CHANGE MEMORY DEVICES AND DEVICES SO FORMED - A method of forming can be provided by forming a metal silicide layer that includes a diffusion metal on a substrate. A native oxide layer can be formed on the metal silicide layer and forming a metal oxide layer by reacting the native oxide layer with the diffusion metal. A phase-change layer and an upper electrode can be formed on the metal oxide layer. A phase-change memory device can include a substrate and a conductive region on the substrate with a lower electrode on the conductive region, where the lower electrode can include a metal silicide layer on the conductive region and a metal silicon nitride layer having a resistivity of about 10 to about 100 times that of the metal silicide layer. A metal oxide layer can be located between the metal silicon nitride layer and the metal silicide layer, the metal oxide layer comprising a resistivity that is greater than that of the metal silicide layer and less than the resistivity of the metal silicon nitride layer. A phase-change layer and an upper electrode can be located on the lower electrode. | 09-29-2011 |
20120211720 | VARIABLE RESISTANCE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME - According to example embodiments, a variable resistance memory device include an ohmic pattern on a substrate; a first electrode pattern including a first portion that has a plate shape and contacts a top surface of the ohmic pattern and a second portion that extends from one end of the first portion to a top; a variable resistance pattern electrically connected to the first electrode pattern; and a second electrode pattern electrically connected to the variable resistance pattern, wherein one end of the ohmic pattern and the other end of the first portion are disposed on the same plane. | 08-23-2012 |
20120217463 | SEMICONDUCTOR MEMORY DEVICES AND METHODS OF FORMING THE SAME - A method of forming a semiconductor memory device comprises a step of forming an electrode pattern extending in a first direction on a substrate, a step of forming a pair of mask patterns on the electrode pattern, the mask patterns extending a second direction perpendicular to the first direction, a step of partially etching the electrode pattern using the pair of mask patterns as etch masks to form a first recessed region in the electrode pattern, a step of forming a pair of sidewall spacers on either inner sidewalls of the first recessed region, a step of etching the electrode pattern of the first recessed region using the pair of sidewall spacers as etch masks to form a heating electrode contacting the pair of sidewall spacers, and a step of forming a variable resistive pattern on the heating electrode. | 08-30-2012 |
20130040408 | METHOD OF FABRICATING RESISTANCE VARIABLE MEMORY DEVICE AND DEVICES AND SYSTEMS FORMED THEREBY - An exemplary method of forming a variable resistance memory may include forming first source/drain regions in a substrate, forming gate line structures and conductive isolation patterns buried in the substrate with the first source/drain regions interposed therebetween, and forming lower contact plugs on the first source/drain regions. The forming of lower contact plugs may include forming a first interlayer insulating layer, including a first recess region exposing the first source/drain regions adjacent to each other in a first direction, forming a conductive layer in the first recess region, patterning the conductive layer to form preliminary conductive patterns spaced apart from each other in the first direction, and patterning the preliminary conductive patterns to form conductive patterns spaced apart from each other in a second direction substantially orthogonal to the first direction. | 02-14-2013 |
20130043530 | DATA STORING DEVICES AND METHODS OF FABRICATING THE SAME - A data storing device may include a substrate, transistors on the substrate that include gate line structures, and conductive isolation patterns defining active regions of the transistors. Each conductive isolation pattern includes at least one portion buried in the substrate and the conductive isolation patterns are electrically connected with each other. | 02-21-2013 |
20130105876 | Memory Devices With Three-Dimensional Selection Structures for Memory Cell Arrays | 05-02-2013 |
20140027704 | METHODS OF FORMING PHASE-CHANGE MEMORY DEVICES AND DEVICES SO FORMED - Phase-change memory devices are provided. A phase-change memory device may include a substrate and a conductive region on the substrate. Moreover, the phase-change memory device may include a lower electrode on the conductive region. The lower electrode may include a metal silicide layer on the conductive region, and a metal silicon nitride layer including a resistivity of about 10 to about 100 times that of the metal silicide layer. Moreover, the lower electrode may include a metal oxide layer between the metal silicon nitride layer and the metal silicide layer. The metal oxide layer may include a resistivity that is greater than that of the metal silicide layer and less than the resistivity of the metal silicon nitride layer. The phase-change memory device may also include a phase-change layer and an upper electrode on the lower electrode. | 01-30-2014 |
20140113429 | VARIABLE RESISTANCE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME - According to example embodiments, a variable resistance memory device include an ohmic pattern on a substrate; a first electrode pattern including a first portion that has a plate shape and contacts a top surface of the ohmic pattern and a second portion that extends from one end of the first portion to a top; a variable resistance pattern electrically connected to the first electrode pattern; and a second electrode pattern electrically connected to the variable resistance pattern, wherein one end of the ohmic pattern and the other end of the first portion are disposed on the same plane. | 04-24-2014 |
Young-Nam Hwang, Hwaseong-Si KR
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20100061141 | Non-volatile memory device and storage system including the same - A non-volatile memory device may include a plurality of data cells, each data cell of the plurality of data cells programmed to have a first resistance variation among a plurality of first resistance variations; and a plurality of reference cells, each reference cell of the plurality of reference cells programmed to have a second resistance variation among a plurality of second resistance variations. A change in a resistance of the data cells is used to identify a level of data programmed to memory. Because the resistance variation of the data cells may change with time or due to changes in temperature, a reference cell is also included in the non-volatile memory device. The reference cell is used for effective reading of the data value of a corresponding data cell. A storage system may include the non-volatile memory device. | 03-11-2010 |
20100220520 | Multi-bit phase change memory devices - A multi-bit phase change memory device including a phase change material having a plurality of crystalline phases. A non-volatile multi-bit phase change memory device may include a phase change material in a storage node, wherein the phase change material includes a binary or ternary compound sequentially having at least three crystalline phases having different resistance values according to an increase of temperature of the phase change material. | 09-02-2010 |
20110254103 | Semiconductor Memory Devices Having Strain Layers Therein That Increase Device Performance And Methods of Forming Same - Integrated circuit memory devices include a semiconductor word line having an electrically insulating strain layer directly contacting an upper surface thereof. The strain layer, which has a contact opening therein, has a sufficiently high degree of internal compressive strain therein to thereby impart a net tensile stress within at least a first portion of the semiconductor word line. A P-N junction diode is also provided on the semiconductor word line. The diode includes a first terminal (e.g., cathode, anode) electrically coupled through the opening in the strain layer to the surface of the semiconductor word line. A data storage element (e.g., MRAM, FRAM, PRAM, RRAM, etc.) may also be provided, which has a current carrying terminal electrically coupled to a second terminal of the p-n junction diode. | 10-20-2011 |
20130280882 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor device is provided. The method includes forming semiconductor patterns on a semiconductor substrate, such that sides are surrounded by a lower interlayer insulating layer. A lower insulating layer is formed that covers the semiconductor patterns and the lower interlayer insulating layer. A contact structure is formed that penetrates the lower insulating layer and the lower interlayer insulating layer and is spaced apart from the semiconductor patterns. The contact structure has an upper surface higher than the semiconductor patterns. An upper insulating layer is formed covering the contact structure and the lower insulating layer. The upper and lower insulating layers form insulating patterns exposing the semiconductor patterns and covering the contact structure, and each of the insulating patterns includes a lower insulating pattern and an upper insulating pattern sequentially stacked. After the insulating patterns are formed, metal-semiconductor compounds are formed on the exposed semiconductor patterns. | 10-24-2013 |
20150311438 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor device is provided. The method includes forming semiconductor patterns on a semiconductor substrate, such that sides are surrounded by a lower interlayer insulating layer. A lower insulating layer is formed that covers the semiconductor patterns and the lower interlayer insulating layer. A contact structure is formed that penetrates the lower insulating layer and the lower interlayer insulating layer and is spaced apart from the semiconductor patterns. The contact structure has an upper surface higher than the semiconductor patterns. An upper insulating layer is formed covering the contact structure and the lower insulating layer. The upper and lower insulating layers form insulating patterns exposing the semiconductor patterns and covering the contact structure, and each of the insulating patterns includes a lower insulating pattern and an upper insulating pattern sequentially stacked. After the insulating patterns are formed, metal-semiconductor compounds are formed on the exposed semiconductor patterns. | 10-29-2015 |
Youn-Ho Hwang, Hwaseong-Si KR
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20140301001 | Source Driving Integrated Circuits Including an Electrostatic Discharge Circuit and Related Layout Method - A source driving integrated circuit is provided. The source driving integrated circuit includes a source driver area, an electrostatic discharge (ESD) circuit area and a fan-out area. The source driver area includes a plurality of source driver units. The ESD circuit area includes a plurality of ESD units. The fan-out area includes conduction lines for electrically connecting respective ones of the source driver units of the source driver area to ones of the plurality of the ESD units of the ESD circuit area. In a horizontal structure of a semiconductor integrated circuit, the fan-out area at least partially overlaps the ESD circuit area. | 10-09-2014 |
20150022948 | CAPACITOR STRUCTURE - A capacitor structure includes a first electrode structure and a second electrode structure. The first electrode structure includes a first negative plate and a first positive plate spaced apart from each other. The first electrode structure has a first horizontal capacitance between the first negative plate and the first positive plate. The second electrode structure includes a second positive plate and a second negative plate spaced apart from each other on the first electrode structure. The second electrode structure has a second horizontal capacitance between the second negative plate and the second positive plate. First and second vertical capacitances are formed between the first negative plate and the second positive plate and between the first positive plate and the second negative plate. | 01-22-2015 |