Patent application number | Description | Published |
20090065238 | PRINTED CIRCUIT BOARD - An exemplary PCB includes a first reference layer, a first signal layer, a second signal layer, and a third signal layer in that order, a first differential pair is arranged in the first signal layer in edge-coupled structure and references the first reference layer, a distance between the first signal layer and the second signal layer is greater than a distance between the first reference layer and the first signal layer, a second differential pair is arranged in the second signal layer and the third signal layer in broad-coupled structure. The PCB has a high density layout of transmission lines. | 03-12-2009 |
20090260859 | FLEXIBLE PRINTED CIRCUIT BOARD - A flexible printed circuit board (FPCB) includes a signal layer comprising a differential pair, a ground layer comprising a grounded sheet made of conductive material, and a dielectric layer located between the signal layer and the ground layer. A void is located on the two opposite sides of the grounded sheet in the ground layer. The differential pair comprises two transmission lines and each transmission line is capable of transmitting a differential signal. The distances between the middle line of the grounded sheet and the middle line of each of the two transmission lines are equal. | 10-22-2009 |
20100258337 | FLEXIBLE PRINTED CIRCUIT BOARD - A flexible printed circuit board (FPCB) includes a signal layer, upper and lower ground layers, and two dielectric layers. The signal layer includes a differential pair comprising two transmission lines to transmit a pair of differential signals. The dielectric layers are located on and under the signal layer to sandwich the signal layer. The upper ground layer is attached to the dielectric layer on the signal layer, opposite to the signal layer. The lower ground layer is attached to the dielectric layer under the signal layer, opposite to the signal layer. Each ground layer includes a grounded sheet made of conductive material. Two voids are defined in each ground layer and located at opposite sides of the corresponding grounded sheet. Distances between the middle line of the grounded sheet of each ground layer and middle lines of the two transmission lines are equal. | 10-14-2010 |
20100276192 | METHOD FOR REMOVING A STUB OF A VIA HOLE AND A PRINTED CIRCUIT BOARD DESIGNED BASED ON THE METHOD - A method for removing a stub of a via hole includes copperizing a wall of a via hole in a top layer of a printed circuit board (PCB) if signal lines are located on the top layer of the PCB, and a wall of the via hole in a bottom layer of the PCB is not copperized. The method further includes connecting the top layer and the bottom layer of the PCB using a connection layer. | 11-04-2010 |
20100277882 | MOTHERBOARD AND MOTHERBOARD LAYOUT METHOD - A motherboard layout method includes positioning two electronic elements on a top layer of a motherboard, and positioning another two electronic elements on a bottom layer of the motherboard, connecting one end of a first electronic element on the top layer to the same end of a first electronic element on the bottom layer with a first via hole, and connecting the same end of a second electronic element on the top layer to the same end of a second electronic element on the bottom layer with a second via hole. The method further includes connecting the other ends of the two electronic elements on the top layer to a first part, and connecting the other ends of the two electronic elements on the bottom layer to a second part. | 11-04-2010 |
20110055796 | SYSTEM AND METHOD FOR REMOVING T-POINT ELEMENTS WITH UNUSED STUBS FROM A PCB LAYOUT DESIGN - A system and method for removing T-point elements with unused stubs from a printed circuit board (PCB) layout design obtains each signal line including one or more T-point elements in the PCB layout design, divides the obtained signal line into a plurality of lines according to the one or more T-point elements with unused stubs, and obtains properties of each of the plurality of lines. The system and method further deletes the original layout of the signal line and reconnects the plurality of lines according to the properties of each of the plurality of lines to generate a reconnected signal line, and outputs the reconnected signal line on a display device. | 03-03-2011 |
20110094782 | PRINTED CIRCUIT BOARD - A printed circuit board includes a signal plane and a reference plane. The signal plane includes a pad, a passive element mounted on the pad, and a signal transmission line electrically connected to the passive element via the pad. The reference plane provides a return path for a signal transmitted through the passive element and the signal transmission line. A void is defined in the reference plane corresponding to the passive element, to increase a length of the return path. A length of a first axis, perpendicular to the signal transmission line, of the void satisfies a following equation: | 04-28-2011 |
20110094783 | PRINTED CIRCUIT BOARD - A printed circuit board (PCB) includes a signal plane and a reference plane. The signal plane includes a pad, a passive element mounted on the pad, and a signal transmission line electrically connected to the passive element via the pad. The reference plane provides a return path for a signal transmitted through the passive element and the transmission line. A void is defined in the reference plane corresponding to the passive element, to increase a length of the return path. | 04-28-2011 |
20120007688 | PRINTED CIRCUIT BOARD - A printed circuit board includes an insulation layer and a signal layer attached to the insulation layer. The signal layer includes a pair of differential transmission lines. Width W of each of the differential transmission lines is changed according to change of space S between the differential transmission lines, based on the following formula: | 01-12-2012 |
20120017191 | COMPUTING DEVICE AND METHOD FOR CHECKING DISTANCES BETWEEN TRANSMISSION LINES AND ANTI-PADS ARRANGED ON PRINTED CIRCUIT BOARD - A computing device and a method involves selection of one or more transmission lines from a printed circuit board (PCB) layout file, reading a transmission line from the one or more selected transmission lines, and determining neighboring anti-pads of the read transmission line in the PCB layout file. The computing device and method further determine an actual distance between the read transmission line and a neighboring anti-pad. If the actual distance is less than a preset standard distance, the computing device and method determine that the read transmission line and the neighboring anti-pad do not satisfy design requirements, and highlight the read transmission line and the neighboring anti-pad, to prompt a user to amend design of the read transmission line and the neighboring anti-pad. | 01-19-2012 |
20120026707 | PRINTED CIRCUIT BOARD - A printed circuit board includes first and second layers, a control chip, bonding pads, and several electronic elements. The bonding pads can be selectively applied to interconnect the first and second layers, and the control chip with any of the electronic elements in a simple layout. | 02-02-2012 |
20120030639 | COMPUTING DEVICE AND METHOD FOR CHECKING SIGNAL TRANSMISSION LINES - A computing device and a method selects a signal transmission line from a circuit board, computes an actual length of each line segment of the selected signal transmission line, and computes an actual distance between each line segment of the selected signal transmission line and a corresponding line segment of each neighboring signal transmission line. If each actual length is less than or equal to a corresponding reference length and each actual distance is more than or equal to a corresponding reference distance, the device and method determines a design of the selected signal transmission line satisfies the design standards. Otherwise, if any actual length is more than a corresponding reference length, or if any actual distance is less than a corresponding reference distance, the device and method determines the design of the signal transmission line does not satisfy the design standards. | 02-02-2012 |
20120167027 | ELECTRONIC DEVICE AND METHOD FOR CHECKING LAYOUT DISTANCE OF A PRINTED CIRCUIT BOARD - An electronic device and a method for checking layout distance of a printed circuit board (PCB) including presetting a checking condition to determine a reference layer. A high speed signal path is selected from a PCB design file, and a layer where the selected high speed signal path is located can be determined A reference layer of the determined layer is determined according to the checking condition, and a split line of the reference layer is determined. A shortest distance between each segment of the selected high speed signal path and the split line is calculated. If the shortest distance between a segment and the split line is less than the standard distance, layout of the segment is determined to be invalid. | 06-28-2012 |
20120185819 | SYSTEM AND METHOD FOR VERIFYING PCB LAYOUT - In a method for verifying a printed circuit board (PCB) layout using a computing device, a PCB simulation file is obtained from a storage device of the computing device, and a PCB image is displayed on a display device according to the PCB simulation file. The PCB image includes multiple signal lines and switching voltage regulator nodes (SVRN). A SVRN to be checked is selected from the PCB image, and all signal lines around the SVRN are searched. The method calculates a layout distance between the selected SVRN and each of the searched signal lines, and generates a graphical window interface to position a signal line whose layout distance is equal to or less than the minimum distance. The method further modifies the layout of the positioned signal line to satisfy a layout design specification by increasing the layout distance to the minimum distance. | 07-19-2012 |
20120234590 | PRINTED CIRCUIT BOARD - A printed circuit board includes first to sixth layers, and first to third traces. The first trace is arranged on the first layer. The second trace is arranged on the third layer. The third trace is arranged on the sixth layer. The second trace is electrically connected to the first trace through a first vertical interconnection access (via). The second trace is electrically connected to the third trace through a second via. | 09-20-2012 |
20120241201 | CIRCUIT BOARD - A circuit board includes a substrate and a copper layer positioned on the substrate. The copper layer includes a BGA area and a non-BGA area, and includes traces. The widths of the traces in the BGA area are smaller than the widths of the traces in the non-BGA area, the dielectric coefficient of the substrate in the BGA area is greater than the dielectric coefficient of the substrate in the non-BGA area for keeping the impedance of the traces consistent in the BGA area and in the non-BGA area. | 09-27-2012 |
20120243193 | MOTHERBOARD INTERCONNECTION DEVICE AND MOTHERBOARD INTERCONNECTION METHOD - A motherboard interconnection method includes positioning a first and a third electronic elements on a top layer of a motherboard interconnection device, and positioning a second and a fourth electronic elements on a bottom layer of the motherboard interconnection device. The method connects a first end of the first electronic element on the top layer to the first end of the second electronic element on the bottom layer with a first via hole, and connects the first end of the third electronic element on the top layer to the first end of the fourth electronic element on the bottom layer with a second via hole. The method further connects a second ends of the two electronic elements on the top layer to a first part, and connects the second ends of the two electronic elements on the bottom layer to a second part. | 09-27-2012 |
20120268283 | CIRCUIT BOARD HAVING CURRENT BALANCE FUNCTION - A circuit board includes a current balancing unit that receives a number of current values from ammeters. A minimum current value between the current values is determined by the current balancing unit. Resistance of one or more variable resistors of the current balancing unit is adjusted by the current balancing unit to make the current value from one or more the ammeters serially connected to the one or more the variable resistors to be substantially equal to the minimum current value. | 10-25-2012 |
20120273254 | SOLDERING PAD - A pad includes a first mating section and a second mating section. The first mating section includes a first horizontal plane and a first inclined plane. The second mating section includes a second horizontal plane and a second inclined plane. The first mating section is a copper foil capable of being connected to a wire. The second mating section is made of insulating material. The first inclined plane and the second inclined plane are bonded together. | 11-01-2012 |
20120331434 | COMPUTING DEVICE AND METHOD FOR CHECKING SIGNAL TRANSMISSION LINES - A computing device and a method reads design standards of signal transmission lines in a printed circuit board (PCB) layout file, and determines a minimum reference length of line segments of the signal transmission lines from the design standards. The device and method then selects a signal transmission line from a circuit board, and computes an actual length of each line segment of the selected signal transmission line. If each actual length is more than or equal to the minimum reference length, the device and method determines length design of the selected signal transmission line satisfies the design standards. Otherwise, if any actual length is less than the minimum reference length, the device and method determines the length design of the signal transmission line does not satisfy the design standards. | 12-27-2012 |
20120331437 | ELECTRONIC DEVICE AND METHOD FOR CHECKING LAYOUT OF PRINTED CIRCUIT BOARD - In a method for checking layout of a printed circuit board (PCB) using an electronic device, a signal line is selected from a layout diagram of the PCB. The method searches for signal lines which have an acute angle when deviating from a straight line in the layout diagram of the PCB. The method further locates attribute data of the searched signal lines in the layout diagram of the PCB, and displays the attribute data of the searched signal lines on a display device of the electronic device. | 12-27-2012 |
20130048352 | PRINTED CIRCUIT BOARD - A printed circuit board includes a signal layer and a reference layer. The signal layer is covered with copper foil. A circuit topology for multiple loads is set on the signal layer. The circuit topology includes a driving terminal, a first signal receiving terminal, and a second signal receiving terminal. The driving terminal is connected to a node through a first transmission line. The node is connected to the first and second signal receiving terminals respectively through a second and a third transmission lines. A difference between lengths of the second and third transmission lines is greater than a product of a transmission speed and a rise time of signals from the driving terminal. The reference layer is covered with copper foil, and arranged under the signal layer. A region without copper foil is formed on the reference layer, under the second transmission line. | 02-28-2013 |
20130049461 | CIRCUIT TOPOLOGY OF PRINTED CIRCUIT BOARD - A circuit topology for multiple loads includes a driving terminal, first and second signal receiving terminals, and a capacitor. The driving terminal is connected to a node through a first transmission line. The node is connected to the first and second signal receiving terminals through second and third transmission lines. The second transmission line is longer than the third transmission line, and a difference between lengths of the second and third transmission lines is greater than a product of a transmission speed and a rise time of signals from the driving terminal. A first terminal of the capacitor is connected to the third transmission line. A second terminal of the capacitor is grounded. A distance between the capacitor and the second signal receiving terminal is less than a distance between the capacitor and the node. | 02-28-2013 |
20130097576 | COMPUTING DEVICE AND METHOD FOR CHECKING VIA STUB - A computer-based method and a computing device for checking stub lengths of via stubs of a printed circuit board (PCB) layout are provided. The computing device displays a check interface, selects signal transmission line from a currently run PCB layout through the check interface, receives a reference stub length input through the check interface, and determines the actual stub length of each via stub of each via each selected signal transmission line connected to. The computing device further determines that a design of one via stub satisfies the design standards, if the actual stub length of the one stub via is less than or equal to the reference length, and determines that a design of one via stub does not satisfy the design standards if the actual stub length of the one via stub is greater than the reference stub length. | 04-18-2013 |
20130158925 | COMPUTING DEVICE AND METHOD FOR CHECKING DIFFERENTIAL PAIR - A computer-based method and a computing device for checking differential pairs of a printed circuit board layout are provided. The computing device determines the via pitch between switching vias of a differential pair according to the coordinates of the centers of the switching vias, determines the via gap between the switching vias of adjacent two differential pairs according to the radius and the coordinates of the centers of the switching vias, and determines that the switching vias does not satisfy design standards if the via pitch does not fall in an input via pitch range, or the via gap does not fall in an input via gap range. | 06-20-2013 |
20130254729 | DEVICE AND METHOD FOR CHECKING SIGNAL TRANSMISSION LINES OF PCB LAYOUT FILES - A device and a method reads a circuit printed circuit (PCB) layout file, extracts arrangement information of all the interference source components and signal transmission lines of the PCB layout file, and selects a interference source component from the PCB layout file, then determines if there is any signal transmission line is laid under the selected interference source component. | 09-26-2013 |
20130285450 | PRINTED CIRCUIT BOARD - A printer circuit board (PCB) includes a voltage regulator module (VRM) and a body. The VRM supplies power to a first load and a second load. A decoupling circuit is set on one side of the first load, and the decoupling circuit is electronically connected to the first load. The body includes a multi-layer circuit board. The VRM, the first load, and the second load are positioned on one layer of the circuit board, where the VRM is electronically connected to the first load, but the VRM and the first load are electronically disconnected with the second load. The VRM, the first load, and the second load two are positioned on two other layers of the circuit board, where the first load is electronically connected to the second load, but the first load and the second load are electronically disconnected to the VRM. | 10-31-2013 |
20140115550 | COMPUTING DEVICE AND METHOD FOR CHECKING LENGTH OF SIGNAL TRACE - In a method for checking the length of a signal trace between a coupling capacitor and a via in a printed circuit board (PCB) design using a computing device, a PCB file is obtained from a storage device to simulate a PCB design. The signal trace between the coupling capacitor and the via is filtered on the PCB design, and a real length of the signal trace between the coupling capacitor and the via is calculated. If the real length is greater than a specified length, the method locates a position of the via on the PCB design and generates a design report indicating that the signal trace between the coupling capacitor and the via is unqualified. The method further displays information of the signal trace on a display device of the computing device. | 04-24-2014 |
20140149960 | COMPUTING DEVICE AND METHOD FOR CHECKING WIRING DIAGRAMS OF PCB - In a method for checking wiring diagrams, one element is selected from a first printed circuit board (PCB) file. An element corresponding to the selected element in a second PCB file is searched according to information of the selected element, then the information is recorded into a different element list of the first PCB file, when the second PCB file does not have a corresponding element. The information is recorded into a same element list, when the second PCB file has a corresponding element and the corresponding element has the same information with the element in the first PCB file. The second PCB file and the same element list are compared to locate elements which are included in the second PCB file but not included in the same element list, and the information of the located elements is recorded into a different element list of the second PCB file. | 05-29-2014 |
20140165025 | COMPUTING DEVICE AND METHOD FOR CHECKING SIGNAL TRANSMISSION LINE - A signal transmission line check method to be executed by a computing device is described. A to-be-checked signal transmission line group in a displayed printed circuit board (PCB) layout is determined. Whether all signal transmission lines of the to-be-checked signal transmission line group are laid out in a same layer of the displayed PCB layout is checked according to an input serial number of a chipset and layer properties of the to-be-checked signal transmission lines. The signal transmission lines that do not satisfy design standards are determined when not all of the to-be-checked signal transmission lines are laid out in a same layer. A related computing device is also disclosed. | 06-12-2014 |
20140167874 | PRINTED CIRCUIT BOARD CAPABLE OF REDUCING RETURN LOSS OF DIFFERENTIAL SIGNAL AND ELECTRONIC DEVICE USING THE SAME - A printed circuit board (PCB) includes a receiver component, a transmission line including a positive signal transmission line and a negative signal transmission line, a transmitter component, and a capacitance unit. The transmitter component transmits a different signal to the receiver component via the transmission line. The capacitance unit is spaced from the receiver component a predetermined distance S, therein, the predetermined distance S is calculated by a formula S=Vx (n*UI−(C | 06-19-2014 |
20140173549 | COMPUTING DEVICE AND METHOD OF CHECKING WIRING DIAGRAMS OF PCB - In a method for checking a wiring diagram in a printed circuit board (PCB) design, a pair of differential signal lines in a PCB file is located according to a designation of a user. Components connected by the differential signal lines and vias which the differential signal lines pass through are obtained from the PCB file. A determination of whether obtained components and the obtained vias meet predetermined requirements is made by checking whether copper foils between each pair of the obtained vias or between pins of the obtained components in ground layers and power layers of the PCB file are hollowed. | 06-19-2014 |
20140196000 | SYSTEM AND METHOD FOR CHECKING SIGNAL TRANSMISSION LINE - A method for checking signal transmission lines of a printed circuit board (PCB) layout includes determining differential pairs to be checked and dividing the differential pairs to be checked into a first group and a second group. A first reference distance between differential pairs belonging to the same group and a second reference distance between differential pairs belonging to different groups are set. A first box surrounding each line section of one to be checked signal differential line of the first group and a second box surrounding the first box are created. One first box surrounding each line section of the to be checked differential line of the second group is created. Whether or not in the first box and the second box there are differential lines which do not satisfy design standards is determined. | 07-10-2014 |
20140310674 | SYSTEM AND METHOD FOR CHECKING SIGNAL TRANSMISSION LINE - A computer-based method for checking signal transmission lines of a printed circuit board (PCB) layout is provided. A design rules is set according to different length requirements and the quantity of storage devices input by users. A group of transmission line from a displayed PCB layout is selected. The quantity of branch lines of each transmission line to be checked and the length of each branch line of the group of transmission lines to be checked are computed. The design of which branch lines does not satisfy the design rules is determined according to the computed quantity of the branch lines of each transmission line to be checked, the length of each branch line of the group of transmission lines, and the design rules. | 10-16-2014 |