Patent application number | Description | Published |
20080212376 | METHODS OF OPERATING AND MANUFACTURING LOGIC DEVICE AND SEMICONDUCTOR DEVICE INCLUDING COMPLEMENTARY NONVOLATILE MEMORY DEVICE, AND READING CIRCUIT FOR THE SAME - Provided are a complementary nonvolatile memory device, methods of operating and manufacturing the same, a logic device and semiconductor device having the same, and a reading circuit for the same. The complementary nonvolatile memory device includes a first nonvolatile memory and a second nonvolatile memory which are sequentially stacked and have a complementary relationship. The first and second nonvolatile memories are arranged so that upper surfaces thereof are contiguous. | 09-04-2008 |
20080312088 | Field effect transistor, logic circuit including the same and methods of manufacturing the same - Provided are a field effect transistor, a logic circuit including the same and methods of manufacturing the same. The field effect transistor may include an ambipolar layer that includes a source region, a drain region, and a channel region between the source region and the drain region, wherein the source region, the drain region, and the channel region may be formed in a monolithic structure, a gate electrode on the channel region, and an insulating layer separating the gate electrode from the ambipolar layer, wherein the source region and the drain region have a width greater than that of the channel region in a second direction that crosses a first direction in which the source region and the drain region are connected to each other. | 12-18-2008 |
20090020399 | Electromechanical switch and method of manufacturing the same - Provided is an electromechanical switch and a method of manufacturing the same. The electromechanical switch includes an elastic conductive layer that moves by the application of an electric field, wherein the elastic conductive layer includes at least one layer of graphene. | 01-22-2009 |
20090032795 | Schottky diode and memory device including the same - A Schottky diode and a memory device including the same are provided. The Schottky diode includes a first metal layer and an Nb-oxide layer formed on the first metal layer. | 02-05-2009 |
20090040883 | Magnetic track using magnetic domain wall movement and information storage device including the same - Provided are a magnetic track using magnetic domain wall movement and an information storage device including the same. A magnetic track may comprise a zigzag shaped storage track including a plurality of first magnetic layers in parallel with each other, and stacked separate from each other, and a plurality of second magnetic layers for connecting the plurality of first magnetic layers. The information storage device may include the magnetic track having a plurality of magnetic domains, current applying device connected to the magnetic track, and a read/write device on a middle portion of the magnetic track. | 02-12-2009 |
20090073859 | Magnetic tracks, information storage devices using magnetic domain wall movement, and methods of manufacturing the same - Information storage devices and methods of manufacturing the same are provided. A magnetic track of the information storage device includes a magnetic layer in which at least one magnetic domain forming region and at least one magnetic domain wall forming region are alternately disposed in a lengthwise direction. The at least one magnetic domain forming regions has a different magnetic anisotropic energy relative to the at least one magnetic domain wall forming region. An intermediate layer is formed under the magnetic layer. The intermediate layer includes at least one first material region and at least one second material region. Each of the at least one first material regions and the at least one second material regions corresponds to one of the at least one magnetic domain forming regions and the at least one magnetic domain wall forming regions. | 03-19-2009 |
20090097365 | Magnetic layer, method of forming the magnetic layer, information storage device including the magnetic layer, and method of manufacturing the information storage device - Provided are a magnetic layer, a method of forming the magnetic layer, an information storage device, and a method of manufacturing the information storage device. The information storage device may include a magnetic track having a plurality of magnetic domains, a current supply element connected to the magnetic layer and a reading/writing element. The magnetic track includes a hard magnetic track, and the hard magnetic track has a magnetization easy-axis extending in a direction parallel to a width of the hard magnetic track. | 04-16-2009 |
20090109740 | Semiconductor device using magnetic domain wall movement - Provided may be a semiconductor device using magnetic domain wall movement. The semiconductor device may include a magnetic track having a plurality of magnetic domains and a thermal conductive insulating layer configured to contact the magnetic track. The thermal conductive insulating layer may prevent or reduce the magnetic track from being heated due to a current supplied to the magnetic track. | 04-30-2009 |
20090117697 | Nonvolatile memory device including nano dot and method of fabricating the same - A nonvolatile memory device including a nano dot and a method of fabricating the same are provided. The nonvolatile memory device may include a lower electrode, an oxide layer on the lower electrode, a nano dot in the oxide layer and an upper electrode on the oxide layer. In example embodiments, the current paths inside the oxide layer may be unified, thereby stabilizing the reset current. | 05-07-2009 |
20090122596 | Semconductor memory device and method of programming the same - Provided are a semiconductor memory device and a method of programming the same. The semiconductor memory device includes a mode input value generating unit and a logic operating unit. The mode input value generating unit changes a connection state between input values of a current driving circuit so as to correspond to each of at least two operating modes, and defines a logic function of a magnetic memory cell connected to the current driving circuit in response to each operating mode. The logic operating unit performs a logic operation on the logic functions of at least two magnetic memory cells defined according to each of the operating modes and generates a result of logic operation. | 05-14-2009 |
20090130492 | Information storage devices using magnetic domain wall movement and methods of manufacturing the same - Information storage devices and methods of manufacturing the same are provided. An information storage device includes a magnetic layer formed on an underlayer. The underlayer has at least one first region and at least one second region. The first and second regions have different crystallinity characteristics. The magnetic layer has at least one third region formed on the at least one first region and at least one fourth region formed on the at least one second region. The third and fourth regions have different magnetic anisotropic energy constants. | 05-21-2009 |
20090251267 | Inductors and methods of operating inductors - An inductor may include a conductive line including a material in which an electrical resistance varies depending on an electric field applied to the material and/or first and second electrodes electrically connected to first and second end portions of the conductive line, respectively. A method of operating an inductor may include applying current to a conductive line of the inductor. The conductive line may include a material in which an electrical resistance may vary depending on an electric field applied to the material. The current may be applied to the conductive line via first and second electrodes electrically connected to first and second end portions of the conductive line, respectively. | 10-08-2009 |
20090251956 | Magnetic random access memory devices, methods of driving the same and data writing and reading methods for the same - A magnetic memory device includes a lower structure or an antiferromagnetic layer, a pinned layer, an information storage layer, and a free layer formed on the lower structure or the antiferromagnetic layer. In a method of operating a magnetic memory device, information from the storage information layer is read or stored after setting the magnetization of the free layer in a first magnetization direction. The information is stored when the first magnetization direction is opposite to a magnetization direction of the pinned layer, but is read when the first magnetization direction is the same as the magnetization direction of the pinned layer. | 10-08-2009 |
20090294759 | Stack structure comprising epitaxial graphene, method of forming the stack structure, and electronic device comprising the stack structure - Provided are a stack structure including an epitaxial graphene, a method of forming the stack structure, and an electronic device including the stack structure. The stack structure includes: a Si substrate; an under layer formed on the Si substrate; and at least one epitaxial graphene layer formed on the under layer. | 12-03-2009 |
20090316475 | Information storage devices and methods of operating the same - Provided are an information storage device and a method of operating the same. The information storage device includes: a magnetic layer having a plurality of magnetic domain regions and a magnetic domain wall interposed between the magnetic domain regions; a first unit disposed on a first region which is one of the plurality of magnetic domain regions for recording information to the first region; a second unit connected to the first unit for inducing a magnetic field so as to record information to the first region. | 12-24-2009 |
20100008135 | Information storage devices using magnetic domain wall movement and methods of operating the same - An information storage device includes a storage node, a write unit configured to write information to a first magnetic domain region of the storage node, and a read unit configured to read information from a second magnetic domain region of the storage node. The information storage device further includes a temporary storage unit configured to temporarily store information read by the read unit, and a write control unit electrically connected to the temporary storage unit and configured to control current supplied to the write unit. The information read from the second magnetic domain region is stored in the temporary storage unit and written to the first magnetic domain region. | 01-14-2010 |
20100090759 | Quantum interference transistors and methods of manufacturing and operating the same - A quantum interference transistor may include a source; a drain; N channels (N≧2), between the source and the drain, and having N−1 path differences between the source and the drain; and at least one gate disposed at one or more of the N channels. One or more of the N channels may be formed in a graphene sheet. A method of manufacturing the quantum interference transistor may include forming one or more of the N channels using a graphene sheet. A method of operating the quantum interference transistor may include applying a voltage to the at least one gate. The voltage may shift a phase of a wave of electrons passing through a channel at which the at least one gate is disposed. | 04-15-2010 |
20100135059 | Information storage devices using magnetic domain wall movement and methods of operating the same - Provided are information storage devices using movement of magnetic domain walls and methods of operating information storage devices. An information storage device includes a magnetic track and an operating unit. The magnetic track includes a plurality of magnetic domains separated by magnetic domain walls. The size of the operating unit is sufficient to cover at least two adjacent magnetic domains. And, the operating unit may be configured to write/read information to/from a single magnetic domain as well as a plurality of magnetic domains of the magnetic track. | 06-03-2010 |
20100149863 | Magnetic tracks, information storage devices including magnetic tracks, and methods of operating information storage devices - A magnetic track includes first and second magnetic domain regions having different lengths and different magnetic domain wall movement speeds. A longer of the first and second magnetic domain regions serves as an information read/write region. An information storage device includes a magnetic track. The magnetic track includes a plurality of magnetic domain regions and a magnetic domain wall region formed between neighboring magnetic domain regions. The plurality of magnetic domain regions includes a first magnetic domain region and at least one second magnetic domain region having a smaller length than the first magnetic domain region. The information storage device further includes a first unit configured to perform at least one of an information recording operation and an information reproducing operation on the first magnetic domain region, and a magnetic domain wall movement unit configured to move a magnetic domain wall of the magnetic domain wall region. | 06-17-2010 |
20100157663 | Information storage device and method of operating the same - An information storage device includes a memory region having a magnetic track and a write/read unit, and a control circuit connected to the memory region. First and second switching devices are connected to both ends of the magnetic track, and a third switching device is connected to the write/read unit. The control circuit controls the first to third switching devices, and supplies operating current to at least one of the magnetic track and the write/read unit. | 06-24-2010 |
20100172169 | Magnetic structures, information storage devices including magnetic structures, methods of manufacturing and methods of operating the same - A magnetic structure includes a first portion and a plurality of second portions. The first portion extends in a first direction. The plurality of second portions extend from ends of the first portion in a second direction. The first and second directions are perpendicular to one another. Two magnetic domains magnetized in directions opposite to each other and a magnetic domain wall between the magnetic domains are formed in the magnetic structure. | 07-08-2010 |
20100232055 | Information storage devices and methods of operating the same - An information storage device includes a magnetic structure having a buffer track and a plurality of storage tracks connected to the buffer track. A write/read unit is disposed on the magnetic structure, and a plurality of switching devices are respectively connected to the buffer track, the plurality of storage tracks, and the write/read unit. The switching devices that are respectively connected to the buffer track and the storage tracks. The information storage device further includes a circuit configured to supply current to at least one of the magnetic structure and the write/read unit. | 09-16-2010 |
20100296347 | Method of erasing device including complementary nonvolatile memory devices - Provided are a complementary nonvolatile memory device, methods of operating and manufacturing the same, a logic device and semiconductor device having the same, and a reading circuit for the same. The complementary nonvolatile memory device includes a first nonvolatile memory and a second nonvolatile memory which are sequentially stacked and have a complementary relationship. The first and second nonvolatile memories are arranged so that upper surfaces thereof are contiguous. | 11-25-2010 |
20110018647 | Oscillators using magnetic domain wall and methods of operating the same - An oscillator generates a signal using precession of a magnetic moment of a magnetic domain wall. The oscillator includes a free layer having the magnetic domain wall and a fixed layer corresponding to the magnetic domain wall. A non-magnetic separation layer is interposed between the free layer and the fixed layer. | 01-27-2011 |
20110045318 | Tracks including magnetic layer and magnetic memory devices comprising the same - A magnetic memory device includes a track in which different non-magnetic layers are respectively formed on upper and lower surfaces of a magnetic layer. One of the two non-magnetic layers includes an element having an atomic number greater than or equal to 12. Accordingly, the magnetic layer has a relatively high non-adiabaticity (β). | 02-24-2011 |
20110063885 | Information storage devices including vertical nano wires - A memory cell includes: a memory cell array unit having a plurality of nano wires arranged vertically on a substrate, each of the plurality of nano wires having a plurality of domains for storing information; a nano wire selection unit formed on the substrate and configured to select at least one of the plurality of nano wires; a domain movement control unit formed on the substrate and configured to control a domain movement operation with respect to at least one of the plurality of nano wires; and a read/write control unit formed on the substrate and configured to control at least one of a read operation and a write operation with respect to at least one of the plurality of nano wires. | 03-17-2011 |
20110080221 | Oscillators and methods of operating the same - An oscillator includes: a plurality of free layers and a non-magnetic layer disposed between the plurality of free layers. Each of the plurality of free layers has perpendicular magnetic anisotropy or in-plane magnetic anisotropy. Magnetization directions of the free layers are periodically switched such that a signal within a given frequency band oscillates. | 04-07-2011 |
20110085258 | Magneto-resistive devices, information storage devices including the same and methods of operating information storage devices - An information storage device includes a magnetic track and a magnetic domain wall moving unit. The magnetic track has a plurality of magnetic domains and a magnetic domain wall between each pair of adjacent magnetic domains. The magnetic domain wall moving unit is configured to move at least the magnetic domain wall. The information storage device further includes a magneto-resistive device configured to read information recorded on the magnetic track. The magneto-resistive device includes a pinned layer, a free layer and a separation layer arranged there between. The pinned layer has a fixed magnetization direction. The free layer is disposed between the pinned layer and the magnetic track, and has a magnetization easy axis, which is non-parallel to the magnetization direction of the pinned layer. | 04-14-2011 |
20110089403 | Electronic device using a two-dimensional sheet material, transparent display and methods of fabricating the same - An electronic device, a transparent display and methods for fabricating the same are provided, the electronic device including a first, a second and a third element each formed of a two-dimensional (2D) sheet material. The first, second, and third elements are stacked in a sequential order or in a reverse order. The second element is positioned between the first element and the third element. The second element has an insulator property, the first and third elements have a metal property or a semiconductor property. | 04-21-2011 |
20110089995 | Graphene device and method of manufacturing the same - Provided is a graphene device and a method of manufacturing the same. The graphene device may include an upper oxide layer on at least one embedded gate, and a graphene channel and a plurality of electrodes on the upper oxide layer. The at least one embedded gate may be formed on the substrate. The graphene channel may be formed on the plurality of electrodes, or the plurality of electrodes may be formed on the graphene channel. | 04-21-2011 |
20110092054 | Methods for fixing graphene defects using a laser beam and methods of manufacturing an electronic device - Methods of fixing graphene using a laser beam and methods of manufacturing an electronic device are provided, the method of fixing graphene includes fixing a defect of a graphene nanoribbon by irradiating the laser beam onto the graphene nanoribbon. | 04-21-2011 |
20110108521 | Methods of manufacturing and transferring larger-sized graphene - Example embodiments relate to methods of manufacturing and transferring a larger-sized graphene layer. A method of transferring a larger-sized graphene layer may include forming a graphene layer, a protection layer, and an adhesive layer on a substrate and removing the substrate. The graphene layer may be disposed on a transferring substrate by sliding the graphene layer onto the transferring substrate. | 05-12-2011 |
20110108609 | Methods of fabricating graphene using alloy catalyst - Methods of fabricating graphene using an alloy catalyst may include forming an alloy catalyst layer including nickel on a substrate and forming a graphene layer by supplying hydrocarbon gas onto the alloy catalyst layer. The alloy catalyst layer may include nickel and at least one selected from the group consisting of copper, platinum, iron and gold. When the graphene is fabricated, a catalyst metal that reduces solubility of carbon in Ni may be used together with Ni in the alloy catalyst layer. An amount of carbon that is dissolved may be adjusted and a uniform graphene monolayer may be fabricated. | 05-12-2011 |
20110121409 | Field effect transistors, methods of fabricating a carbon-insulating layer using molecular beam epitaxy and methods of fabricating a field effect transistor - Field effect transistors, methods of fabricating a carbon insulating layer using molecular beam epitaxy and methods of fabricating a field effect transistor using the same are provided, the methods of fabricating the carbon insulating layer include maintaining a substrate disposed in a molecular beam epitaxy chamber at a temperature in a range of about 300° C. to about 500° C. and maintaining the chamber in vacuum of 10 | 05-26-2011 |
20110133778 | NON-VOLATILE LOGIC CIRCUITS, INTEGRATED CIRCUITS INCLUDING THE NON-VOLATILE LOGIC CIRCUITS, AND METHODS OF OPERATING THE INTEGRATED CIRCUITS - Provided is a non-volatile logic circuit that includes a latch unit having a pair of latch nodes and a pair of non-volatile memory cells to be supplied first and second write voltages according to data of the pair of latch nodes when a write enable signal is activated such that a write operation is performed with respect to the pair of non-volatile memory cells. The first and second write voltages are different and logic values of data written to the respective non-volatile memory cells are different. | 06-09-2011 |
20110141803 | Magnetic tunnel junction devices, electronic devices including a magnetic tunneling junction device and methods of fabricating the same - Perpendicular magnetic tunnel junction (MTJ) devices, methods of fabricating a perpendicular MTJ device, electronic devices including a perpendicular MTJ device and methods of fabricating the electronic device are provided, the perpendicular MTJ devices include a pinned layer, a tunneling layer and a free layer. At least one of the pinned layer and the free layer includes a multi-layered structure including an amorphous perpendicular magnetic anisotropy (PMA) material. | 06-16-2011 |
20110149647 | Perpendicular magnetic tunnel junctions, magnetic devices including the same and method of manufacturing a perpendicular magnetic tunnel junction - Provided are a perpendicular magnetic tunnel junction (MTJ), a magnetic device including the same, and a method of manufacturing the MTJ, the perpendicular MTJ includes a lower magnetic layer; a tunnelling layer on the lower magnetic layer; and an upper magnetic layer on the tunnelling layer. One of the upper and lower magnetic layers includes a free magnetic layer that exhibits perpendicular magnetic anisotropy, wherein the magnetizing direction of the free magnetic layer is changed by a spin polarization current. A polarization enhancing layer (PEL) and an exchange blocking layer (EBL) are stacked between the tunnelling layer and the free magnetic layer. | 06-23-2011 |
20110149670 | Spin valve device including graphene, method of manufacturing the same, and magnetic device including the spin valve device - Provided are a spin valve device including graphene, a method of manufacturing the spin valve device, and a magnetic device including the spin valve device. The spin valve device may include at least one of a graphene sheet or a hexagonal boron nitride (h-BN) sheet between a lower magnetic layer and an upper magnetic layer. The graphene sheet may have a single layer structure or a multilayer structure. The spin valve device may further include a spacer between the lower magnetic layer and the graphene sheet. The spin valve device may further include a spacer between the graphene sheet and the upper magnetic layer. | 06-23-2011 |
20110210314 | Graphene electronic device and method of fabricating the same - A graphene electronic device may include a silicon substrate, connecting lines on the silicon substrate, a first electrode and a second electrode on the silicon substrate, and an interlayer dielectric on the silicon substrate. The interlayer dielectric may be configured to cover the connecting lines and the first and second electrodes and the interlayer dielectric may be further configured to expose at least a portion of the first and second electrodes. The graphene electronic device may further include an insulating layer on the interlayer dielectric and a graphene layer on the insulating layer, the graphene layer having a first end and a second end. The first end of the graphene layer may be connected to the first electrode and the second end of the graphene layer may be connected to the second electrode. | 09-01-2011 |
20110313194 | Graphene substituted with boron and nitrogen , method of fabricating the same, and transistor having the same - Graphene, a method of fabricating the same, and a transistor having the graphene are provided, the graphene includes a structure of carbon (C) atoms partially substituted with boron (B) atoms and nitrogen (N) atoms. The graphene has a band gap. The graphene substituted with boron and nitrogen may be used as a channel of a field effect transistor. The graphene may be formed by performing chemical vapor deposition (CVD) method using borazine or ammonia borane as a boron nitride (B—N) precursor. | 12-22-2011 |
20120038430 | OSCILLATORS AND METHODS OF OPERATING THE SAME - Oscillators and methods of operating the same, the oscillators include a pinned layer having a fixed magnetization direction, a first free layer over the pinned layer, and a second free layer over the first free layer. The oscillators are configured to generate a signal using precession of a magnetic moment of at least one of the first and second free layers. | 02-16-2012 |
20120043625 | Field effect transistors, methods of fabricating a carbon-insulating layer using molecular beam epitaxy and methods of fabricating a field effect transistor - Field effect transistors, methods of fabricating a carbon insulating layer using molecular beam epitaxy and methods of fabricating a field effect transistor using the same are provided, the methods of fabricating the carbon insulating layer include maintaining a substrate disposed in a molecular beam epitaxy chamber at a temperature in a range of about 300° C. to about 500° C. and maintaining the chamber in vacuum of 10 | 02-23-2012 |
20120056685 | Oscillators And Methods Of Operating The Same - An oscillator and a method of operating the same are provided, the oscillator may include a free layer, a pinned layer on a first surface of the free layer, and a reference layer on a second surface of the free layer. The free layer may have a variable magnetization direction. The pinned layer may have a pinned magnetization direction. The reference layer may have a magnetization direction non-parallel to the magnetization direction of the pinned layer. | 03-08-2012 |
20120068779 | Oscillators and methods of manufacturing and operating the same - Oscillators and methods of manufacturing and operating the same are provided, the oscillators include a pinned layer, a free layer and a barrier layer having at least one filament between the pinned layer and the free layer. The pinned layer may have a fixed magnetization direction. The free layer corresponding to the pinned layer. The at least one filament in the barrier layer may be formed by applying a voltage between the pinned layer and the free layer. The oscillators may be operated by inducing precession of a magnetic moment of at least one region of the free layer that corresponds to the at least one filament, and detecting a resistance change of the oscillator due to the precession. | 03-22-2012 |
20120075008 | GRAPHENE DEVICE AND METHOD OF MANUFACTURING THE SAME - The graphene device may include an upper oxide layer on at least one embedded gate, and a graphene channel and a plurality of electrodes on the upper oxide layer. The at least one embedded gate may be formed on the substrate. The graphene channel may be formed on the plurality of electrodes, or the plurality of electrodes may be formed on the graphene channel. | 03-29-2012 |
20120080658 | Graphene electronic device and method of fabricating the same - A graphene electronic device and a method of fabricating the graphene electronic device are provided. The graphene electronic device may include a graphene channel layer formed on a hydrophobic polymer layer, and a passivation layer formed on the graphene channel layer. The hydrophobic polymer layer may prevent or reduce adsorption of impurities to transferred graphene, and a passivation layer may also prevent or reduce adsorption of impurities to a heat-treated graphene channel layer. | 04-05-2012 |
20120112250 | Semiconductor Device Including Graphene And Method Of Manufacturing The Semiconductor Device - In a semiconductor device including graphene, a gate insulating layer may be formed between a gate electrode and a graphene layer, and an interlayer insulating layer may be formed under a portion of the graphene layer under which the gate insulating layer is not formed. The gate insulating layer may include a material that has higher dielectric permittivity than the interlayer insulating layer. | 05-10-2012 |
20120132893 | Graphene Electronic Devices - A graphene electronic device includes a gate electrode, a gate oxide disposed on the gate electrode, a graphene channel layer formed on the gate oxide, and a source electrode and a drain electrode respectively disposed on both ends of the graphene channel layer. In the graphene channel layer, a plurality of nanoholes are arranged in a single line in a width direction of the graphene channel layer. | 05-31-2012 |
20120138903 | Graphene Substrates And Methods Of Fabricating The Same - The graphene substrate may include a metal oxide film on a substrate, and a graphene layer on the metal oxide film. The concentration of oxygen in the metal oxide film may be gradually reduced from the substrate towards the graphene layer, and the graphene layer may be formed directly on the metal oxide film. | 06-07-2012 |
20120168722 | Graphene Electronic Device Including A Plurality Of Graphene Channel Layers - Graphene electronic devices may include a gate electrode on a substrate, a first gate insulating film covering the gate electrode, a plurality of graphene channel layers on the substrate, a second gate insulating film between the plurality of graphene channel layers, and a source electrode and a drain electrode connected to both edges of each of the plurality of graphene channel layers. | 07-05-2012 |
20120175595 | Graphene Electronic Device And Method Of Fabricating The Same - A graphene electronic device includes a graphene channel layer on a substrate, a source electrode on an end portion of the graphene channel layer and a drain electrode on another end portion of the graphene channel layer, a gate oxide on the graphene channel layer and between the source electrode and the drain electrode, and a gate electrode on the gate oxide. The gate oxide has substantially the same shape as the graphene channel layer between the source electrode and the drain electrode. | 07-12-2012 |
20120256167 | GRAPHENE ELECTRONIC DEVICE AND METHOD OF FABRICATING THE SAME - The graphene electronic device may include a gate oxide on a conductive substrate, the conductive substrate configured to function as a gate electrode, a pair of first metals on the gate oxide, the pair of the first metals separate from each other, a graphene channel layer extending between the first metals and on the first metals, and a source electrode and a drain electrode on both edges of the graphene channel layer. | 10-11-2012 |
20120313079 | GRAPHENE ELECTRONIC DEVICES HAVING MULTI-LAYERED GATE INSULATING LAYER - A graphene electronic device includes a multi-layered gate insulating layer between a graphene channel layer and a gate electrode. The multi-layered gate insulating layer includes an organic insulating layer and an inorganic insulating layer on the organic insulating layer. | 12-13-2012 |
20130203222 | GRAPHENE ELECTRONIC DEVICE AND METHOD OF FABRICATING THE SAME - A graphene electronic device may include a silicon substrate, connecting lines on the silicon substrate, a first electrode and a second electrode on the silicon substrate, and an interlayer dielectric on the silicon substrate. The interlayer dielectric may be configured to cover the connecting lines and the first and second electrodes and the interlayer dielectric may be further configured to expose at least a portion of the first and second electrodes. The graphene electronic device may further include an insulating layer on the interlayer dielectric and a graphene layer on the insulating layer, the graphene layer having a first end and a second end. The first end of the graphene layer may be connected to the first electrode and the second end of the graphene layer may be connected to the second electrode. | 08-08-2013 |
20130252395 | RESISTIVE RANDOM ACCESS MEMORY AND METHOD OF MANUFACTURING THE SAME - Example embodiments relate to a resistive random access memory (RRAM) and a method of manufacturing the RRAM. A RRAM according to example embodiments may include a lower electrode, which may be formed on a lower structure (e.g., substrate). A resistive layer may be formed on the lower electrode, wherein the resistive layer may include a transition metal dopant. An upper electrode may be formed on the resistive layer. Accordingly, the transition metal dopant may form a filament in the resistive layer that operates as a current path. | 09-26-2013 |
20130313512 | GRAPHENE ELECTRONIC DEVICE AND METHOD OF FABRICATING THE SAME - A graphene electronic device and a method of fabricating the graphene electronic device are provided. The graphene electronic device may include a graphene channel layer formed on a hydrophobic polymer layer, and a passivation layer formed on the graphene channel layer. The hydrophobic polymer layer may prevent or reduce adsorption of impurities to transferred graphene, and a passivation layer may also prevent or reduce adsorption of impurities to a heat-treated graphene channel layer. | 11-28-2013 |
20140021445 | GRAPHENE ELECTRONIC DEVICE AND METHOD OF FABRICATING THE SAME - The graphene electronic device may include a gate oxide on a conductive substrate, the conductive substrate configured to function as a gate electrode, a pair of first metals on the gate oxide, the pair of the first metals separate from each other, a graphene channel layer extending between the first metals and on the first metals, and a source electrode and a drain electrode on both edges of the graphene channel layer. | 01-23-2014 |
20140131626 | GRAPHENE SUBSTITUTED WITH BORON AND NITROGEN, METHOD OF FABRICATING THE SAME, AND TRANSISTOR HAVING THE SAME - Graphene, a method of fabricating the same, and a transistor having the graphene are provided, the graphene includes a structure of carbon (C) atoms partially substituted with boron (B) atoms and nitrogen (N) atoms. The graphene has a band gap. The graphene substituted with boron and nitrogen may be used as a channel of a field effect transistor. The graphene may be formed by performing chemical vapor deposition (CVD) method using borazine or ammonia borane as a boron nitride (B-N) precursor. | 05-15-2014 |
20150056758 | GRAPHENE ELECTRONIC DEVICE AND METHOD OF FABRICATING THE SAME - The graphene electronic device may include a gate oxide on a conductive substrate, the conductive substrate configured to function as a gate electrode, a pair of first metals on the gate oxide, the pair of the first metals separate from each other, a graphene channel layer extending between the first metals and on the first metals, and a source electrode and a drain electrode on both edges of the graphene channel layer. | 02-26-2015 |