Patent application number | Description | Published |
20080296672 | TRANSISTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A transistor device includes a recess in a surface of semiconductor substrate, a gate insulation layer formed over an inner side of the recess, a gate conductor filling the recess in which the gate insulation layer is formed, and source and drain regions located over the substrate adjacent the recess. Among the advantages: the gate structure lowers overall gate resistance and reduces the short channel effect. | 12-04-2008 |
20100090279 | METHOD FOR FABRICATING A TRANSISTOR USING A SOI WAFER - Embodiments relate to a method for fabricating a transistor by using a SOI wafer. A gate insulation layer and a first gate conductive layer on a silicon-on-insulator substrate of a substrate to form a first gate conductive pattern, a gate insulation layer pattern, and a silicon layer pattern. A device isolation insulation layer exposing the top surface of the first gate conductive layer pattern may be formed. A second gate conductive layer may be formed. A mask pattern may be formed. Then, a gate may be formed by etching. After forming a source and drain conductive layer on the silicon layer pattern, the mask pattern may be removed. A salicide layer may be selectively contacting the gate and the source and drain conductive layer may be formed. | 04-15-2010 |
20100179348 | DIIMMONIUM SALT AND NEAR INFRARED RAY ABSORPTION FILM CONTAINING THE SAME - Disclosed are a diimmonium salt and a near infrared ray absorption film including the same which is used for blocking the near infrared ray. The diimmonium salt for a near infrared ray absorption film is represented by Formula 1 of the specification, wherein, n is an integer of 1 or 2, R | 07-15-2010 |
20100200926 | Memory Cells Having Contact Structures and Related Intermediate Structures - Intermediate structures are provided that are formed during the manufacture of a memory device. These structures include first and second spaced apart gate patterns on a semiconductor substrate. A source/drain region is provided in the semiconductor substrate between the first and second gate patterns. An etch stop layer is provided on first and second sidewalls of the first gate pattern. The first and second sidewalls face each other to define a gap region between the etch stop layer on the first sidewall and the etch stop layer on the second sidewall. A dielectric layer is provided in the gap region. Finally, a preliminary contact hole is provided in the dielectric layer. | 08-12-2010 |
20110269952 | COPPER PHTHALOCYANINE COMPOUNDS AND NEAR-INFRARED ABSORPTION FILTER USING THE SAME - A novel copper phthalocyanine compound with low absorptivity in the visible light region and high absorptivity in the near-infrared light region, and a near-infrared absorption filter using the same are disclosed. The near-infrared absorption copper phthalocyanine compound is represented by Formula 1 of Claim | 11-03-2011 |
20110275847 | VANADIUM PHTHALOCYANINE COMPOUNDS AND NEAR-INFRARED ABSORPTION FILTER USING THE SAME - A novel vanadium phthalocyanine compound with low absorptivity in the visible light region and high absorptivity in the near-infrared light region, and a near-infrared absorption filter using the same are disclosed. The near-infrared absorption vanadium phthalocyanine compound is represented by Formula 1 of claim | 11-10-2011 |
20120271044 | VANADYL PHTHALOCYANINE COMPOUNDS AND NEAR-INFRARED ABSORPTION FILTERS USING SAME - Novel vanadyl phthalocyanine compound having low light absorptivity in visible wavelength region and having high absorptivity in a long wavelength region (specifically, wavelength of 950 to 1100 nm) of near-infrared wavelength region and a near-infrared absorption filter using the same are disclosed. The vanadyl phthalocyanine compound is represented by Formula 1 in claim | 10-25-2012 |
Patent application number | Description | Published |
20080272459 | Semiconductor Device and Manufacturing Method of Semiconductor Device - A semiconductor device and method of manufacturing the same are provided. According to certain embodiments, a device layer structure can be formed above a metal wiring line by using a stepped portion of the wiring line as an alignment key. The stepped portion can be provided by a height difference between a first insulating layer and the metal wiring line formed in a trench of the first insulating layer. In one embodiment, the stepped portion can be formed by removing a thickness from a top surface of the first insulating layer after forming the metal wiring line in the trench. | 11-06-2008 |
20090059466 | METAL-INSULATOR-METAL CAPACITOR AND METHOD FOR MANUFACTURING THE SAME - A metal-insulator-metal (MIM) capacitor capable of achieving an enhancement in the reliability of a semiconductor device, and a method for manufacturing the same are disclosed. The disclosed MIM capacitor includes a metal-insulator-metal (MIM) capacitor which may include a first insulating film, a first metal layer formed over the first insulating film and a first capacitor insulating film formed over the first metal layer. A second metal layer may be formed over a portion of the first capacitor insulating film and second capacitor insulating film may be formed over the second metal layer. A third metal layer may be formed over a portion of the second capacitor insulating film and a nitride film may be formed over the third metal layer. A multilayer insulating film may be formed over the entire upper surface of the resulting structure. First and second metal lines may be formed in contact holes extending through the first capacitor insulating film, the second capacitor insulating film, and the nitride film after extending through the multilayer insulating film. | 03-05-2009 |
20090155975 | METHOD FOR MANUFACTURING METAL-INSULATOR-METAL CAPACITOR OF SEMICONDUCTOR DEVICE - A method for manufacturing a metal-insulator-metal capacitor of a semiconductor device method for manufacturing a semiconductor device. In one example embodiment, a method for manufacturing a semiconductor device includes various steps. First, a logic metal and a capacitor lower metal is formed on a first insulating film that is formed on a semiconductor substrate. Next, a portion of the capacitor lower metal is selectively etched to a predetermined depth. Then, a second insulating film is formed over an entire upper surface of the logic metal, the first insulating film, and the capacitor lower metal. Next, a capacitor upper metal is formed on the second insulating film in a region corresponding to the etched portion of the capacitor lower metal. Finally, a third insulating film is formed on an entire upper surface of the second insulating film and the capacitor upper metal. | 06-18-2009 |
20090275184 | Fabricating Method of Semiconductor Device - Disclosed is a method of fabricating a semiconductor device. The method of fabricating a semiconductor device includes removing a part of an isolation layer from a semiconductor substrate such that an active area of the semiconductor substrate protrudes from the isolation layer; rounding edge portions of the active area; forming a gate insulating layer and a gate electrode on the active area; and forming source and drain impurity areas in the active area adjacent to sides of the gate electrode. | 11-05-2009 |
20100129983 | Method of Fabricating Semiconductor Device - Methods of fabricating a semiconductor device that is capable of reducing and/or maintaining a proper divot depth at the corners of a device isolation layer. The method includes forming a pad oxide layer and a pad nitride layer sequentially on a semiconductor substrate, forming a trench by selectively etching the pad oxide layer, the pad nitride layer and the semiconductor substrate, depositing an insulating layer in the trench, selectively etching the pad nitride layer and the insulating layer by performing a first etching process, removing the pad nitride layer by performing a second etching process, and forming a gate polysilicon layer over the entire surface of the semiconductor substrate. | 05-27-2010 |
20100167531 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device and a method for manufacturing the same includes sequentially laminating a first dielectric film, an etch-blocking film and a second dielectric film on and/or over a semiconductor substrate, forming a photosensitive film mask to open a trench region in the second dielectric film, etching the second dielectric film using the photosensitive film mask as an etching mask until the etch-blocking film is exposed to form the trench, and then forming a copper metal layer in the trench at uniform thickness. | 07-01-2010 |
Patent application number | Description | Published |
20100141378 | APPARATUS AND METHOD FOR IDENTIFYING STRUCTURE - A transmitter of an apparatus position in a moving body transmits a first move command signal for moving a radio frequency identification tag to a location within an identification distance to a receiver positioned within a communication distance. A radio frequency identification reader of the moving body transmits an information request signal to the radio frequency identification tag that moves from a first location to a second location corresponding to a location within an identification distance in accordance with a first move command signal and receives a response signal corresponding to the information request signal from the radio frequency identification tag. | 06-10-2010 |
20100142750 | DEVICE AND METHOD FOR ARRANGING BLOCK OF VESSEL - A vessel block arranging device extracts image information on a vessel block loaded on a transporter, and determines whether to arrange the vessel block in an area in which the vessel block will be arranged by using location information of the arranged vessel block in the area and extracted image information, thereby reducing errors caused by determining the vessel block arrangement. | 06-10-2010 |
20110148584 | METHOD OF PLACING RFID TAG FOR UNDERGROUND USE UNDER GROUND SURFACE - A method includes: placing a Radio Frequency Identification (RFID) tag for underground use under a ground surface, wherein a ground plate which has a diameter greater than that of the RFID tag or a tag antenna and on a top of which the RFID tag is mounted is placed underground such that the RFID tag protrudes above the ground surface or a bottom of the RFID tag is aligned with the ground surface. | 06-23-2011 |
20130226450 | APPARATUS AND METHOD FOR SUPPORTING SAFE NAVIGATION OF SHIPS - Disclosed is an apparatus and method for supporting the safe navigation of ships based on mobile terminals which can prevent accidents at sea including marine collisions between small ships sailing near the coastline. The method for supporting the safe navigation of a ship in conjunction with a mobile terminal carried by a crew member of a ship includes collecting information about the navigation of the ship by a safe ship navigation supporting apparatus positioned in the ship, collecting information about surrounding ship through group communication with a server corresponding to the surrounding ship, converting a chart transmitted from a ground server into a format compatible with the mobile terminal, and applying safe navigation information created on the basis of the information about the navigation and the information about the ship to the converted chart, and providing the crew member with the safe navigation information through the mobile terminal. | 08-29-2013 |
20130335815 | POLARIZATION SEPARTION ELEMENT - The present application relates to a polarization separation element, a method for manufacturing a polarization separation element, a device for irradiating light, a method for irradiating light, and a method for manufacturing a photo-alignment layer. An ultraviolet ray polarization separation element, according to the present invention, has superior resistance to ultraviolet rays and heat, and involves a simple manufacturing process due to less pitch dependency of polarizing characteristics. In addition, the polarization separation element according to the present application can achieve a superior degree of polarization and extinction ratio even within a short wavelength field. | 12-19-2013 |
20140021367 | POLARIZED LIGHT SPLITTING ELEMENT - Provided are a polarized light splitting element, a method of manufacturing the same, a light radiating device, a method of radiating light, and a method of manufacturing an ordered photo-alignment film. The polarized light splitting element has excellent durability with respect to UV rays and heat, and low pitch dependence of polarization characteristics, so that it is easily manufactured. In addition, the polarized light splitting element may realize a high polarization degree and extinction ratio even in a short wavelength region. | 01-23-2014 |