Samata
Bumpei Samata, Kyoto-Shi JP
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20140193836 | NOVEL MARKERS FOR DOPAMINERGIC NEURON PROGENITOR CELLS - The present invention provides a method for selecting dopaminergic neuron progenitor cells, which comprises detecting any one or more of markers selected from the group consisting of CD15 (SSEA-1), CD24, CD46, CD47, CD49b, CD57, CD58, CD59, CD81, CD90, CD98, CD147, CD184, Disalogangliosid GD2, SSEA-4, CD49f, SERINC4, CCR9, PHEX, TMPRSS11E, HTR1E, SLC25A2, Ctxn3, Cc17, Chrnb4, Chrna3, Kcnv2, Grm2, Syt2, Lim2, Mboat1, St3ga16, Slc39a12, Tacr1, Lrtm1, Dscam and CD201. | 07-10-2014 |
Hideki Samata, Kanagawa-Ken JP
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20110026147 | Linear motion device and lens drive device - A linear motion device includes a guide shaft. A to-be-moved member is supported on the guide shaft, and is linearly movable along the guide shaft. A lead screw extends parallel to the guide shaft. A clamper meshes with the lead screw. The clamper moves as the lead screw rotates. An intermediate member is provided between the to-be-moved member and the clamper. An urging member operates for urging the to-be-moved member toward the clamper and enabling the intermediate member to be seated between the to-be-moved member and the clamper in a manner such that an axis of the intermediate member is nonparallel to the guide shaft. | 02-03-2011 |
Mitsuhiko Samata, Kyoto JP
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20150028264 | POSITIVE ELECTRODE FOR BATTERY, AND BATTERY - A positive electrode for a battery includes a positive active material, a conductive agent, and a copolymer. The copolymer includes a constituent unit (a) represented by the following general formula (1) and a constituent unit (b) represented by the following general formula (2): | 01-29-2015 |
Mitsunori Samata, Tokyo JP
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20090267664 | PLL CIRCUIT - In an ADPLL composed of a digital circuit, a technique improving phase difference detection in a vicinity of a phase difference of 0 (zero) is provided. A feedback loop comprises a PFD comparing phases and frequencies of a reference signal and a feedback signal, a TDC converting an output of the PFD into a digital value, a DLF removing a high frequency noise component from an output of the TDC, a DCO controlled based on an output of the DLF and a DIV frequency-dividing an output the DCO and outputting the feedback signal. An offset value is added at any portion of the feedback loop, a phase of the feedback signal is controlled and a value other than 0 is inputted to the TDC even when the ADPLL is locked. | 10-29-2009 |
20100097150 | PLL CIRCUIT - A technique for suppressing quantization noise generated due to digitizing an analog circuit in a PLL circuit is provided. The PLL circuit comprises: a digital phase frequency detector which detects (compares) phases and frequencies of a reference signal and a frequency-divided signal and converts the same to a digital value; a digital loop filter which eliminates high-frequency noise components from an output of the digital phase frequency comparator; a digital-analog converter which converts a digital value of an output of the digital loop filter to an analog value; an analog filter which eliminates a high-frequency noise component from an output of the digital-analog converter; a voltage controlled oscillator whose frequency is controlled based on an output of the analog filter; and a frequency divider which divides the frequency of the voltage controlled oscillator and outputs the frequency-divided signal. | 04-22-2010 |
20110064150 | PLL CIRCUIT WITH IMPROVED PHASE DIFFERENCE DETECTION - In an ADPLL composed of a digital circuit, a technique improving phase difference detection in a vicinity of a phase difference of 0 (zero) is provided. A feedback loop comprises a PFD comparing phases and frequencies of a reference signal and a feedback signal, a TDC converting an output of the PFD into a digital value, a DLF removing a high frequency noise component from an output of the TDC, a DCO controlled based on an output of the DLF and a DIV frequency-dividing an output the DCO and outputting the feedback signal. An offset value is added at any portion of the feedback loop, a phase of the feedback signal is controlled and a value other than 0 is inputted to the TDC even when the ADPLL is locked. | 03-17-2011 |
Shuichi Samata, Tokyo JP
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20110086494 | METHOD OF REMOVING HEAVY METAL IN SEMICONDUCTOR SUBSTRATE - To provide a method of removing a heavy metal contained in a thinned semiconductor substrate. | 04-14-2011 |
Takahiro Samata, Gunma JP
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20090058591 | WIRE WOUND ELECTRONIC PART - A wire wound electronic part includes a ferrite core comprising ferrite having a columnar wire wound core and flanges formed at both ends thereof, a coil conductor wound around the wire wound core of the ferrite core, and at least a pair of terminal electrodes having a Cu conduction layer disposed to the outer surface of the flange, in which both ends of the coil conductor wound around the wire wound core are conductively connected to the terminal electrodes. The terminal electrode is formed by coating an electrode paste containing a Cu powder and a glass frit to the outer surface of the ferrite core, and then applying a heat treatment to the ferrite core. There is a reaction layer of a portion of the ferrite core and the glass frit at a boundary between the ferrite core and the Cu conduction layer. The terminal electrodes has the peel strength identical with that of an existent Ag terminal electrode, without forming a plate layer. | 03-05-2009 |
Takahiro Samata, Agatsuma-Gun JP
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20140009252 | INDUCTOR - An inductor includes soft magnetic alloy powder-containing resin that contains amorphous soft magnetic alloy powder, which resin is used as a sealing material that seals a coil wound around a winding core of the core. This soft magnetic alloy powder-containing resin contains two groups of large and small particles having a first peak and second peak in their particle size distribution, where the particle size corresponding to the second peak is equal to or smaller than one-half the particle size corresponding to the first peak, and the magnitude ratio (abundance ratio) of the second peak and first peak is 0.2 or more but 0.6 or less. The inductor demonstrates improved DC superimposition characteristics and does not cause sealing irregularities. | 01-09-2014 |