Patent application number | Description | Published |
20080239930 | SPIN FET, MAGNETORESISTIVE ELEMENT AND SPIN MEMORY - A spin FET includes a first ferromagnetic film disposed on a first source/drain area, a direction of magnetization thereof being fixed in an upward direction or a downward direction perpendicular to a film surface, a second ferromagnetic film disposed on a second source/drain area, a direction of magnetization thereof being changed in the upward direction or the downward direction, an anti-ferromagnetic ferroelectric film disposed on the second ferromagnetic film, and a tunnel barrier film disposed at least between the first source/drain area and the first ferromagnetic film or between the second source/drain and the second ferromagnetic film. Resistance of the anti-ferromagnetic ferroelectric film is larger than ON resistance when the first and second source/drain areas conduct electricity through the channel area. | 10-02-2008 |
20080247223 | SPIN-INJECTION MAGNETIC RANDOM ACCESS MEMORY - A spin-injection magnetic random access memory of an aspect of the present invention includes a magnetoresistive element, a unit which writes data into the magnetoresistive element by use of spin-polarized electrons generated by a spin-injection current and which applies, to the magnetoresistive element, a magnetic field of a direction of a hard magnetization of the magnetoresistive element during the writing. | 10-09-2008 |
20090050948 | SPIN MOS FIELD EFFECT TRANSISTOR AND TUNNELING MAGNETORESISTIVE EFFECT ELEMENT USING STACK HAVING HEUSLER ALLOY - A spin MOS field effect transistor includes a source electrode and a drain electrode each having a structure obtained by stacking an impurity diffusion layer, a (001)-oriented MgO layer and a Heusler alloy. The impurity diffusion layer is formed in a surface region of a semiconductor layer. The (001)-oriented MgO layer is formed on the impurity diffusion layer. The Heusler alloy is formed on the MgO layer. | 02-26-2009 |
20090057654 | SPIN FET AND MAGNETORESISTIVE ELEMENT - A spin FET of an aspect of the present invention includes source/drain regions, a channel region between the source/drain regions, and a gate electrode above the channel region. Each of the source/drain regions includes a stack structure which is comprised of a low work function material and a ferromagnet. The low work function material is a non-oxide which is comprised of one of Mg, K, Ca and Sc, or an alloy which includes the non-oxide of 50 at % or more. | 03-05-2009 |
20090059659 | SPIN TRANSISTOR AND MAGNETIC MEMORY - A spin transistor includes a first ferromagnetic layer provided on a substrate and having an invariable magnetization direction, a second ferromagnetic layer provided on the substrate apart from the first ferromagnetic layer in a first direction, and having a variable magnetization direction, a plurality of projecting semiconductor layers provided on the substrate to extend in the first direction, and sandwiched between the first ferromagnetic layer and the second ferromagnetic layer, a plurality of channel regions respectively provided in the projecting semiconductor layers, and a gate electrode provided on the channel regions. | 03-05-2009 |
20090180215 | TUNNELING MAGNETORESISTIVE EFFECT ELEMENT AND SPIN MOS FIELD-EFFECT TRANSISTOR - A magnetoresistive effect element includes a first ferromagnetic layer, Cr layer, Heusler alloy layer, barrier layer, and second ferromagnetic layer. The first ferromagnetic layer has the body-centered cubic lattice structure. The Cr layer is formed on the first ferromagnetic layer and has the body-centered cubic lattice structure. The Heusler alloy layer is formed on the Cr layer. The barrier layer is formed on the Heusler alloy layer. The second ferromagnetic layer is formed on the barrier layer. | 07-16-2009 |
20090243653 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit includes an n-channel spin FET including one of a magnetic tunnel junction and a magneto-semiconductor junction, the n-channel spin FET including a gate terminal to receive an input signal, a source terminal to receive a first power supply potential, and a drain terminal connected to an output terminal, a p-channel FET including a gate terminal to receive a clock signal, a source terminal to receive a second power supply potential, and a drain terminal connected to the output terminal, a subsequent circuit connected to the output terminal, and a control circuit which turns on the p-channel FET to start charging the output terminal, then turns off the p-channel FET to end the charging, and supplies the input signal to the gate terminal of the n-channel spin FET. | 10-01-2009 |
20090244960 | MAGNETORESISTIVE EFFECT ELEMENT AND MAGNETIC MEMORY - It is made possible to provide a highly reliable magnetoresistive effect element and a magnetic memory that operate with low power consumption and current writing and without element destruction. The magnetoresistive effect element includes a first magnetization pinned layer comprising at least one magnetic layer and in which a magnetization direction is pinned, a magnetization free layer in which a magnetization direction is changeable, a tunnel barrier layer provided between the first magnetization pinned layer and the magnetization free layer, a non-magnetic metal layer provided on a first region in an opposite surface of the magnetization free layer from the tunnel barrier layer, a dielectric layer provided on a second region other than the first region in the opposite surface of the magnetization free layer from the tunnel barrier layer; and a second magnetization pinned layer provided to cover opposite surfaces of the non-magnetic metal layer and the dielectric layer from the magnetization free layer. | 10-01-2009 |
20100019798 | SPIN MOSFET AND RECONFIGURABLE LOGIC CIRCUIT USING THE SPIN MOSFET - It is made possible to provide a spin MOSFET that can minimize the increase in production costs and can perform both spin injection writing and reading. A spin MOSFET includes: a substrate that has a semiconductor region of a first conductivity type; first and second ferromagnetic stacked films that are formed at a distance from each other on the semiconductor region, and each have the same stacked structure comprising a first ferromagnetic layer, a nonmagnetic layer, and a second ferromagnetic layer stacked in this order, the second ferromagnetic stacked film having a film-plane area different from that of the first ferromagnetic stacked film; a gate insulating film that is formed on a portion of the semiconductor region, the portion being located between the first ferromagnetic stacked film and the second ferromagnetic stacked film; and a gate that is formed on the gate insulating film. | 01-28-2010 |
20100072528 | SPIN TRANSISTOR, INTEGRATED CIRCUIT, AND MAGNETIC MEMORY - A spin transistor includes a first ferromagnetic layer, a second ferromagnetic layer, a semiconductor layer between the first and second ferromagnetic layers, and a gate electrode on or above a surface of the semiconductor layer, the surface being between the first and second ferromagnetic layers. The first ferromagnetic layer comprises a ferromagnet which has a first minority spin band located at a high energy side and a second minority spin band located at a low energy side, and has a Fermi level in an area of the high energy side higher than a middle of a gap between the first and second minority spin bands. | 03-25-2010 |
20100072529 | STACK HAVING HEUSLER ALLOY, MAGNETORESISTIVE ELEMENT AND SPIN TRANSISTOR USING THE STACK, AND METHOD OF MANUFACTURING THE SAME - A stack includes a crystalline MgO layer, crystalline Heusler alloy layer, and amorphous Heusler alloy layer. The crystalline Heusler alloy layer is provided on the MgO layer. The amorphous Heusler alloy layer is provided on the crystalline Heusler alloy layer. | 03-25-2010 |
20100091556 | MAGNETO-RESISTANCE EFFECT ELEMENT AND MAGNETIC MEMORY - It is possible to reduce a current required for spin injection writing. A magneto-resistance effect element includes: a first magnetization pinned layer; a magnetization free layer; a tunnel barrier layer; a second magnetization pinned layer whose direction of magnetization is pinned to be substantially anti-parallel to the direction of magnetization of the first magnetization pinned layer, and; a non-magnetic layer. When the second magnetization pinned layer is made of ferromagnetic material including Co, material for the non-magnetic layer is metal including at least one element selected from the group consisting of Zr, Hf, Rh, Ag, and Au; when the second magnetization pinned layer is made of ferromagnetic material including Fe, material for the non-magnetic layer is metal including at least one element selected from the group consisting of Rh, Pt, Ir, Al, Ag, and Au; and when the second magnetization pinned layer is made of ferromagnetic material including Ni, material for the non-magnetic layer is metal including at least one element selected from the group consisting of Zr, Hf, Au, and Ag. | 04-15-2010 |
20100187585 | Spin MOS field effect transistor and tunneling magnetoresistive effect element using stack having Heusler alloy - A spin MOS field effect transistor includes a source electrode and a drain electrode each having a structure obtained by stacking an impurity diffusion layer, a (001)-oriented MgO layer and a Heusler alloy. The impurity diffusion layer is formed in a surface region of a semiconductor layer. The (001)-oriented MgO layer is formed on the impurity diffusion layer. The Heusler alloy is formed on the MgO layer. | 07-29-2010 |
20100200899 | SPIN TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - A spin transistor includes a source electrode, a drain electrode, and a gate electrode on a semiconductor substrate. At least one of the source electrode and the drain electrode includes a semiconductor region and a magnetic layer. The semiconductor region is formed in the semiconductor substrate. The magnetic layer is formed on the semiconductor region, and contains a crystalline Heusler alloy containing at least one of cobalt (Co) and iron (Fe). The semiconductor region and the magnetic layer contain the same impurity element. | 08-12-2010 |
20100244897 | SPIN MOSFET AND RECONFIGURABLE LOGIC CIRCUIT - A spin MOSFET includes: a first ferromagnetic layer provided on an upper face of a semiconductor substrate, and having a fixed magnetization direction perpendicular to a film plane; a semiconductor layer provided on an upper face of the first ferromagnetic layer, including a lower face opposed to the upper face of the first ferromagnetic layer, an upper face opposed to the lower face, and side faces different from the lower face and the upper face; a second ferromagnetic layer provided on the upper face of the semiconductor layer, and having a variable magnetization direction perpendicular to a film plane; a first tunnel barrier provided on an upper face of the second ferromagnetic layer; a third ferromagnetic layer provided on an upper face of the first tunnel barrier; a gate insulating film provided on the side faces of the semiconductor layer; and a gate electrode provided on the side faces of the semiconductor layer with the gate insulating film being interposed therebetween. | 09-30-2010 |
20110108898 | SPIN MEMORY AND SPIN FET - A spin memory includes a magneto-resistance element having a first ferromagnetic layer in which a magnetization direction is pinned, a second ferromagnetic layer in which a magnetization direction changes, and a first nonmagnetic layer between the first and second ferromagnetic layers, a lower electrode and an upper electrode extending in a direction between 45 degrees and 90 degrees relative to an axis of hard magnetization of the second ferromagnetic layer, and sandwiching the magneto-resistance element at one end in a longitudinal direction, a switching element connected to another end in a longitudinal direction of the lower electrode, and a bit line connected to another end in a longitudinal direction of the upper electrode, wherein writing is carried out by supplying spin-polarized electrons to the second ferromagnetic layer and applying a magnetic field from the lower electrode and the upper electrode to the second ferromagnetic layer. | 05-12-2011 |
20110316104 | MAGNETO-RESISTANCE EFFECT ELEMENT AND MAGNETIC MEMORY - It is possible to reduce a current required for spin injection writing. A magneto-resistance effect element includes: a first magnetization pinned layer; a magnetization free layer; a tunnel barrier layer; a second magnetization pinned layer whose direction of magnetization is pinned to be substantially anti-parallel to the direction of magnetization of the first magnetization pinned layer, and; a non-magnetic layer. When the second magnetization pinned layer is made of ferromagnetic material including Co, material for the non-magnetic layer is metal including at least one element selected from the group consisting of Zr, Hf, Rh, Ag, and Au; when the second magnetization pinned layer is made of ferromagnetic material including Fe, material for the non-magnetic layer is metal including at least one element selected from the group consisting of Rh, Pt, Ir, Al, Ag, and Au; and when the second magnetization pinned layer is made of ferromagnetic material including Ni, material for the non-magnetic layer is metal including at least one element selected from the group consisting of Zr, Hf, Au, and Ag. | 12-29-2011 |
20120019283 | SPIN MOSFET AND RECONFIGURABLE LOGIC CIRCUIT - A spin MOSFET includes: a first ferromagnetic layer provided on a semiconductor substrate, and having a fixed magnetization direction perpendicular to a film plane; a semiconductor layer provided on the first ferromagnetic layer, including a lower face opposed to the upper face of the first ferromagnetic layer, an upper face opposed to the lower face, and side faces different from the lower and upper faces; a second ferromagnetic layer provided on the upper face of the semiconductor layer, and having a variable magnetization direction perpendicular to a film plane; a first tunnel barrier provided on the second ferromagnetic layer; a third ferromagnetic layer provided on the first tunnel barrier; a gate insulating film provided on the side faces of the semiconductor layer; and a gate electrode provided on the side faces of the semiconductor layer with the gate insulating film being interposed therebetween. | 01-26-2012 |
20120168838 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device according to an embodiment includes: a semiconductor layer; source and drain regions in the semiconductor layer; a magnetic metal semiconductor compound film on each of the source and drain regions, the magnetic metal semiconductor compound film including the same semiconductor as a semiconductor of the semiconductor layer and a magnetic metal; a gate insulating film on the semiconductor layer between the source region and the drain region; a gate electrode on the gate insulating film; a gate sidewall formed at a side portion of the gate electrode, the gate sidewall being made of an insulating material; a film stack formed on the magnetic metal semiconductor compound film on each of the source and drain regions, the film stack including a magnetic layer; and an oxide layer formed on the gate sidewall, the oxide layer containing the same element as an element in the film stack. | 07-05-2012 |
20120223762 | PASS TRANSISTOR CIRCUIT WITH MEMORY FUNCTION, AND SWITCHING BOX CIRCUIT INCLUDING THE PASS TRANSISTOR CIRCUIT - A pass transistor circuit according to an embodiment includes: a first input/output terminal connected to a first signal line; a second input/output terminal connected to a second signal line; a first device having a first terminal connected to a first power supply and a second terminal; a second device having a third terminal connected to the second terminal and a fourth terminal connected to a second power supply; a first transistor having one of source/drain connected to the second terminal, a gate receiving a first control signal; and a second transistor having a gate connected to the other one of source/drain of the first transistor, one of source/drain connected to the first input/output terminal, and the other one of source/drain connected to the second input/output terminal. One of the first and second devices is a nonvolatile memory device, the other one of the first and second devices is a MOSFET. | 09-06-2012 |
20120273856 | TUNNELING MAGNETORESISTIVE EFFECT ELEMENT AND SPIN MOS FIELD-EFFECT - A magnetoresistive effect element includes a first ferromagnetic layer, Cr layer, Heusler alloy layer, barrier layer, and second ferromagnetic layer. The first ferromagnetic layer has the body-centered cubic lattice structure. The Cr layer is formed on the first ferromagnetic layer and has the body-centered cubic lattice structure. The Heusler alloy layer is formed on the Cr layer. The barrier layer is formed on the Heusler alloy layer. The second ferromagnetic layer is formed on the barrier layer. | 11-01-2012 |
20140097474 | SPIN MOSFET AND RECONFIGURABLE LOGIC CIRCUIT - A spin MOSFET includes a first ferromagnetic layer having a fixed magnetization direction, a first tunnel barrier, a second ferromagnetic layer having a variable magnetization direction, and a nonmagnetic semiconductor layer provided in that order on a substrate. The nonmagnetic semiconductor layer has lower and upper faces and a side faces serving as a channel. A third ferromagnetic layer having a fixed magnetization direction is provided on the upper face of the nonmagnetic semiconductor layer, wherein the magnetization direction of each of the first to third ferromagnetic layers is in parallel or antiparallel to a direction from the third ferromagnetic layer to the first ferromagnetic layer. A nonmagnetic layer is provided on the third ferromagnetic layer, and a gate insulating film and gate electrode are provided in that order on the side face of the nonmagnetic semiconductor layer. | 04-10-2014 |
20140291744 | SPIN FET AND MAGNETORESISTIVE ELEMENT - A spin FET of an aspect of the present invention includes source/drain regions, a channel region between the source/drain regions, and a gate electrode above the channel region. Each of the source/drain regions includes a stack structure which is comprised of a low work function material and a ferromagnet. The low work function material is a non-oxide which is comprised of one of Mg, K, Ca and Sc, or an alloy which includes the non-oxide of 50 at % or more. | 10-02-2014 |