Patent application number | Description | Published |
20080251697 | IMAGE SENSOR AND METHOD OF FABRICATION - Disclosed is an image sensor and method of fabricating the same. The image sensor includes a photoelectric transformation region formed in a semiconductor substrate, and pluralities of interlayer dielectric films formed over the photoelectric transformation regions. The interlayer dielectric films contain multilevel interconnection layers. A color filter layer is disposed in a well region formed in the interlayer dielectric films over the photoelectric transformation region. A passivation layer is interposed between the color filter layer and the interlayer dielectric films. | 10-16-2008 |
20090045321 | Image sensor, method of manufacturing the same, and method of operating the same - An image sensor includes a photoelectric conversion section in a semiconductor substrate, the photoelectric conversion section having a capping layer of a first conductivity type and a photodiode of a second conductivity type below the capping layer, the photodiode having an upper surface deeper than about 1 μm, as measured from an upper surface of the semiconductor substrate, a charge detection section receiving charges stored in the photoelectric conversion through a charge transfer section and converting the received charges into respective electrical signals, a voltage application section adapted to apply voltage to the capping layer and to a lower portion of the semiconductor substrate to control a width of a depletion layer on the photodiode, and a signal operation section adapted to generate red, green, and blue, signals according to signals from the charge detection section. | 02-19-2009 |
20090045479 | Image sensor with vertical drain structures - An image sensor includes an array of photo-detectors, a plurality of conductive line regions, and a conductive junction region. The array of photo-detectors is formed in a semiconductor substrate. Each conductive line region is formed under a respective line of photo-detectors along a first direction in the substrate. The conductive junction region is formed between the array of photo-detectors and the plurality of conductive line regions in the substrate. The conductive line regions and the conductive junction region form vertical drain structures for the photo-detectors. | 02-19-2009 |
20090057535 | CMOS image sensor and operating method thereof - A CMOS image sensor may be provided. The CMOS image sensor may include at least one floating diffusion column line, a plurality of pixels, and/or a charge/voltage conversion circuit. The plurality of pixels may be connected to the floating diffusion column line in parallel. The charge/voltage conversion circuit may be connected to one end of the floating diffusion column line, and may detect a potential variation of the floating diffusion column line using a coupling capacitor. | 03-05-2009 |
20090057735 | Image sensor having reduced dark current - An image sensor includes a light receiving device, a field effect transistor, a stress layer pattern, and a surface passivation material. The light receiving device is formed in a first region of a substrate. The field effect transistor is formed in a second region of the substrate. The stress layer pattern is formed over the field effect transistor for creating stress therein to improve transistor performance. The surface passivation material is formed on the first region of the substrate for passivating dangling bonds at the surface of the light receiving device. | 03-05-2009 |
20090057899 | Semiconductor integrated circuit device and method of fabricating the same - A semiconductor integrated circuit device includes a semiconductor substrate including a main chip region and a pad region, a multi-layer pad structure on the pad region of the semiconductor substrate, a redistribution pad through the semiconductor substrate and in contact with a bottom surface of the multi-layer pad structure, the redistribution pad being electrically connected to the multi-layer pad structure, a trench belt through the semiconductor substrate and surrounding the redistribution pad, the trench belt electrically isolating the redistribution pad and a portion of the semiconductor substrate adjacent to the redistribution pad, and a connection terminal on the redistribution pad, the connection terminal electrically connecting the redistribution pad to an external source. | 03-05-2009 |
20090096901 | Image sensor - An image sensor may include a first common column line and/or at least one first pixel. The at least one first pixel may be connected to the first common column line. The at least one first pixel may include a first photoelectron conversion region, a first transfer gate, a first overflow gate, and/or a first overflow drain region. The first transfer gate may be between the first photoelectron conversion region and the first common column line. The first overflow gate may be spaced from the first transfer gate. The first photoelectron conversion region may be between the first overflow gate and the first transfer gate. The first overflow drain region may be on an opposite side of the first photoelectron conversion region with respect to the first transfer gate. The first overflow gate may be between the first overflow drain region and the first photoelectron conversion region. | 04-16-2009 |
20090159944 | IMAGE SENSOR AND METHOD OF MANUFACTURING THE SAME - An image sensor comprises a substrate including a photodiode, and an insulation pattern structure making contact with the photodiode on the substrate. An anti-reflection pattern is formed on the insulation pattern structure and the substrate. The anti-reflection pattern includes a first opening through which the insulation pattern structure is exposed corresponding to the photodiode. A first insulation interlayer structure is formed on the anti-reflection pattern, and the first insulation interlayer structure includes at least one insulation layer and a second opening connected to the first opening. A metal wiring structure is formed in the insulation layer, and a transparent insulation pattern is formed in the first and second openings. A color filter is formed on the transparent insulation pattern, and a micro lens is formed on the color filter. | 06-25-2009 |
20090239327 | CMOS IMAGE SENSOR AND METHOD OF FABRICATING THE SAME - In a CMOS image sensor and method of fabricating the same, the CMOS image sensor is comprised of a pixel array generating image signals and a peripheral circuit processing the image signals. In the method, a substrate is provided having a pixel region and a peripheral circuit region. A photo-receiving element and at least one transistor are formed on the pixel region of the substrate and a transistor is formed on the peripheral circuit region of the substrate. A silicide barrier pattern is formed to cover a region where the photo-receiving element is formed. A silicide layer is formed on a predetermined region of the substrate. An interlevel insulation film is formed on the silicide barrier layer. At least one contact hole penetrating the interlevel insulation film is formed, the at least one contact hole exposing a predetermined region of the silicide layer. This is effective to prevent a problem such as an excessive etching due to disagreement of the etch target films between the pixel array and the peripheral circuit. | 09-24-2009 |
20110260222 | Image Sensor having Reduced Dark Current - An image sensor includes a light receiving device, a field effect transistor, a stress layer pattern, and a surface passivation material. The light receiving device is formed in a first region of a substrate. The field effect transistor is formed in a second region of the substrate. The stress layer pattern is formed over the field effect transistor for creating stress therein to improve transistor performance. The surface passivation material is formed on the first region of the substrate for passivating dangling bonds at the surface of the light receiving device. | 10-27-2011 |
20140103192 | BINARY CMOS IMAGE SENSORS, METHODS OF OPERATING SAME, AND IMAGE PROCESSING SYSTEMS INCLUDING SAME - A binary complementary metal-oxide-semiconductor (CMOS) image sensor includes a pixel array and a readout circuit. The pixel array includes at least one pixel having a plurality of sub-pixels. The readout circuit is configured to quantize a pixel signal output from the pixel using a reference signal. The pixel signal corresponds to sub-pixel signals output from sub-pixels, from among the plurality of sub-pixels, activated in response to incident light. | 04-17-2014 |
20140103401 | IMAGE SENSOR - An image sensor is provided. The image sensor includes a well of a second conductivity type formed on an impurity layer of a first conductivity type, source and drain regions of the first conductivity type, formed in the well to be spaced apart from each other, a first photo diode of the first conductivity type formed in the well to overlap the source and drain regions, a second photo diode of the first conductivity type formed so as not to overlap the source and drain regions and formed to be adjacent to the first photo diode, and a gate electrode formed on the first and second photo diodes. | 04-17-2014 |
20140103413 | CMOS IMAGE SENSORS WITH PHOTOGATE STRUCTURES AND SENSING TRANSISTORS, OPERATION METHODS THEREOF, AND IMAGE PROCESSING SYSTEMS INCLUDING THE SAME - ACMOS image sensor includes a pixel array having a plurality of pixels. Each of the plurality of pixels includes: a photogate structure configured to be controlled based on a first gate voltage; and a sensing transistor including a charge pocket region formed in a substrate region, the sensing transistor being configured to be controlled based on a second gate voltage. Based on the first gate voltage, the photogate structure is configured to integrate charges generated in response to light incident on the substrate region. The sensing transistor is configured to adjust at least one of a threshold voltage of the sensing transistor and a current flow in the sensing transistor according to charges transferred from the photogate structure to the charge pocket region based on a difference between the first gate voltage and the second gate voltage. | 04-17-2014 |
20140104452 | SUB-PIXELS, IMAGE SENSORS HAVING THE SAME AND IMAGE SENSING SYSTEMS - A sub pixel includes a photodetector and a column line output circuit. The photodetector is configured to output an electrical signal based on a detected amount of photons. The column line output circuit is configured to generate an output signal based on the electrical signal. The output signal is one of a current from a current source and a comparison signal indicative of binary output data. | 04-17-2014 |
20140104469 | IMAGE SENSORS, IMAGE PROCESSING SYSTEMS INCLUDING THE SAME, AND METHODS OF OPERATING IMAGE PROCESSING SYSTEM - An image sensor includes a pixel array and a row driver block. The pixel array includes a plurality of subpixel groups, each including a plurality of subpixels. Each of the plurality of subpixels is configured to generate a subpixel signal corresponding to photocharge accumulated in response to a photon. The row driver block is configured to generate a first control signal to control the subpixels included in each of the plurality of subpixel groups to accumulate the photocharge in parallel from a first time point to a second time point. | 04-17-2014 |
20140104473 | IMAGE SENSOR CHIPS - An image sensor chip includes a first wafer and a second wafer. The first wafer includes an image sensor having a plurality of sub-pixels, each of which is configured to detect at least one photon and output a sub-pixel signal according to a result of the detection. The image processor is configured to process sub-pixel signals for each sub-pixel and generate image data. The first wafer and the second wafer are formed in a wafer stack structure. | 04-17-2014 |
20150076649 | STACK TYPE IMAGE SENSORS AND METHODS OF MANUFACTURING THE SAME - An electronic device may include a first semiconductor layer, a first electrode layer on the semiconductor layer, an adhesive insulating layer on the first electrode layer, a second electrode layer on the adhesive insulating layer, a second semiconductor layer. The first electrode layer may include a first plurality of electrodes, the first electrode layer may be between the adhesive insulating layer and the first semiconductor layer, and the adhesive insulating layer may include at least one of SiOCN, SiBN, and/or BN. The second electrode layer may include a second plurality of electrodes, the adhesive insulating layer may be between the first and second electrode layers, and the second electrode layer may be between the adhesive insulating layer and the second semiconductor layer. | 03-19-2015 |