Patent application number | Description | Published |
20090251086 | MOTOR CONTROL UNIT - A motor control unit ( | 10-08-2009 |
20090256161 | POWER CONVERSION APPARATUS - In the case where a chip is made of wide band gap semiconductor, a power conversion apparatus is obtained in which a component having a low heat resistant temperature is prevented from receiving thermal damage by heat generated at the chip. In a configuration including: a chip portion ( | 10-15-2009 |
20100309700 | POWER CONVERTER - An inverter circuit ( | 12-09-2010 |
20110026285 | BIDIRECTIONAL SWITCH CIRCUIT AND POWER CONVERTER INCLUDING THE SAME - A bidirectional switch circuit includes two switching elements connected to conduct a current in both directions. The two switching elements are connected in series to each other. Of the two switching elements, the switching element to which a reverse voltage is applied, a voltage of a source of one of the switching elements being higher than a voltage of a drain of the one, is configured to conduct a current from the source to the drain even when an on-drive signal is not being input to a gate terminal of the one. | 02-03-2011 |
20120182770 | POWER CONVERTER - The power converter includes a diode rectifier which rectifies alternating current power output from an alternating current power supply, a reactor provided between the alternating current power supply and the diode rectifier, an inverter circuit to which power output from the diode rectifier is directly supplied, and a capacitor provided between power supply lines on a primary side of the diode rectifier. | 07-19-2012 |
20120255318 | REFRIGERATION APPARATUS - A refrigeration apparatus includes a refrigerant circuit having a main circuit performing a refrigeration cycle and a branch circuit which branches part of high-pressure liquid refrigerant flowing through the main circuit and leads the part of high-pressure liquid refrigerant from a high-pressure part of the main circuit to part of the main circuit having a pressure lower than that of the high-pressure part. The branch circuit is connected to a cooler configured to cool a power element(s) of a power supply device supplying power to drivers of components of the refrigerant circuit by refrigerant. In the refrigeration apparatus, an adjusting mechanism configured to adjust the state of refrigerant flowing through the branch circuit and adjust the temperature of refrigerant passing through the cooler to a target temperature is provided. | 10-11-2012 |
20120279251 | REFRIGERATION APPARATUS - A refrigeration apparatus includes: a refrigerant circuit to which a compressor is connected, and which performs a refrigerating cycle; an electronic part including a power module; and a cooling member in which a refrigerant of the refrigerant circuit flows, and which contacts the power module so that the power module is cooled by the refrigerant. The cooling member of the refrigeration apparatus is provided with a thermal insulation layer that prevents cold heat of the refrigerant flowing in the cooling member from being transferred to the outside from at least a non-contact surface other than a contact surface of the cooling member with the power module. | 11-08-2012 |
20120293290 | COOLING STRUCTURE FOR MAGNET-EQUIPPED REACTOR - A cooling structure for a magnet-equipped reactor includes: a magnet-equipped reactor having a core around which a coil is wound, and a magnet arranged to contact the core; and a cooling member arranged to contact the magnet of the magnet-equipped reactor to cool the magnet. | 11-22-2012 |
20130300327 | POWER CONVERSION APPARATUS - A DC link is provided, which includes a capacitor connected in parallel to an output of a converter circuit, and outputs a pulsating DC link voltage. An inverter circuit is provided, which converts an output of the DC link to AC by switching, and supplies the AC to a motor connected thereto. A controller is provided, which controls switching of the inverter circuit so that motor currents pulsate in synchronization with pulsation of a power-supply voltage. The controller controls the switching of the inverter circuit in accordance with a load of the motor or an operational state of the motor, and reduces pulsation amplitude of the motor currents. | 11-14-2013 |
20130300334 | POWER CONVERSION APPARATUS - A power conversion apparatus is equipped with switching devices to perform power conversion of input AC power supplied from an AC power supply to output AC power having a predetermined voltage and a predetermined frequency, and to supply the power to a motor connected thereto. The apparatus includes a controller controlling switching of the switching devices, a capacitor smoothing a ripple generated by the switching of the switching devices, a current controller controlling a current flowing to the motor, and a voltage distortion corrector detecting a harmonic component caused by distortion in motor input power, and superimposing compensation values on an output of the current controller in accordance with a value of the harmonic component. | 11-14-2013 |
20140232309 | POWER CONVERTER - In a power converter, vibration and noise of a motor due to pulsation of a direct current link voltage are reduced. An inverter circuit is provided, which is configured to convert a direct current link voltage having a pulsating component to an alternating current to output the alternating current to a permanent magnet synchronous motor. A controller is provided, which is configured to control the inverter circuit by vector control and which, in a control state in which fundamental voltage vectors do not include a zero vector (voltage vector for which a motor terminal voltage is zero), performs such control that the phase of a resultant voltage vector of a d-axis voltage vector and a q-axis voltage vector of the permanent magnet synchronous motor varies depending on pulsation. | 08-21-2014 |
Patent application number | Description | Published |
20080281547 | Test circuit - A test circuit including a TAP controller specified in IEEE (Institute of Electrical and Electronics Engineers) 1149 and a test access port includes a first controller including a selecting circuit and a first TAP controller, the selecting circuit generating an internal TMS signal in accordance with TMS signal and selecting an output destination of the internal TMS signal in accordance with a selection signal, and the first TAP controller changing internal state based on the internal TMS signal, testing corresponding test target block in accordance with instruction code for test, and generating the selection signal in accordance with instruction code for selection, and a second controller including a second TAP controller changing internal state based on the internal TMS signal and testing corresponding test target block in accordance with the instruction code for test. | 11-13-2008 |
20080295050 | Semiconductor integrated circuit and method of designing thereof based on TPI - A method of designing a semiconductor integrated circuit based on the TPI technique, comprising: (A) selecting a target node from a plurality of nodes included in a design circuit; (B) inserting a test point at the target node; (C) designating a delay time with respect to a test point path that is a path connected to the test point; and (D) laying out the design circuit such that a delay time of the test point path becomes the designated delay time. The (A) selecting includes: (A1) calculating delay times of fan-in paths and fan-out paths with respect to each of the plurality of nodes; and (A2) selecting the target node from the plurality of nodes based on the calculated delay times. | 11-27-2008 |
20100174958 | Test circuit including tap controller selectively outputting test signal based on mode and shift signals - A test circuit includes a plurality of TAP controllers conforming to a standard specification defined in IEEE 1149 and includes a master TAP controller which receives a control code and a test control signal and performs a test on a circuit to be tested and which outputs a shift mode signal, a first slave TAP controller which receives the control code and the test control signal and performs a test on a circuit to be tested, and a first TAP pin control circuit provided to correspond to the first slave TAP controller and which switches between inputting the control code to the first slave TAP controller from the outside and inputting the control code through the master TAP controller, on the basis of the shift mode signal. | 07-08-2010 |
20110175638 | SEMICONDUCTOR INTEGRATED CIRCUIT AND CORE TEST CIRCUIT - A semiconductor circuit inhibiting the increase in the number of elements required to enable core circuit testing and a core test circuit enabling consecutive-pattern testing of a core circuit without increasing the number of terminals are provided. The semiconductor circuit includes a core circuit, a combinational circuit, a scan path for the combinational circuit with the scan path including cascaded scan flip-flops connected to input and output terminals of the combinational circuit, and scan path sharing circuits including multiplexers for allowing output signals of the core circuit to be inputted to the scan flip-flops, and allows a core circuit not included in the combinational circuit to be tested using the scan path for the combinational circuit. The core test circuit is provided with output shift registers for storing and outputting test results of plural test patterns outputted from output terminals of the core circuit to be eventually scanned out from the output shift registers. | 07-21-2011 |
Patent application number | Description | Published |
20130198230 | INFORMATION PROCESSING APPARATUS, DISTRIBUTED PROCESSING SYSTEM, AND DISTRIBUTED PROCESSING METHOD - An information processing apparatus includes a receiving unit that receives an access request for data from one of a plurality of information processing apparatuses in a distributed processing system in which the information processing apparatuses execute a process in a distributed manner, a query issuing unit that issues, when the access request for the data is received by the receiving unit, a query to each of the information processing apparatuses as to whether the data is stored in a page cache managed by an operating system on each of the information processing apparatuses, and a responding unit that makes a response to the access request, the response specifying, as an access destination, an information processing apparatus that has responded to the query issued by the query issuing unit. | 08-01-2013 |
20130198460 | INFORMATION PROCESSING DEVICE, MEMORY MANAGEMENT METHOD, AND COMPUTER-READABLE RECORDING MEDIUM - An information processing device includes a memory and a processor coupled to the memory, wherein the processor executes a process comprising selecting data included in a same file as deletion target data from the memory when deleting the data cached in the memory at the caching from the memory and deleting the deletion target data and the data selected at the selecting, from the memory. | 08-01-2013 |