Patent application number | Description | Published |
20120074417 | Method of Bonding Wafers - A method of bonding wafers with an aluminum-germanium bond includes forming an aluminum layer on a first wafer, and a germanium layer on a second wafer, and implanting the germanium layer with non-germanium atoms prior to forming a eutectic bond at the aluminum-germanium interface. The wafers are aligned to a desired orientation and the two layers are held in contact with one another. The aluminum-germanium interface is heated to a temperature that allows the interface of the layers to melt, thus forming a bond. A portions of the germanium layer may be removed from the second wafer to allow infrared radiation to pass through the second wafer to facilitate wafer alignment. | 03-29-2012 |
20120286886 | Electromechanical Systems Oscillator with Piezoelectric Contour Mode Resonator for Multiple Frequency Generation - Electromechanical systems resonator structures, devices, circuits, and systems are disclosed. In one aspect, an oscillator includes an active component and a passive component connected in a feedback configuration. The passive component includes one or more contour mode resonators (CMR). A CMR includes a piezoelectric layer disposed between a first conductive layer and a second conductive layer. The conductive layers include an input electrode and an output electrode. The passive component is configured to output a first resonant frequency and a second resonant frequency, which is an odd integer harmonic of the first resonant frequency. The active component is configured to output a signal including the first resonant frequency and the second resonant frequency. This output signal can be a substantially square wave signal, which can serve as a clock in various applications. | 11-15-2012 |
20120293520 | PIEZOELECTRIC RESONATORS WITH CONFIGURATIONS HAVING NO GROUND CONNECTIONS TO ENHANCE ELECTROMECHANICAL COUPLING - This disclosure provides implementations of electromechanical systems resonator structures, devices, apparatus, systems, and related processes. In one aspect, resonator apparatus includes a first conductive layer including a first electrode and a second electrode. The first electrode is coupled to receive a first input signal, and the second electrode is coupled to provide a first output signal. A piezoelectric layer includes a piezoelectric material. The piezoelectric layer has a first side and a second side opposite the first side. The first side is proximate the first conductive layer, and the second side is electrically isolated from ground. In some examples, the second side of the piezoelectric layer can be exposed and/or electrically de-coupled from one or more components. | 11-22-2012 |
20130021304 | PIEZOELECTRIC LATERALLY VIBRATING RESONATOR STRUCTURES WITH ACOUSTICALLY COUPLED SUB-RESONATORS - This disclosure provides implementations of electromechanical systems resonator structures, devices, apparatus, systems, and related processes. A resonator structure generally includes a first conductive layer with an input electrode, an output electrode, and a ground electrode. The ground electrode is disposed between the input electrode and the output electrode. In some implementations, the second conductive layer includes an input electrode, an output electrode, and a ground electrode. In some other implementations, a second conductive layer includes a pair of ground electrodes and a signal electrode in the form of an input or output electrode disposed between the ground electrodes. A piezoelectric layer is disposed between the first conductive layer and the second conductive layer. Sub-resonators can be defined in different regions of the structure, such that the piezoelectric layer is capable of moving to produce an output signal having frequencies at a first resonant frequency and a second resonant frequency. | 01-24-2013 |
20130021305 | PIEZOELECTRIC LATERALLY VIBRATING RESONATOR STRUCTURE GEOMETRIES FOR SPURIOUS FREQUENCY SUPPRESSION - This disclosure provides implementations of electromechanical systems resonator structures, devices, apparatus, systems, and related processes. In one aspect, a resonator structure includes a first conductive layer of electrodes and a second conductive layer of electrodes. A piezoelectric layer including a piezoelectric material is disposed between the first conductive layer and the second conductive layer. One or more trenches can be formed in the piezoelectric layer on one or both sides in space regions between the electrodes. In some implementations, a process for forming the resonator structure includes removing an exposed portion of the piezoelectric layer to define a trench, for instance, by partial etching or performing an isotropic release etch using a XeF | 01-24-2013 |
20130076209 | PIEZOELECTRIC RESONATOR HAVING COMBINED THICKNESS AND WIDTH VIBRATIONAL MODES - A method and apparatus for a piezoelectric resonator having combined thickness and width vibrational modes are disclosed. A piezoelectric resonator may include a piezoelectric substrate and a first electrode coupled to a first surface of the piezoelectric substrate. The piezoelectric resonator may further include a second electrode coupled to a second surface of the piezoelectric substrate, where the first surface and the second surface are substantially parallel and define a thickness dimension of the piezoelectric substrate. Furthermore, the thickness dimension and the width dimension of the piezoelectric substrate are configured to produce a resonance from a coherent combination of a thickness vibrational mode and a width vibrational mode when an excitation signal is applied to the electrodes. | 03-28-2013 |
20130082799 | CROSS-SECTIONAL DILATION MODE RESONATORS AND RESONATOR-BASED LADDER FILTERS - Electromechanical systems dilation mode resonator (DMR) structures are disclosed. The DMR includes a first electrode layer, a second electrode layer, and a piezoelectric layer formed of a piezoelectric material. The piezoelectric layer has dimensions including a lateral distance (D), in a plane of an X axis and a Y axis perpendicular to the X axis, and a thickness (T), along a Z axis perpendicular to the X axis and the Y axis. A numerical ratio of the thickness and the lateral distance, T/D, is configured to provide a mode of vibration of the piezoelectric layer with displacement along the Z axis and along the plane of the X axis and the Y axis responsive to a signal provided to one or more of the electrodes. Ladder filter circuits can be constructed with DMRs as series and/or shunt elements, and the resonators can have spiral configurations. | 04-04-2013 |
20130083044 | CROSS-SECTIONAL DILATION MODE RESONATORS - Electromechanical systems dilation mode resonator (DMR) structures are disclosed. The DMR includes a first electrode layer, a second electrode layer, and a piezoelectric layer formed of a piezoelectric material. The piezoelectric layer has dimensions including a lateral distance (D), in a plane of an X axis and a Y axis perpendicular to the X axis, and a thickness (T), along a Z axis perpendicular to the X axis and the Y axis. A numerical ratio of the thickness and the lateral distance, T/D, is configured to provide a mode of vibration of the piezoelectric layer with displacement along the Z axis and along the plane of the X axis and the Y axis responsive to a signal provided to one or more of the electrodes. Ladder filter circuits can be constructed with DMRs as series and/or shunt elements, and the resonators can have spiral configurations. | 04-04-2013 |
20130113076 | METAL-SEMICONDUCTOR WAFER BONDING FOR HIGH-Q DEVICES - Methods and apparatus for metal semiconductor wafer bonding for high-Q devices are provided. An exemplary capacitor includes a first plate formed on a glass substrate, a second plate, and a dielectric layer. No organic bonding agent is used between the first plate and the glass substrate, and the dielectric layer can be an intrinsic semiconductor. A extrinsic semiconductor layer that is heavily doped contacts the dielectric layer. The dielectric and extrinsic semiconductor layers are sandwiched between the first and second plates. An intermetallic layer is formed between the first plate and the dielectric layer. The intermetallic layer is thermo compression bonded to the first plate and the dielectric layer. The capacitor can be coupled in a circuit as a high-Q capacitor and/or a varactor, and can be integrated with a mobile device. | 05-09-2013 |
20130120074 | MULTI-FREQUENCY RECONFIGURABLE VOLTAGE CONTROLLED OSCILLATOR (VCO) AND METHOD OF PROVIDING SAME - A multiple frequency reconfigurable voltage controlled oscillator (VCO) ( | 05-16-2013 |
20130120081 | COMBINED RESONATORS AND PASSIVE CIRCUIT COMPONENTS FOR FILTER PASSBAND FLATTENING - This disclosure provides implementations of electromechanical systems combined resonator and passive circuit components. In one aspect, passband flattened filter apparatus includes a resonator structure and input and output passband flattening components. The resonator structure has a first input, a second input coupled to a ground terminal, a first output, and a second output coupled to the ground terminal. The input passband flattening component includes a first inductor having an output coupled to the first input of the resonator structure, and a second inductor having an input coupled to the first input of the resonator structure and an output coupled to the ground terminal. The output passband flattening component includes a first inductor having an input coupled to the first output of the resonator structure, and a second inductor having an input coupled to the first output of the resonator structure and an output coupled to the ground terminal. | 05-16-2013 |
20130120082 | TWO-PORT RESONATORS ELECTRICALLY COUPLED IN PARALLEL - Systems and method for wideband filter designs comprising two-port piezoelectric resonators electrically coupled in parallel. A resonating circuit comprises a first piezoelectric resonator formed of a first configuration, and a second piezoelectric resonator formed of a second configuration such that outputs of the first and second piezoelectric resonators have a 180-degree phase difference for a same input. The first piezoelectric resonator and the second piezoelectric resonator are coupled electrically in parallel. The first and second piezoelectric resonators have different resonating frequencies respectively controlled by lateral dimensions of the piezoelectric resonators. | 05-16-2013 |
20130120415 | COMBINED RESONATORS AND PASSIVE CIRCUIT COMPONENTS ON A SHARED SUBSTRATE - This disclosure provides implementations of electromechanical systems combined resonator and passive circuit component structures, devices, apparatus, systems, and related processes. In one aspect, the device includes a piezoelectric resonator structure formed over an insulating substrate. A portion of the piezoelectric resonator structure is spaced apart from the substrate by a first gap. A passive circuit component structure such as an inductor or a capacitor is formed over the insulating substrate. A portion of the passive circuit component structure is spaced apart from the substrate by a second gap. The first gap and the second gap are defined by removal of a sacrificial (SAC) layer. | 05-16-2013 |
20130120951 | STACKED CMOS CHIPSET HAVING AN INSULATING LAYER AND A SECONDARY LAYER AND METHOD OF FORMING SAME - A chipset includes a sheet of glass, quartz or sapphire and a first wafer having at least one first circuit layer on a first side of a first substrate layer. The first wafer is connected to the sheet such that the at least one first circuit layer is located between the first substrate layer and the sheet. A second wafer having at least one second circuit layer on a first side of a second substrate layer is connected to the first substrate layer such that the at least one second circuit layer is located between the second substrate layer and the first substrate layer. Also a method of forming a chipset. | 05-16-2013 |
20130207745 | 3D RF L-C FILTERS USING THROUGH GLASS VIAS - Three-dimensional (3D) Radio Frequency (RF) inductor-capacitor (LC) band pass filters having through-glass-vias (TGVs). One such L-C filter circuit includes a glass substrate, a first portion of a first inductor formed on a first surface of the glass substrate, a second portion of the first inductor formed on a second surface of the glass substrate, and a first set of TGVs configured to connect the first and second portions of the first inductor. Additionally the L-C filter circuit can include a second inductor similar to the first inductor, and a metal-insulator-metal (MIM) capacitor formed between the first and second inductor, such that the first and second inductor are coupled through the MIM capacitor. | 08-15-2013 |
20130222060 | MUTUALLY COUPLED MATCHING NETWORK - An impedance matching circuit is disclosed. The impedance matching circuit includes two or more mutually coupled inductors. A total self inductance of the impedance matching circuit is less than a corresponding impedance matching circuit that includes inductors that are not mutually coupled. The two or more mutually coupled inductors may have known current ratios that match current ratios in the corresponding impedance matching circuit. | 08-29-2013 |
20130295866 | RADIO FREQUENCY SWITCH FOR DIVERSITY RECEIVER - A diversity receiver switch includes at least one second stage switch configured to communicate with a transceiver. The diversity receiver switch may also include at least one first stage switch coupled between a diversity receiver antenna and the second stage switch(es). The first stage switch(es) may be configured to handle a different amount of power than the second stage switch(es). The diversity receiver switch may include a bank of second stage switches configured to communicate with a transceiver. A first stage switch may be configured to handle more power than each switch in the bank of second stage switches. Alternatively, the diversity receiver switch include a bank of first stage switches coupled between the diversity receiver antenna and a second stage switch. The second stage switch may be configured to handle more power than each of the first stage switches. | 11-07-2013 |
20140139969 | CAPACITOR STRUCTURE FOR WIDEBAND RESONANCE SUPPRESSION IN POWER DELIVERY NETWORKS - Some novel features pertain to a capacitor structure that includes a first conductive layer, a second conductive layer and a non-conductive layer. The first conductive layer has a first overlapping portion and a second overlapping portion. The second conductive layer has a third overlapping portion, a fourth overlapping portion, and a non-overlapping portion. The third overlapping portion overlaps with the first overlapping portion of the first conductive layer. The fourth overlapping portion overlaps with the second overlapping portion of the first conductive layer. The non-overlapping portion is free of any overlap (e.g., vertical overlap) with the first conductive layer. The non-conductive layer separates the first and second conductive layers. The non-conductive layer electrically insulates the third overlapping portion and the fourth overlapping portion from the first conductive layer. | 05-22-2014 |
20140167273 | LOW PARASITIC PACKAGE SUBSTRATE HAVING EMBEDDED PASSIVE SUBSTRATE DISCRETE COMPONENTS AND METHOD FOR MAKING SAME - One feature pertains to a multi-layer package substrate of an integrated circuit package that comprises a discrete circuit component (DCC) having at least one electrode. The DCC is embedded within an insulator layer, and a via coupling component electrically couples to the electrode. A first portion of the via coupling component extends beyond a first edge of the electrode, and a plurality of vias each having a first end couple to the first via coupling component. At least a first via of the plurality of vias couples to the first portion of the via coupling component that extends beyond the first edge of the electrode. Moreover, the plurality of vias each have a second end that electrically couple to a first outer metal layer, and at least a second portion of the via coupling component is positioned within a first inner metal layer. | 06-19-2014 |
20140197902 | DIPLEXER DESIGN USING THROUGH GLASS VIA TECHNOLOGY - A diplexer includes a substrate having a set of through substrate vias. The diplexer also includes a first set of traces on a first surface of the substrate. The first traces are coupled to the through substrate vias. The diplexer further includes a second set of traces on a second surface of the substrate that is opposite the first surface. The second traces are coupled to opposite ends of the set of through substrate vias. The through substrate vias and the traces also operate as a 3D inductor. The diplexer also includes a capacitor supported by the substrate. | 07-17-2014 |
20140252568 | ELECTROMAGNETIC INTERFERENCE ENCLOSURE FOR RADIO FREQUENCY MULTI-CHIP INTEGRATED CIRCUIT PACKAGES - One feature pertains to a multi-chip package that includes a substrate and an electromagnetic interference (EMI) shield coupled to the substrate. At least one integrated circuit is coupled to a first surface of the substrate. The EMI shield includes a metal casing configured to shield the package from radio frequency radiation, a dielectric layer coupled to at least a portion of an inner surface of the metal casing, and a plurality of signal lines. The signal lines are coupled to the dielectric layer and electrically isolated from the metal casing by the dielectric layer. At least one other integrated circuit is coupled to an inner surface of the EMI shield, and at least a portion of the inner surface of the EMI shield faces the first surface of the substrate. The signal lines are configured to provide electrical signals to the second circuit component. | 09-11-2014 |
20140252645 | THERMAL DESIGN AND ELECTRICAL ROUTING FOR MULTIPLE STACKED PACKAGES USING THROUGH VIA INSERT (TVI) - Some implementations provide a semiconductor package structure that includes a package substrate, a first package, an interposer coupled to the first package, and a first set of through via insert (TVI). The first set of TVI is coupled to the interposer and the package substrate. The first set of TVI is configured to provide heat dissipation from the first package. In some implementations, the semiconductor package structure further includes a heat spreader coupled to the interposer. The heat spreader is configured to dissipate heat from the first package. In some implementations, the first set of TVI is further configured to provide an electrical path between the first package and the package substrate. In some implementations, the first package is electrically coupled to the package substrate through the interposer and the first set of TVI. In some implementations, the first set of TVI includes a dielectric layer and a metal layer. | 09-11-2014 |
20140268615 | TWO-STAGE POWER DELIVERY ARCHITECTURE - A two-stage power delivery network includes a voltage regulator and an interposer. The interposer includes a packaging substrate having an embedded inductor. The embedded inductor includes a set of traces and a set of through substrate vias at opposing ends of the traces. The interposer is coupled to the voltage regulator. The two-stage power delivery network also includes a semiconductor die supported by the packaging substrate. The two-stage power delivery network also includes a capacitor that is supported by the packaging substrate. The capacitor is operable to provide a decoupling capacitance associated with the semiconductor die and a capacitance to reduce a switching noise of the voltage regulator. | 09-18-2014 |
20140268616 | CAPACITOR WITH A DIELECTRIC BETWEEN A VIA AND A PLATE OF THE CAPACITOR - In a particular embodiment, a device includes a substrate, a via that extends at least partially through the substrate, and a capacitor. A dielectric of the capacitor is located between the via and a plate of the capacitor, and the plate of the capacitor is external to the substrate and within the device. | 09-18-2014 |
20140327496 | TUNABLE DIPLEXERS IN THREE-DIMENSIONAL (3D) INTEGRATED CIRCUITS (IC) (3DIC) AND RELATED COMPONENTS AND METHODS - Tunable diplexers in three-dimensional (3D) integrated circuits (IC) (3DIC) are disclosed. In one embodiment, the tunable diplexer may be formed by providing one of either a varactor or a variable inductor in the diplexer. The variable nature of the varactor or the variable inductor allows a notch in the diplexer to be tuned so as to select a band stop to eliminate harmonics at a desired frequency as well as control the cutoff frequency of the pass band. By stacking the elements of the diplexer into three dimensions, space is conserved and a variety of varactors and inductors are able to be used. | 11-06-2014 |
20140327508 | INDUCTOR TUNABLE BY A VARIABLE MAGNETIC FLUX DENSITY COMPONENT - An inductor tunable by a variable magnetic flux density component is disclosed. A particular device includes an inductor. The device further includes a variable magnetic flux density component (VMFDC) positioned to influence a magnetic field of the inductor when a current is applied to the inductor. | 11-06-2014 |
20140327510 | ELECTRONIC DEVICE HAVING ASYMMETRICAL THROUGH GLASS VIAS - An electronic device includes a structure. The structure includes a first set of through glass vias (TGVs) and a second set of TGVs. The first set of TGVs includes a first via and the second set of TGVs includes a second via. The first via has a different cross-sectional shape than the second via. | 11-06-2014 |
20140354372 | SYSTEMS FOR REDUCING MAGNETIC COUPLING IN INTEGRATED CIRCUITS (ICS), AND RELATED COMPONENTS AND METHODS - Systems for reducing magnetic coupling in integrated circuits (ICs) are disclosed. Related components and methods are also disclosed. The ICs have a plurality of inductors. Each inductor generates a magnetic flux that has a discernible axis. To reduce magnetic coupling between the inductors, the flux axes are designed so as to be non-parallel. In particular, by making the flux axes of the inductors non-parallel to one another, magnetic coupling between the inductors is reduced relative to the situation where the flux axes are parallel. This arrangement may be particularly well suited for use in diplexers having a low pass and a high pass filter. | 12-04-2014 |
20140374914 | STRESS COMPENSATION PATTERNING - An apparatus includes a device that includes at least one layer. The at least one layer includes an inter-device stress compensation pattern configured to reduce an amount of inter-device warpage prior to the device being detached from another device. | 12-25-2014 |
20150035162 | INDUCTIVE DEVICE THAT INCLUDES CONDUCTIVE VIA AND METAL LAYER - An inductive device that includes a conductive via and a metal layer are disclosed. A particular method of forming an electronic device includes forming a metal layer that contacts a surface of a substrate. The substrate, including the surface, is formed from a substantially uniform dielectric material. The metal layer contacts a conductive via that extends at least partially within the substrate. The metal layer and the conductive via form at least a portion of an inductive device. | 02-05-2015 |
20150334847 | TWO-STAGE POWER DELIVERY ARCHITECTURE - A two-stage power delivery network includes a voltage regulator and an interposer. The interposer includes a packaging substrate having an embedded inductor. The embedded inductor includes a set of traces and a set of through substrate vias at opposing ends of the traces. The interposer is coupled to the voltage regulator. The two-stage power delivery network also includes a semiconductor die supported by the packaging substrate. The two-stage power delivery network also includes a capacitor that is supported by the packaging substrate. The capacitor is operable to provide a decoupling capacitance associated with the semiconductor die and a capacitance to reduce a switching noise of the voltage regulator. | 11-19-2015 |
Patent application number | Description | Published |
20120268440 | WIDENING RESONATOR BANDWIDTH USING MECHANICAL LOADING - This disclosure provides systems, apparatus and techniques by which electromechanical resonators are implemented. In one aspect, by mechanically loading the resonator body in specific ways, multiple resonance modes are created within the resonator body resulting in wider bandwidths. | 10-25-2012 |
20130134838 | PIEZOELECTRIC MEMS TRANSFORMER - This disclosure provides implementations of electromechanical systems piezoelectric resonator transformers, devices, apparatus, systems, and related processes. In one aspect, a transformer includes a piezoelectric layer; a first conductive layer arranged over a first surface of the piezoelectric layer including a first set of electrodes and a second set of electrodes interdigitated with the first set. The transformer includes a second conductive layer arranged over a second surface including at least a third set of electrodes. In some implementations, the transformer includes a first port capable of receiving an input signal and to which the first set of electrodes are coupled, and a second port capable of being coupled to a load and of outputting an output signal, the second set of electrodes being coupled to the second port. Generally, a ratio of the number of electrodes of the second set to the first set characterizes a transformation ratio. | 05-30-2013 |
20130214643 | COMPOSITE PIEZOELECTRIC LATERALLY VIBRATING RESONATOR - A resonator is described. The resonator includes multiple electrodes. The resonator also includes a composite piezoelectric material. The composite piezoelectric material includes at least one layer of a first piezoelectric material and at least one layer of a second piezoelectric material. At least one electrode is coupled to a bottom of the composite piezoelectric material. At least one electrode is coupled to a top of the composite piezoelectric material. | 08-22-2013 |
20130235001 | PIEZOELECTRIC RESONATOR WITH AIRGAP - This disclosure provides implementations of electromechanical systems (EMS) piezoelectric resonator structures, transformers, devices, apparatus, systems, and related processes. In one aspect, a piezoelectric resonator structure includes a first conductive electrode layer, a second conductive electrode layer, and a piezoelectric layer arranged between the first and second conductive layers. In some implementations, the surface of the piezoelectric layer adjacent to the first conductive layer is separated from the first conductive layer by a first gap, and the surface of the piezoelectric layer adjacent to the second conductive layer is separated from the second conductive layer by a second gap. In some implementations, the resonator structure further includes an encapsulation layer arranged over the second conductive layer and providing physical support to the second conductive layer. | 09-12-2013 |
20130293336 | THREE-DIMENSIONAL MULTILAYER SOLENOID TRANSFORMER - This disclosure provides implementations of inductors, transformers, and related processes. In one aspect, a device includes a substrate having first and second surfaces. A first inducting arrangement includes a first set of vias, a second set of vias, a first set of traces arranged over the first surface connecting the first and second vias, and a second set of traces arranged over the second surface connecting the first and second vias. A second inducting arrangement is inductively-coupled and interleaved with the first inducting arrangement and includes a third set of vias, a fourth set of vias, a third set of traces arranged over the first surface connecting the third and fourth vias, and a fourth set of traces arranged over the second surface connecting the third and fourth vias. One or more sets of dielectric layers insulate portions of the traces from one another. | 11-07-2013 |
20130293337 | HIGH QUALITY FACTOR PLANAR INDUCTORS - This disclosure provides systems, methods, and apparatus related to inductors. In one aspect, a planar inductor may include a substrate with a spacer in the shape of a planar spiral coil on a surface of the substrate. Disposed on the spacer may be a line of metal formed as a planar inductor in the shape of the planar spiral coil. The spacer may be between the line of metal and the surface of the substrate. The spacer may elevate the line of metal above the surface of the substrate. | 11-07-2013 |
20140028543 | COMPLEX PASSIVE DESIGN WITH SPECIAL VIA IMPLEMENTATION - This disclosure provides systems, methods and apparatus for vias in an integrated circuit structure such as a passive device. In one aspect, an integrated passive device includes a first conductive trace and a second conductive trace over the first conductive trace with an interlayer dielectric between a portion of the first conductive trace and the second conductive trace. One or more vias are provided within the interlayer dielectric to provide electrical connection between the first conductive trace and the second conductive trace. A width of the vias is greater than a width of at least one of the conductive traces. | 01-30-2014 |
20140035702 | HYBRID FILTER INCLUDING LC- AND MEMS-BASED RESONATORS - This disclosure provides implementations of filters and filter topologies, circuits, structures, devices, apparatus, systems, and related processes. In one aspect, a device includes one or more LC resonant circuit stages. In some implementations, each LC stage includes an inductor and a capacitor. Each LC stage also has a corresponding resonant frequency. The one or more LC stages are arranged to produce an unmodified passband over a range of frequencies having a corresponding bandwidth. One or more microelectromechanical systems (MEMS) resonators are arranged with the one or more LC stages. The one or more MEMS resonators are arranged with the one or more LC stages so as to modify characteristics of the unmodified passband such that the hybrid filter produces a modified passband having a modified bandwidth and one or more other modified band characteristics. | 02-06-2014 |
20140055214 | MULTI-MODE BANDPASS FILTER - A multi-mode bandpass filter is described. The bandpass filter includes a first multi-directional vibrating microelectromechanical systems resonator. The bandpass filter also includes a second multi-directional vibrating microelectromechanical systems resonator. The first multi-directional vibrating microelectromechanical systems resonator is in a parallel configuration. The second multi-directional vibrating microelectromechanical systems resonator is in a series configuration. | 02-27-2014 |
20140111064 | COMPOSITE DILATION MODE RESONATORS - This disclosure provides systems, methods and apparatus related to acoustic resonators that include composite transduction layers for enabling selective tuning of one or more acoustic or electromechanical properties. In one aspect, a resonator structure includes one or more first electrodes, one or more second electrodes, and a transduction layer arranged between the first and second electrodes. The transduction layer includes a plurality of constituent layers. In some implementations, the constituent layers include one or more first piezoelectric layers and one or more second piezoelectric layers. The transduction layer is configured to, responsive to signals provided to the first and second electrodes, provide at least a first mode of vibration of the transduction layer with a displacement component along the z axis and at least a second mode of vibration of the transduction layer with a displacement component along the plane of the x axis and they axis. | 04-24-2014 |
20140125432 | SELECTIVE TUNING OF ACOUSTIC DEVICES - This disclosure provides implementations of methods, apparatus and systems for producing acoustic wave devices and for selectively modifying one or more acoustic or electromechanical characteristics of such devices. In one aspect, a method includes depositing a structural layer over a substrate. The structural layer includes a plurality of structural portions, each being positioned over a corresponding device region. The method also includes arranging a mask layer over the structural layer. The mask layer includes a plurality of mask portions, each including a number of mask openings that expose a corresponding region of the structural portion. The method also includes accelerating dopant particles toward the mask layer. The accelerated dopant particles that proceed through the mask openings are impacted into the corresponding structural portion. The impacted dopant particles modify material properties in the structural portion, which then effect a change in the acoustic or electromechanical characteristics of the acoustic wave device. | 05-08-2014 |
20140132297 | RECONFIGURABLE ELECTRIC FIELD PROBE - Systems and methods for EMC, EMI and ESD testing are described. A probe comprises a center conductor extending along an axis of the probe, a probe tip, and a shield coaxially aligned with the center conductor and configured to provide electromagnetic screening for the probe tip. One or more actuators may change the relative positions of the probe tip and shield with respect to a device under test, thereby enabling control of sensitivity and resolution of the probe. | 05-15-2014 |
20140247269 | HIGH DENSITY, LOW LOSS 3-D THROUGH-GLASS INDUCTOR WITH MAGNETIC CORE - This disclosure provides systems, methods and apparatus for three-dimensional (3-D) through-glass via inductors. In one aspect, the through-glass via inductor includes a glass substrate with a first cavity, a second cavity, and at least two through-glass vias. The through-glass vias include metal bars that are connected by a metal trace. The metal bars and the metal trace define the inductor, and each cavity is at least partially filled with magnetic material. The magnetic material can include a plurality of particles having an average diameter of less than about 20 nm. The first cavity can be inside the inductor and the second cavity can be outside inductor. In some implementations, the first and the second cavity can be vias that extend only partially through the glass substrate. | 09-04-2014 |
20140266508 | BANDPASS FILTER IMPLEMENTATION ON A SINGLE LAYER USING SPIRAL CAPACITORS - A planar capacitor includes, in part, a first metal line forming spiral-shaped loops around one of its end point, and a second metal line forming spiral-shaped loops between the loops of the first metal line. The first and second metal lines are coplanar, formed on an insulating layer, and form the first and second plates of the planar capacitor. The planar capacitor may be used to form a filter. Such a filter includes a first metal line forming first spiral-shaped loops, a second metal line forming second spiral-shaped loops, and a third metal line—coplanar with the first and second metal lines—forming loops between the loops of the first and second metal lines. The filter further includes a first inductor coupled between the first and third metal lines, and a second inductor coupled between the second and third metal lines. | 09-18-2014 |
20140322435 | THREE-DIMENSIONAL MULTILAYER SOLENOID TRANSFORMER - This disclosure provides implementations of inductors, transformers, and related processes. In one aspect, a device includes a substrate having first and second surfaces. A first inducting arrangement includes a first set of vias, a second set of vias, a first set of traces arranged over the first surface connecting the first and second vias, and a second set of traces arranged over the second surface connecting the first and second vias. A second inducting arrangement is inductively-coupled and interleaved with the first inducting arrangement and includes a third set of vias, a fourth set of vias, a third set of traces arranged over the first surface connecting the third and fourth vias, and a fourth set of traces arranged over the second surface connecting the third and fourth vias. One or more sets of dielectric layers insulate portions of the traces from one another. | 10-30-2014 |
20140354378 | DESIGN FOR HIGH PASS FILTERS AND LOW PASS FILTERS USING THROUGH GLASS VIA TECHNOLOGY - A filter includes a glass substrate having through substrate vias. The filter also includes capacitors supported by the glass substrate. The capacitors may have a width and/or thickness less than a printing resolution. The filter also includes a 3D inductor within the substrate. The 3D inductor includes a first set of traces on a first surface of the glass substrate coupled to the through substrate vias. The 3D inductor also includes a second set of traces on a second surface of the glass substrate coupled to opposite ends of the through substrate vias. The second surface of the glass substrate is opposite the first surface of the glass substrate. The through substrate vias and traces operate as the 3D inductor. The first set of traces and the second set of traces may also have a width and/or thickness less than the printing resolution. | 12-04-2014 |
20140361854 | COMPACT 3-D COPLANAR TRANSMISSION LINES - This disclosure provides systems, methods and apparatus for a compact 3-D coplanar transmission line (CTL). In one aspect, the CTL has a proximal end and a distal end separated, in a first plane, by a distance D, the first plane being parallel to a layout area of a substrate. The plane is defined by mutually orthogonal axes x and z The CTL provides a conductive path having pathlength L. D is substantially aligned along axis z, L is at least 1.5×D, and the CPW is configured such that at least one third of the pathlength L is disposed along one or more directions having a substantial component orthogonal to the first plane. Less than one third of the pathlength L is disposed in a direction having a substantial component parallel to axis x. | 12-11-2014 |
20150014812 | THICK CONDUCTIVE STACK PLATING PROCESS WITH FINE CRITICAL DIMENSION FEATURE SIZE FOR COMPACT PASSIVE ON GLASS TECHNOLOGY - An integrated circuit device includes a substrate, and a first interlayer dielectric layer on the substrate that includes a first conductive layer and a second conductive layer. The integrated circuit device also includes a first conductive stack including a third conductive layer coupled to a portion of the second conductive layer with a first via. The integrated circuit device further includes a second conductive stack comprising a fourth conductive layer directly on a portion of the third conductive layer that is isolated from the substrate. The integrated circuit device also includes a second interlayer dielectric layer surrounding the third conductive layer and the fourth conductive layer. | 01-15-2015 |
20150048480 | INTEGRATED PASSIVE DEVICE (IPD) ON SUBTRATE - Some novel features pertain to a semiconductor device that includes a substrate, a first cavity that traverses the substrate. The first cavity is configured to be occupied by a interconnect material (e.g., solder ball). The substrate also includes a first metal layer coupled to a first side wall of the first cavity. The substrate further includes a first integrated passive device (IPD) on a first surface of the substrate, the first IPD coupled to the first metal layer. In some implementations, the substrate is a glass substrate. In some implementations, the first IPD is one of at least a capacitor, an inductor and/or a resistor. In some implementations, the semiconductor device further includes a second integrated passive device (IPD) on a second surface of the substrate. The second IPD is coupled to the first metal layer. | 02-19-2015 |
20150061813 | VARYING THICKNESS INDUCTOR - A particular device includes a substrate and a spiral inductor coupled to the substrate. The spiral inductor includes a first conductive spiral and a second conductive spiral overlaying the first conductive spiral. A first portion of an innermost turn of the spiral inductor has a first thickness in a direction perpendicular to the substrate. The first portion of the innermost turn includes a first portion of the first conductive spiral and does not include the second conductive spiral. A second portion of the innermost turn includes a first portion of the second conductive spiral. A portion of an outermost turn of the spiral inductor has a second thickness in the direction perpendicular to the substrate that is greater than the first thickness. A portion of the outermost turn includes a second portion of the first conductive spiral and a second portion of the second conductive spiral. | 03-05-2015 |
20150070863 | LOW PACKAGE PARASITIC INDUCTANCE USING A THRU-SUBSTRATE INTERPOSER - An interposer for a chipset includes multilayer thin film capacitors incorporated therein to reduce parasitic inductance in the chipset. Power and ground terminals are laid out in a staggered pattern to cancel magnetic fields between conductive vias to reduce equivalent series inductance (ESL). | 03-12-2015 |
20150084623 | ADJUSTABLE MAGNETIC PROBE FOR EFFICIENT NEAR FIELD SCANNING - A method and apparatus for testing near field magnetic fields of electronic devices. The method comprises measuring a magnetic field using a loop antenna that is oriented in a first direction. The loop antenna is swept through a desired range of azimuth angles while measuring the magnetic field. Once the first direction testing is completed, the loop antenna is changed to a second orientation direction. The magnetic field is then measured in the second orientation direction and is swept through a desired range of orientation angles in the second direction. The apparatus provides a loop antenna connected to a coaxial probe, with the coaxial cable serving as the center conductor, and two outer conductors. An axle is mounted to the loop antenna and connected to a step motor. A servo motor is also provided for moving the arm assembly. | 03-26-2015 |
20150084653 | CURRENT SOURCE DRIVEN MEASUREMENT AND MODELING - A method and apparatus for testing integrated circuit resistors includes applying a variable source current to a resistive device under test (DUT), measuring the resistance of the resistive DUT as a function of the source current, and fitting the measured resistance to parameters of a polynomial parametric equation, wherein the parametric equation comprises a constant resistance at zero current bias plus a second order current coefficient of resistance multiplied by the square of the current. | 03-26-2015 |
20150091132 | STIFFENER WITH EMBEDDED PASSIVE COMPONENTS - Systems and methods for preventing warpage of a semiconductor substrate in a semiconductor package. A continuous or uninterrupted stiffener structure is designed with a recessed groove, such that passive components, such as, high density capacitors are housed within the recessed groove. The stiffener structure with the recessed groove is attached to the semiconductor substrate using anisotropic conductive film (ACF) or anisotropic conductive paste (ACP). The stiffener structure with the recessed groove surrounds one or more semiconductor devices that may be formed on the semiconductor substrate. The stiffener structure with the recessed groove does not extend beyond horizontal boundaries of the semiconductor substrate. | 04-02-2015 |
20150092314 | CONNECTOR PLACEMENT FOR A SUBSTRATE INTEGRATED WITH A TOROIDAL INDUCTOR - A system includes a first connector coupled to a first surface of a substrate. The first connector enables the system to be electrically coupled to a first device external to the substrate. The system includes a second connector coupled to a second surface of the substrate. The system also includes a plurality of conductive vias extending through the substrate from the first surface to the second surface. The plurality of conductive vias surrounds the first connector and the second connector. The plurality of conductive vias is electrically coupled together to form a toroidal inductor. A first lead of the toroidal inductor is electrically coupled to the first connector. A second lead of the toroidal inductor is electrically coupled to the second connector. | 04-02-2015 |
20150115403 | TOROID INDUCTOR IN AN INTEGRATED DEVICE - Some novel features pertain to an integrated device that includes a substrate, a first cavity through the substrate, and a toroid inductor configured around the first cavity of the substrate. The toroid inductor includes a set of windings configured around the first cavity. The set of windings includes a first set of interconnects on a first surface of the substrate, a set of though substrate vias (TSVs), and a second set of interconnects on a second surface of the substrate. The first set of interconnects is coupled to the second set of interconnects through the set TSVs. In some implementations, the integrated device further includes an interconnect material (e.g., solder ball) located within the first cavity. The interconnect material is configured to couple a die to a printed circuit board. In some implementations, the interconnect material is part of the toroid inductor. | 04-30-2015 |
20150115777 | ASYMMETRIC UNBALANCED ACOUSTICALLY COUPLED RESONATORS FOR SPURIOUS MODE SUPPRESSION - A resonator includes a piezoelectric core, a set of electrodes, and at least one ground terminal. The electrodes are arranged on the piezoelectric core and also includes at least one input electrode having a first width and at least one output electrode having a second width that differs from the first width. The ground terminal is also on the piezoelectric core. | 04-30-2015 |
20150118819 | METAL-SEMICONDUCTOR WAFER BONDING FOR HIGH-Q DEVICES - Methods and apparatus for metal semiconductor wafer bonding for high-Q devices are provided. An exemplary capacitor includes a first plate formed on a glass substrate, a second plate, and a dielectric layer. No organic bonding agent is used between the first plate and the glass substrate, and the dielectric layer can be an intrinsic semiconductor. A extrinsic semiconductor layer that is heavily doped contacts the dielectric layer. The dielectric and extrinsic semiconductor layers are sandwiched between the first and second plates. An intermetallic layer is formed between the first plate and the dielectric layer. The intermetallic layer is thermo compression bonded to the first plate and the dielectric layer. The capacitor can be coupled in a circuit as a high-Q capacitor and/or a varactor, and can be integrated with a mobile device. | 04-30-2015 |
20150130024 | EMBEDDED SHEET CAPACITOR - A multilayer capacitor is provided that includes a plurality of vias configured to receive interconnects from a die. | 05-14-2015 |
20150130579 | MULTI SPIRAL INDUCTOR - An apparatus includes a multi spiral inductor that includes a first spiral and a second spiral. The first spiral includes a first turn, a second turn, and a third turn. The first turn is adjacent to and separated from the second turn by first spacing. The second turn is adjacent to and separated from the third turn by second spacing. The first spacing is different from the second spacing. | 05-14-2015 |
20150146340 | MULTILAYER CERAMIC CAPACITOR INCLUDING AT LEAST ONE SLOT - An apparatus includes a two-terminal MLCC. The two-terminal MLCC includes a conductive layer, where the conductive layer includes at least one slot. The apparatus may also include a second conductive layer that includes at least one slot and an insulating layer that separates the two conductive layers. In one example, a first (e.g., positive) terminal of the two-terminal MLCC is formed by a first set of plates, where each plate in the first set includes at least one slot. A second (e.g., negative) terminal of the two-terminal MLCC is formed by a second set of plates, where each plate in the second set also includes at least one slot. The first set of plates and the second set of plates are interleaved, and each pair of plates is separated by an insulating layer. | 05-28-2015 |
20150180437 | THREE-DIMENSIONAL WIRE BOND INDUCTOR - An inductor is provided on a substrate that includes a capacitor. The inductor comprises a series of wire loops. An end of the wire loop is wire bonded to the capacitor. | 06-25-2015 |
20150200049 | NESTED THROUGH GLASS VIA TRANSFORMER - A 3D nested transformer includes a substrate having a set of through substrate vias daisy chained together with a set of traces. At least some of the through substrate vias have first and second conductive regions. The set of traces also includes a first set of traces coupling together at least some of the first conductive regions of the through substrate vias, and a second set of traces coupling together at least some of the second conductive regions of the through substrate vias. | 07-16-2015 |
20150200245 | LATERAL METAL INSULATOR METAL (MIM) CAPACITOR WITH HIGH-Q AND REDUCED AREA - A lateral metal insulator metal (MIM) capacitor includes a first conductive plate, and a dielectric layer on a sidewall(s) and a first surface of the first conductive plate adjacent to the sidewall(s). The capacitor also includes a second conductive plate on a portion of the dielectric layer that is on the sidewall(s) and on a portion of the dielectric layer that covers a portion of the first surface of the first conductive plate. A sidewall capacitance is also greater than a surface capacitance of the capacitor. | 07-16-2015 |
20150201495 | STACKED CONDUCTIVE INTERCONNECT INDUCTOR - An integrated circuit device includes a first substrate supporting a pair of conductive interconnects, for example pillars. The device also includes a second substrate on the pair of conductive interconnects. The pair of conductive interconnects is arranged to operate as a first 3D solenoid inductor. The device further includes a conductive trace coupling the pair of conductive interconnects to each other. | 07-16-2015 |
20150215026 | RADIO FREQUENCY SWITCH FOR DIVERSITY RECEIVER - A diversity receiver switch includes at least one second stage switch configured to communicate with a transceiver. The diversity receiver switch may also include at least one first stage switch coupled between a diversity receiver antenna and the second stage switch(es). The first stage switch(es) may be configured to handle a different amount of power than the second stage switch(es). The diversity receiver switch may include a bank of second stage switches configured to communicate with a transceiver. A first stage switch may be configured to handle more power than each switch in the bank of second stage switches. Alternatively, the diversity receiver switch include a bank of first stage switches coupled between the diversity receiver antenna and a second stage switch. The second stage switch may be configured to handle more power than each of the first stage switches. | 07-30-2015 |
20150228712 | HIGH QUALITY FACTOR CAPACITORS AND METHODS FOR FABRICATING HIGH QUALITY FACTOR CAPACITORS - Provided are space-efficient capacitors that have a higher quality factor than conventional designs and improve coupling of electrical energy from a through-glass via (TGV) to a dielectric. For example, provided is a TGV having a non-rectangular cross-section, where one end of the TGV is coupled to a first metal plate. A dielectric material is formed on the first metal plate. A second metal plate is formed on the dielectric material in a manner that overlaps at least a portion of the first metal plate to form at least one overlapped region of the dielectric material. At least a part of the perimeter of the overlapped region is non-planar. The overlapped region can be formed in a shape of a closed ring, in a plurality of portions of a ring shape, in substantially a quarter of a ring shape, and/or in substantially a half of a ring shape. | 08-13-2015 |
20150237732 | LOW-PROFILE PACKAGE WITH PASSIVE DEVICE - A low-profile passive-on-package is provided that includes a plurality of recesses that receive corresponding interconnects. Because of the receipt of the interconnects in the recesses, the passive-on-package has a height that is less than a sum of a thickness for the substrate and an interconnect height or diameter. | 08-20-2015 |
20150256143 | RESONATOR WITH A STAGGERED ELECTRODE CONFIGURATION - An integrated circuit device includes a piezoelectric substrate having a first surface and a second surface opposite the first surface. The device also includes a first electrode and a second electrode on the first surface of the piezoelectric substrate, the first electrode having a first width and the second electrode having a second width. The device further includes a third electrode and a fourth electrode on the second surface of the piezoelectric substrate, the third electrode having a third width that is substantially the same as the second width, and the fourth electrode having a fourth width that is substantially the same as the first width. The first and third electrodes operate as part of a first portion of a microelectromechanical systems (MEMS) resonator, and the second and fourth electrodes operate as part of a second portion of the MEMS resonator. | 09-10-2015 |
20150271920 | FACE-UP SUBSTRATE INTEGRATION WITH SOLDER BALL CONNECTION IN SEMICONDUCTOR PACKAGE - Systems and methods relate to a semiconductor package comprising a first substrate or a 2D passive-on-glass (POG) structure with a passive component and a first set of one or more package pads formed on a face of a glass substrate. The semiconductor package also includes a second or laminate substrate with a second set of one or more package pads formed on a face of the second or laminate substrate. Solder balls are dropped, configured to contact the first set of one or more package pads with the second set of one or more package pads, wherein the first substrate or the 2D POG structure is placed face-up on the face of the second or laminate substrate. A printed circuit board (PCB) can be coupled to a bottom side of the second or laminate substrate. | 09-24-2015 |
20150279920 | 3D PILLAR INDUCTOR - Base pads are spaced by a pitch on a support surface. Conducting members, optionally Cu or other metal pillars, extend up from the base pads to top pads. A top pad interconnector connects the top pads in a configuration establishing an inductor current path between the base pads. | 10-01-2015 |
20150287677 | STRESS MITIGATION STRUCTURE FOR WAFER WARPAGE REDUCTION - An integrated circuit device includes a substrate. The integrated circuit device also includes a first conductive stack including a back-end-of-line (BEOL) conductive layer at a first elevation with reference to the substrate. The integrated circuit device also includes a second conductive stack including the BEOL conductive layer at a second elevation with reference to the substrate. The second elevation differs from the first elevation. | 10-08-2015 |
20150303148 | DIE PACKAGE COMPRISING DIE-TO-WIRE CONNECTOR AND A WIRE-TO-DIE CONNECTOR CONFIGURED TO COUPLE TO A DIE PACKAGE - Some novel features pertain to an integrated device package (e.g., die package) that includes a package substrate, a die, an encapsulation layer and a first set of metal layers. The package substrate includes a first surface and a second surface. The die is coupled to the first surface of the package substrate. The encapsulation layer encapsulates the die. The first set of metal layers is coupled to a first exterior surface of the encapsulation layer. In some implementations, the first set of metal layers is configured to operate as a die-to-wire connector of the integrated device package. In some implementations, the integrated device package includes a second set of metal layers coupled to the second surface of the package substrate. In some implementations, the integrated device package includes a second set of metal layers coupled to a second exterior surface of the encapsulation layer. | 10-22-2015 |
20150304059 | FREQUENCY MULTIPLEXER - An apparatus is disclosed that includes a frequency multiplexer circuit coupled to an input node and configured to receive an input signal via the input node. The frequency multiplexer circuit comprises a first filter circuit, a second filter circuit, and a third filter circuit. The apparatus also includes a switching circuit that is configurable to couple at least two of a first output of the first filter circuit, a second output of the second filter circuit, or a third output of the third filter circuit to a single output port. | 10-22-2015 |
20150311275 | EMBEDDED SHEET CAPACITOR - A multilayer capacitor is provided that includes a plurality of vias configured to receive interconnects from a die. | 10-29-2015 |
20150371751 | VERTICAL SPIRAL INDUCTOR - Methods and apparatuses, wherein the method forms a first plurality of vias in a substrate, further comprising forming the first plurality of vias to be substantially the same height. The method forms a plurality of conductive traces external to the substrate and couples the plurality of conductive traces to the first plurality of vias: wherein the plurality of conductive traces and the first plurality of vias comprise a plurality of conductive turns and wherein the plurality of conductive turns are in a spiral configuration substantially within a first plane. | 12-24-2015 |
20160064391 | DYNAMIC RANDOM ACCESS MEMORY CELL INCLUDING A FERROELECTRIC CAPACITOR - A memory cell includes a capacitor that includes a first metal layer and a second metal layer. The capacitor includes a ferroelectric layer disposed between the first metal layer and the second metal layer. The ferroelectric layer is a single layer of a bi-stable asymmetric crystalline material. | 03-03-2016 |
20160093750 | VARACTOR DEVICE WITH BACKSIDE CONTACT - An apparatus includes a varactor having a first contact that is located on a first side of a substrate. The varactor includes a second contact that is located on a second side of the substrate, and the second side is opposite the first side. The apparatus further includes a signal path between the first contact and the second contact. | 03-31-2016 |
20160095208 | DEVICES AND METHODS TO REDUCE STRESS IN AN ELECTRONIC DEVICE - A device includes a stress relief region between at least two stress domains of a substrate (e.g., of a semiconductor die or other integrated circuit). The stress relief region includes a conductive structure electrically coupling circuitries of the stress domains between which the conductive structure is disposed. | 03-31-2016 |
Patent application number | Description | Published |
20090040107 | SMART ANTENNA SUBSYSTEM - The present invention provides several smart antenna devices and methods. The devices and methods incorporate a programmable delay element into each RF pathway, which enables smart antennas to receive not only narrow band signals but also ultra-wide band signals at low cost and low power consumption, while in a highly reliable fashion. The devices and methods therefore enable a low complexity smart antenna receiver as part of a highly reliable, low cost and low power sensor network. | 02-12-2009 |
20090054737 | WIRELESS PHYSIOLOGICAL SENSOR PATCHES AND SYSTEMS - The present invention provides methods, devices, and systems for wireless physiological sensor patches and systems which incorporate these patches. The systems and methods utilize a structure where the processing is distributed asymmetrically on the two or more types of ASIC chips that are designed to work together. The invention also relates to systems comprising two or more ASIC chips designed for use in physiological sensing wherein the ASIC chips are designed to work together to achieve high wireless link reliability/security, low power dissipation, compactness, low cost and support a variety of sensors for sensing various physiological parameters. | 02-26-2009 |
20090100500 | Scalable distributed web-based authentication - Web-based authentication includes receiving a packet in a network switch having at least one associative store configured to forward packet traffic to a first one or more processors of the switch that are dedicated to cryptographic processing if a destination port of the packet indicates a secure transport protocol, and to a second one or more processors of the switch that are not dedicated to cryptographic processing if the destination port does not indicate a secure transport protocol. If a source of the packet is an authenticated user, the packet is forwarded via an output port of the switch, based on the associative store. If the source is an unauthenticated user, the packet is forwarded to the first one or more processors if the destination port indicates a secure transport protocol, and to the second one or more processors if the destination port does not indicate a secure transport protocol. | 04-16-2009 |
20100220723 | METHOD FOR PROVIDING SCALABLE MULTICAST SERVICE IN A VIRTUAL PRIVATE LAN SERVICE - Multicast capability in a virtual private LAN service (VPLS) is provided in a provider IP/MPLS infrastructure without headend replications by encapsulating a customer data packet to use an established multicast protocol, such as IP multicast. In one example, the customer data packet is encapsulated by an IP header having an IP multicast group address and an Ethernet header. In one implementation, a DNS type mechanism is provided to distribute the IP multicast addresses for VPLS use. Such IP multicast group address can be set aside from an administratively scoped address range. An efficient IP routing algorithm running on the provider's network provides an efficient distribution tree for routing IP-encapsulated customer packet for the VPLS. | 09-02-2010 |
20110019595 | METHODS AND APPARATUS TO RETROFIT WIRED HEALTHCARE AND FITNESS SYSTEMS FOR WIRELESS OPERATION - Provided herein is an apparatus for converting a wired sensor system to a wireless sensor system. The apparatus can comprise a relay station comprising at least one antenna and at least one radio. The relay station can be adaptable to be integrated as at least one application specific integrated circuit and further adaptable to convert a wired sensor system into a wireless sensor system. Further provided are systems for converting wired sensor systems into wireless sensor systems and methods of use. | 01-27-2011 |
20110019824 | LOW POWER RADIOFREQUENCY (RF) COMMUNICATION SYSTEMS FOR SECURE WIRELESS PATCH INITIALIZATION AND METHODS OF USE - Provided herein is a wireless healthcare system comprising at least one sensor and a base unit adaptable to be in communication with the sensor. The sensor can be is adaptable to communicate with the base unit at a first power during formation of a communication link and is further adaptable to communicate with the base unit at a second power after the communication link has been formed, and wherein the sensor and base unit are components of a wireless healthcare system. The sensor can be a patch adaptable to be positioned on the surface of a patient. Further provided herein is a method of using the wireless healthcare system and kit. | 01-27-2011 |
20120120952 | METHOD FOR PROVIDING SCALABLE MULTICAST SERVICE IN A VIRTUAL PRIVATE LAN SERVICE - Multicast capability in a virtual private LAN service (VPLS) is provided in a provider IP/MPLS infrastructure without headend replications by encapsulating a customer data packet to use an established multicast protocol, such as IP multicast. In one example, the customer data packet is encapsulated by an IP header having an IP multicast group address and an Ethernet header. In one implementation, a DNS type mechanism is provided to distribute the IP multicast addresses for VPLS use. Such IP multicast group address can be set aside from an administratively scoped address range. An efficient IP routing algorithm running on the provider's network provides an efficient distribution tree for routing IP-encapsulated customer packet for the VPLS. | 05-17-2012 |
20120216254 | Scalable Distributed Web-Based Authentication - Web-based authentication includes receiving a packet in a network switch having at least one associative store configured to forward packet traffic to a first one or more processors of the switch that are dedicated to cryptographic processing if a destination port of the packet indicates a secure transport protocol, and to a second one or more processors of the switch that are not dedicated to cryptographic processing if the destination port does not indicate a secure transport protocol. If a source of the packet is an authenticated user, the packet is forwarded via an output port of the switch, based on the associative store. If the source is an unauthenticated user, the packet is forwarded to the first one or more processors if the destination port indicates a secure transport protocol, and to the second one or more processors if the destination port does not indicate a secure transport protocol. | 08-23-2012 |
20120221849 | Scalable Distributed Web-Based Authentication - Web-based authentication includes receiving a packet in a network switch having at least one associative store configured to forward packet traffic to a first one or more processors of the switch that are dedicated to cryptographic processing if a destination port of the packet indicates a secure transport protocol, and to a second one or more processors of the switch that are not dedicated to cryptographic processing if the destination port does not indicate a secure transport protocol. If a source of the packet is an authenticated user, the packet is forwarded via an output port of the switch, based on the associative store. If the source is an unauthenticated user, the packet is forwarded to the first one or more processors if the destination port indicates a secure transport protocol, and to the second one or more processors if the destination port does not indicate a secure transport protocol. | 08-30-2012 |
20140091947 | Methods and Apparatus to Retrofit Wired Healthcare and Fitness Systems for Wireless Operation - Provided herein is an apparatus for converting a wired sensor system to a wireless sensor system. The apparatus can comprise a relay station comprising at least one antenna and at least one radio. The relay station can be adaptable to be integrated as at least one application specific integrated circuit and further adaptable to convert a wired sensor system into a wireless sensor system. Further provided are systems for converting wired sensor systems into wireless sensor systems and methods of use. | 04-03-2014 |
20150289814 | WIRELESS PHYSIOLOGICAL SENSOR PATCHES AND SYSTEMS - The present invention provides methods, devices, and systems for wireless physiological sensor patches and systems which incorporate these patches. The systems and methods utilize a structure where the processing is distributed asymmetrically on the two or more types of ASIC chips that are designed to work together. The invention also relates to systems comprising two or more ASIC chips designed for use in physiological sensing wherein the ASIC chips are designed to work together to achieve high wireless link reliability/security, low power dissipation, compactness, low cost and support a variety of sensors for sensing various physiological parameters. | 10-15-2015 |
Patent application number | Description | Published |
20080205734 | X-Ray Micro-Tomography System Optimized for High Resolution, Throughput, Image Quality - A projection x-ray imaging system that possibly utilizes a laboratory-based micro-focused x-ray source is disclosed. Techniques for optimizing the system for high quality, three dimensional image formation with tomographic imaging with the potential for high resolution and high throughput are described. It also concerns ways to optimize the system design to obtain improved image quality. | 08-28-2008 |
20080273662 | CD-GISAXS System and Method - CD-GISAXS achieves reduced measurement times by increasing throughput using longer wavelength radiation (˜12×, for example) such as x-rays in reflective geometry to increase both the collimation acceptance angle of the incident beams and the scattering signal strength, resulting in a substantial combined throughput gain. This wavelength selection and geometry can result in a dramatic reduction in measurement time. Furthermore, the capabilities of the CD-GISAXS can be extended to meet many of the metrology needs of future generations of semiconductor manufacturing and nanostructure characterization, for example. | 11-06-2008 |
20120269323 | X-ray source with an immersion lens - An x-ray source is described. During operation of the x-ray source, an electron source emits a beam of electrons. This beam of electrons is focused to a spot on a target by a magnetic focusing lens. In particular, the magnetic focusing lens includes an immersion lens in which a peak in a magnitude of an associated magnetic field occurs proximate to a plane of the target. Moreover, in response to receiving the beam of focused electrons, the target provides a transmission source of x-rays. | 10-25-2012 |
20120269325 | X-ray source with increased operating life - An x-ray source is described. During operation of the x-ray source, an electron source emits a beam of electrons. This beam of electrons is focused to a spot on a target by a magnetic focusing lens. In response to receiving the beam of focused electrons, the target provides a transmission source of x-rays. Moreover, a repositioning mechanism selectively repositions the beam of focused electrons to different locations on a surface of the target based on a feedback parameter associated with operation of the x-ray source. This feedback parameter may be based on: an intensity of the x-rays output by the x-ray source; a position of the x-rays output by the x-ray source; an elapsed time during operation of the x-ray source; a cross-sectional shape of the x-rays output by the x-ray source; and/or a spot size of the x-rays output by the x-ray source. | 10-25-2012 |
20140072104 | X-Ray Microscope System with Cryogenic Handling System and Method - A cartridge-based cryogenic imaging system includes a sample handling system. This system uses a kinematic base and cold interface system that provides vertical loading to horizontally mounted high-precision rotation stages that are able to facilitate automated high-resolution three-dimensional (3D) imaging with computed tomography (CT). Flexible metal braids are used to provide cooling and also allow a large range of rotation. A robotic sample transfer and loading system provides further automation by allowing a number of samples to be loaded and automatically sequentially placed on the sample stage and imaged, These characteristics provide the capability of high-throughput and highly automated cryogenic x-ray microscopy and computed tomography. | 03-13-2014 |
20150092924 | STRUCTURED TARGETS FOR X-RAY GENERATION - We disclose targets for generating x-rays using electron beams, along with their method of fabrication. The targets comprise a number of microstructures fabricated from an x-ray target material arranged in close thermal contact with a substrate such that the heat is more efficiently drawn out of the x-ray target material. This in turn allows irradiation of the x-ray generating substance with higher electron density or higher energy electrons, which leads to greater x-ray brightness, without inducing damage or melting. | 04-02-2015 |
20150110252 | X-RAY SOURCES USING LINEAR ACCUMULATION - We disclose a compact source for high brightness x-ray generation. The higher brightness is achieved through electron beam bombardment of multiple regions aligned with each other to achieve a linear accumulation of x-rays. This may be achieved by aligning discrete x-ray sources, or through the use of novel x-ray targets that comprise a number of microstructures of x-ray generating materials fabricated in close thermal contact with a substrate with high thermal conductivity. This allows heat to be more efficiently drawn out of the x-ray generating material, and in turn allows bombardment of the x-ray generating material with higher electron density and/or higher energy electrons, leading to greater x-ray brightness. | 04-23-2015 |
20150117599 | X-RAY INTERFEROMETRIC IMAGING SYSTEM - We disclose an x-ray interferometric imaging system in which the x-ray source comprises a target having a plurality of structured coherent sub-sources of x-rays embedded in a thermally conducting substrate. The system additionally comprises a beam-splitting grating G | 04-30-2015 |
20150194287 | X-ray illuminators with high flux and high flux density - This disclosure presents systems for x-ray illumination that have an x-ray brightness several orders of magnitude greater than existing x-ray technologies. These may therefore useful for applications such as trace element detection or for micro-focus fluorescence analysis. | 07-09-2015 |
20150243397 | X-RAY INTERFEROMETRIC IMAGING SYSTEM - An x-ray interferometric imaging system in which the x-ray source comprises a target having a plurality of structured coherent sub-sources of x-rays embedded in a thermally conducting substrate. The system additionally comprises a beam-splitting grating G | 08-27-2015 |
20150247811 | X-RAY SURFACE ANALYSIS AND MEASUREMENT APPARATUS - This disclosure presents systems for total reflection x-ray fluorescence measurements that have x-ray flux and x-ray flux density several orders of magnitude greater than existing x-ray technologies. These may therefore useful for applications such as trace element detection and/or for total-reflection fluorescence analysis. | 09-03-2015 |
20150260663 | X-RAY METHOD FOR THE MEASUREMENT, CHARACTERIZATION, AND ANALYSIS OF PERIODIC STRUCTURES - Periodic spatial patterns of x-ray illumination are used to gather information about periodic objects. The structured illumination may be created using the interaction of a coherent or partially coherent x-ray source with a beam splitting grating to create a Talbot interference pattern with periodic structure. The object having periodic structures to be measured is then placed into the structured illumination, and the ensemble of signals from the multiple illumination spots is analyzed to determine various properties of the object and its structures. Applications to x-ray absorption/transmission, small angle x-ray scattering, x-ray fluorescence, x-ray reflectance, and x-ray diffraction are all possible using the method of the invention. | 09-17-2015 |
20150357069 | HIGH BRIGHTNESS X-RAY ABSORPTION SPECTROSCOPY SYSTEM - This disclosure presents systems for x-ray absorption fine structure (XAFS) measurements that have x-ray flux and flux density several orders of magnitude greater than existing compact systems. These are useful for laboratory or field applications of x-ray absorption near-edge spectroscopy (XANES) or extended x-ray fine absorption structure (EXFAS) spectroscopy. | 12-10-2015 |
20160064175 | STRUCTURED TARGETS FOR X-RAY GENERATION - Disclosed are targets for generating x-rays using electron beams and their method of fabrication. They comprise a number of microstructures fabricated from an x-ray target material arranged in close thermal contact with a substrate such that the heat is more efficiently drawn out of the x-ray target material. This allows irradiation of the x-ray generating substance with higher electron density or higher energy electrons, leading to greater x-ray brightness, without inducing damage or melting. The microstructures may comprise conventional x-ray target materials (such as tungsten) that are patterned at micron-scale dimensions on a thermally conducting substrate, such as diamond. The microstructures may have any number of geometric shapes to best generate x-rays of high brightness and efficiently disperse heat. In some embodiments, the target comprising microstructures may be incorporated into a rotating anode geometry, to enhance x-ray generation in such systems. | 03-03-2016 |
20160066870 | X-RAY INTERFEROMETRIC IMAGING SYSTEM - An x-ray interferometric imaging system in which the x-ray source comprises a target having a plurality of structured coherent sub-sources of x-rays embedded in a thermally conducting substrate. The structures may be microstructures with lateral dimensions measured on the order of microns, and in some embodiments, the structures are arranged in a regular array. | 03-10-2016 |