Patent application number | Description | Published |
20080256379 | Clock architecture for multi-processor systems - In one embodiment, a computer system, comprises at least a first computing cell and a second computing cell, each computing cell comprising at least one processor, a routing device to couple the first and second computing cells, a global clock signal source coupled to the at least two computing cells to generate a global clock signal, at least one timing manager to generate a timing control signal, wherein the at least two computing cells comprise a local oscillator to generate a local clock signal, and a multiplexer coupled to receive the global clock signal, the local clock signal, and the timing control signal, and to output one of the global clock signal or the local clock signal in response to the control signal. | 10-16-2008 |
20090083505 | System and Method for Achieving Protected Region Within Computer System - A system and method for achieving one or more protected regions within a computer system having multiple partitions are disclosed. In at least some embodiments, the system includes an intermediary device for use within the computer system having the multiple partitions. The intermediary device includes a fabric device, and a first firewall device capable of limiting communication of a signal based upon at least one of a source of the signal and an intended destination of the signal, the first firewall device being at least indirectly coupled to the fabric device. The intermediary device further includes a first conversion device that is one of integrated with the first firewall device and distinct from the first firewall device, and that is capable of converting between a processor address and a fabric address for use by the fabric device. In some embodiments, the various devices each include Control and Status Registers (CSRs). | 03-26-2009 |
20090089787 | Method and System for Migrating Critical Resources Within Computer Systems - A method and system for migrating at least one critical resource during a migration of an operative portion of a computer system are disclosed. In at least some embodiments, the method includes (a) sending first information constituting a substantial copy of a first of the at least one critical resource via at least one intermediary between a source component and a destination component. The method further includes (b) transitioning a status of the destination component from being incapable of receiving requests to being capable of receiving requests, and (c) re-programming an abstraction block to include modified addresses so that at least one incoming request signal is forwarded to the destination component rather than to the source component. | 04-02-2009 |
20090138733 | System and Method for Throttling Memory Power Consumption - A power throttling method and system for a memory controller in a computer system comprising a power supply module including a plurality of bulk power supplies (“BPSs”) are described. In one embodiment, each of the at BPSs provides to a power output monitor a status signal indicative of a status thereof. Responsive to receipt of the status signals, the power output monitor determines whether a bulk power supply capacity is below system power requirements. Responsive to a positive determination, the power output monitor drives a throttle control signal to the memory controller to a level indicative of an over-threshold state. | 05-28-2009 |
Patent application number | Description | Published |
20090037162 | DATACENTER WORKLOAD MIGRATION - A method is provided for evaluating workload migration from a target computer in a datacenter. The method includes tracking the number of power cycles occurring for a plurality of computers located within the datacenter and generating power cycling information as a result of the tracking. The method further includes determining whether to power cycle the target computer based on the power cycling information. | 02-05-2009 |
20090083467 | Method and System for Handling Interrupts Within Computer System During Hardware Resource Migration - A method and system for handling interrupts within a computer system during hardware resource migration are disclosed. In at least some embodiments, the method includes (a) programming an address conversion component so that incoming interrupt signals are directed to a control component rather than to a source processing resource, and (b) accumulating the incoming interrupt signals at the control component. Additionally the method also includes, subsequent to the migration of the partition from the source processing resource to a destination processing resource, (c) sending the accumulated incoming interrupt signals to the destination processing resource, and (d) reprogramming the address conversion component so that further incoming interrupt signals are directed to the destination processing resource. | 03-26-2009 |
20090113171 | TPM DEVICE FOR MULTI-PROCESSOR SYSTEMS - In one embodiment, a computer system comprises at least a first computing cell and a second computing cell, each computing cell comprising at least one processor, at least one programmable trusted platform management device coupled to the processor via a hardware path which goes through at least one trusted platform management device controller which manages operations of the at least one programmable trusted platform device, and a routing device to couple the first and second computing cells. | 04-30-2009 |
20130188647 | COMPUTER SYSTEM FABRIC SWITCH HAVING A BLIND ROUTE - A fabric switch includes ports, a blind route determination function component, a location function component, and a routing function component. Packets are received and forwarded via the ports. The blind route determination function component determines whether a port at which a packet is received is configured for a blind route, the location function component provides for determining a location of routing information within the packet based at least in part on the input port at which the packet was received if a blind route is not defined for the port. The routing function component provides for determining an output port as a routing function based at least in part on the contents of the location, or the existence of a blind route. | 07-25-2013 |
20140002988 | BLADE COMPUTER SYSTEM | 01-02-2014 |
20140089726 | DETERMINING WHETHER A RIGHT TO USE MEMORY MODULES IN A RELIABILITY MODE HAS BEEN ACQUIRED - Examples disclosed herein relate to determining whether a right to use memory modules in a reliability mode has been acquired. Examples include determining whether the right to use a plurality of memory modules in a reliability mode has been acquired, if a performance mode is selected for operation of the plurality of memory modules. | 03-27-2014 |
20150052293 | HIDDEN CORE TO FETCH DATA - A computing device includes a home node controller to couple a home processor socket to the computing device. The home processor socket includes a home core hidden from the computing device and the home core fetches data to a home cache of the home processor socket. The computing device includes a source processor socket including a source core to request for data and the home node controller forwards requested data from the home cache to the source core if the requested data is included on the home cache. | 02-19-2015 |