Patent application number | Description | Published |
20090099392 | METHOD FOR PRODUCING 3-METHYL-1,5-PENTANEDIOL - Provided is a method for producing 3-methyl-1,5-pentanediol by hydrogenating 2-hydroxy-4-methyltetrahydropyran in the presence of a hydrogenation catalyst, characterized in that the hydrogenation is further carried out in the presence of a basic compound. By this method, in producing MPD by hydrogenation of MHP, high-purity MPD can be produced by effectively suppressing generation of by-products such as MPAE and MVL even when a known hydrogenation catalyst is used. | 04-16-2009 |
20100063314 | PROCESS FOR PRODUCING 2-ISOPROPENYL-5-METHYL-4-HEXENE-1-YL-3-METHYL-2-BUTENOATE - Provided is a method capable of solving the problems associated with production of LVSA, which is a pheromone produced by female pest mealybugs, and is useful as an agrochemical pest, at an industrial large scale, and producing LVSA in a high yield. Specifically, the present invention provides a production method of 2-isopropenyl-5-methyl-4-hexen-1-yl 3-methyl-2-butenoate, comprising reacting senecioic acid with a halogenating agent to give senecioic acid halide, reacting the obtained senecioic acid halide with 2-isopropenyl-5-methyl-4-hexen-1-ol in the presence of an organic base compound and heat treating the obtained crude 2-isopropenyl-5-methyl-4-hexen-1-yl 3-methyl-2-butenoate in the presence of a basic substance at 50-250° C. | 03-11-2010 |
Patent application number | Description | Published |
20140066800 | AIRWAY ADAPTOR, BIOLOGICAL INFORMATION ACQUIRING SYSTEM, AND OXYGEN MASK - An airway adaptor includes: a gas passage into which a respiratory gas of a subject is to flow; a respiratory gas introducing portion which is configured to guide the respiratory gas expired from at least one of nostrils and a mouth of the subject, to the gas passage; and an airway case on which a temperature sensor that is configured to detect a temperature change of the respiratory gas flowing into the gas passage is mountable. | 03-06-2014 |
20150342502 | METHOD OF PRODUCING TEMPERATURE SENSOR, AND TEMPERATURE SENSOR - A method of producing a temperature sensor which is configured to detect a temperature change of a respiratory gas of a subject, includes: preparing a rod-like heat sensitive element which includes a heat sensitive portion in a tip end portion; placing the heat sensitive portion in a cavity of a mold; injecting a resin material into the cavity to mold a protective portion which covers the heat sensitive element; and releasing the tip end portion in which the protective portion is formed, from the mold. | 12-03-2015 |
20160089036 | SENSOR AND BIOLOGICAL SIGNAL MEASURING SYSTEM - A biological signal measuring system includes a sensor and a biological signal measuring apparatus configured to calculate a blood refill time of a living tissue of a subject. The sensor includes a pressure applying portion configured to apply pressure on the living tissue, a light emitter configured to emit light toward the living tissue, a light receiver configured to receive reflected light or transmitted light from the living tissue, a first light transmitting member made of a light transmitting material and having one side contacting the light emitter and the other side arranged to contact the subject, a second light transmitting member made of a light transmitting material and having one side contacting the light receiver and the other side arranged to contact the subject, and a light blocking member configured to block light between the light emitter and the light receiver. | 03-31-2016 |
Patent application number | Description | Published |
20110177355 | AL ALLOY MEMBER, ELECTRONIC DEVICE MANUFACTURING APPARATUS, AND METHOD OF MANUFACTURING AN ANODIC OXIDE FILM COATED AL ALLOY MEMBER - Provided is an Al alloy member with an excellent mechanical strength that is sufficient for use in large-scale manufacturing apparatuses. The Al alloy member is characterized in that, in mass %, Mg concentration is 5.0% or less, Ce concentration is 15% or less, Zr concentration is 0.15% or less, the balance comprises Al and unavoidable impurities, the elements of the unavoidable impurities are respectively 0.01% or less, and the Vickers hardness of the Al alloy member is greater than 30. | 07-21-2011 |
20150053566 | STAMPER, METHOD FOR PRODUCING THE SAME, METHOD FOR PRODUCING MOLDED MATERIAL, AND PROTOTYPE ALUMINUM MOLD FOR STAMPER - Disclosed herein are a stamper which has anodized alumina formed on the surface thereof and which will not cause macroscopic unevenness or color unevenness on the transcribed surface; a method for producing the same; and a method for producing a molded material without macroscopic unevenness or color unevenness on the transcribed surface thereof by using such a stamper. The stamper includes alumina which has a microasperity structure and which is formed by anodization on the surface of a prototype aluminum mold having an aluminum purity of 99.5% or more, an average crystal-grain diameter of 1 mm or less, and an arithmetic mean surface roughness Ra of 0.05 μm or less. The use of this stamper enables the production of a molded material which does not have macroscopic unevenness or color unevenness on the transcribed surface thereof and which is suitable for use as an antireflection article and the like. | 02-26-2015 |
Patent application number | Description | Published |
20100122108 | ARITHMETIC UNIT AND ARITHMETIC PROCESSING METHOD - There is a need for providing a battery-less integrated circuit (IC) card capable of operating in accordance with a contact usage or a non-contact usage, preventing coprocessor throughput from degrading despite a decreased clock frequency for reduced power consumption under non-contact usage, and ensuring high-speed processing under non-contact usage. A dual interface card is a battery-less IC card capable of operating in accordance with a contact usage or a non-contact usage. The dual interface card operates at a high clock under contact usage and at a low clock under non-contact usage. A targeted operation comprises a plurality of different basic operations. The dual interface card comprises a basic arithmetic circuit group. Under the contact usage, the basic arithmetic circuit group performs one basic operation of the targeted operation at one cycle. Under the non-contact usage, the basic arithmetic circuit group sequentially performs at least two basic operations of the targeted operation at one cycle. | 05-13-2010 |
20110022852 | CRYPTOGRAPHIC COMPUTATION APPARATUS, CRYPTOGRAPHIC COMPUTATION PROGRAM, AND STORAGE MEDIUM - A flowchart shows a general processing procedure of cryptographic computation executed by a cryptographic computation apparatus | 01-27-2011 |
20120198211 | ARITHMETIC UNIT AND ARITHMETIC PROCESSING METHOD FOR OPERATING WITH HIGHER AND LOWER CLOCK FREQUENCIES - There is a need for providing a battery-less integrated circuit (IC) card capable of operating in accordance with a contact usage or a non-contact usage, preventing coprocessor throughput from degrading despite a decreased clock frequency for reduced power consumption under non-contact usage, and ensuring high-speed processing under non-contact usage. A dual interface card is a battery-less IC card capable of operating in accordance with a contact usage or a non-contact usage. The dual interface card operates at a high clock under contact usage and at a low clock under non-contact usage. A targeted operation comprises a plurality of different basic operations. The dual interface card comprises a basic arithmetic circuit group. Under the contact usage, the basic arithmetic circuit group performs one basic operation of the targeted operation at one cycle. Under the non-contact usage, the basic arithmetic circuit group sequentially performs at least two basic operations of the targeted operation at one cycle. | 08-02-2012 |
20140068231 | CENTRAL PROCESSING UNIT AND ARITHMETIC UNIT - There is a need to provide a central processing unit capable of improving the resistance to power analysis attack without changing programs, lowering clock frequencies, and greatly redesigning a central processing unit of the related art. In a central processing unit, an arithmetic unit is capable of performing arithmetic operation using data irrelevant to data stored in a register group. A control unit allows the arithmetic unit to perform arithmetic processing corresponding to an incorporated instruction. At this time, the control unit allows the arithmetic unit to perform arithmetic processing using the irrelevant data during a first one-clock cycle. | 03-06-2014 |
20150338878 | ARITHMETIC UNIT AND ARITHMETIC PROCESSING METHOD FOR OPERATING WITH HIGHER AND LOWER CLOCK FREQUENCIES - There is a need for providing a battery-less integrated circuit (IC) card capable of operating in accordance with a contact usage or a non-contact usage, preventing coprocessor throughput from degrading despite a decreased clock frequency for reduced power consumption under non-contact usage, and ensuring high-speed processing under non-contact usage. A dual interface card is a battery-less IC card capable of operating in accordance with a contact usage or a non-contact usage. The dual interface card operates at a high clock under contact usage and at a low clock under non-contact usage. A targeted operation comprises a plurality of different basic operations. The dual interface card comprises a basic arithmetic circuit group. Under the contact usage, the basic arithmetic circuit group performs one basic operation of the targeted operation at one cycle. Under the non-contact usage, the basic arithmetic circuit group sequentially performs at least two basic operations of the targeted operation at one cycle. | 11-26-2015 |
Patent application number | Description | Published |
20140091571 | Wind Turbine System - A wind turbine system includes a tower, a nacelle which is supported on the tower, a plurality of blades which are rotatably supported to the nacelle via a hub, and a generator which generates electricity by rotating the blades, wherein in case the tower shifts from vertical direction, the wind turbine system is controlled so that a force with an opposite direction to the tower shifting direction is added by wind. | 04-03-2014 |
20140308129 | Wind Power Generation System - Provided is a wind power generation system that is less likely to change its cooling performance depending on the wind direction. In order to solve the above problem, the wind power generation system of the invention includes blades adapted to rotate upon receiving wind, a generator for performing a power generating operation by rotating a rotor together with rotation of the blades, a nacelle for supporting the blades via a main shaft, a tower for rotatably supporting the nacelle, a power conditioning system or transformer accommodated in the tower, and a plurality of radiators disposed on an outer peripheral side of the tower for cooling the power conditioning system or the transformer. The radiators positioned substantially at the same height are arranged at substantially equal intervals in a circumferential direction of the tower. | 10-16-2014 |
20140310958 | Assembly Method of Wind Power Generation System - Provided is an assembly method of a wind power generation system that can enhance the safety of an assembly work, and which can reduce a working time. In order to solve the above problem, the assembly method of a wind power generation system of the present invention includes assembly of the wind power generation system which includes a rotor with a hub and blades, a nacelle for accommodating therein at least a generator connected to the rotor via a main shaft connected to the hub, and a tower supporting the nacelle on a top portion thereof, and having an opposite side thereof to the top portion fixed to a foundation, the tower including separated tower parts. When assembling the wind power generation system, the nacelle and the tower are laterally assembled together by using a carriage, and the rotor is fixed to the laterally-facing nacelle. | 10-23-2014 |
20150064007 | Wind Power Generation System - A wind power generation system according to the invention includes: blades configured to receive wind to rotate; a nacelle supporting a load from the blades; a tower supporting the nacelle; a hub supporting the blades and configured to be rotated with the blades; a rotary main shaft configured to be rotated with the rotation of the hub; a gearbox connected to the rotary main shaft and configured to increase a speed of the rotation; and a generator configured to be driven at the rotation speed increased by the gearbox. The rotary main shaft is connected directly to the hub. | 03-05-2015 |
Patent application number | Description | Published |
20090147813 | LIGHT-EMITTING DEVICE AND METHOD FOR PRODUCING LIGHT EMITTING DEVICE - A method for producing a light-emitting device, includes: performing, on a first substrate made of III-V group compound semiconductor, crystal growth of a laminated body including an etching easy layer contiguous to the first substrate and a light-emitting layer made of nitride semiconductor; bonding a second substrate and the laminated body; and detaching the second substrate provided with the light-emitting layer from the first substrate by, one of removing the etching easy layer by using a solution etching method, and removing the first substrate and the etching easy layer by using mechanical polishing method. | 06-11-2009 |
20100065813 | LIGHT EMITTING DEVICE - A light emitting device includes a stacked body including at least a light emitting layer made of In | 03-18-2010 |
20120032222 | LIGHT-EMITTING DEVICE AND METHOD FOR PRODUCING LIGHT EMITTING DEVICE - A method for producing a light-emitting device, includes: performing, on a first substrate made of III-V group compound semiconductor, crystal growth of a laminated body including an etching easy layer contiguous to the first substrate and a light-emitting layer made of nitride semiconductor; bonding a second substrate and the laminated body; and detaching the second substrate provided with the light-emitting layer from the first substrate by, one of removing the etching easy layer by using a solution etching method, and removing the first substrate and the etching easy layer by using mechanical polishing method. | 02-09-2012 |
20120104357 | LIGHT EMITTING DEVICE - A light emitting device includes a stacked body including at least a light emitting layer made of In | 05-03-2012 |
20120175590 | LIGHT-EMITTING DEVICE AND METHOD FOR PRODUCING LIGHT EMITTING DEVICE - A method for producing a light-emitting device, includes: performing, on a first substrate made of III-V group compound semiconductor, crystal growth of a laminated body including an etching easy layer contiguous to the first substrate and a light-emitting layer made of nitride semiconductor; bonding a second substrate and the laminated body; and detaching the second substrate provided with the light-emitting layer from the first substrate by, one of removing the etching easy layer by using a solution etching method, and removing the first substrate and the etching easy layer by using mechanical polishing method. | 07-12-2012 |
Patent application number | Description | Published |
20120234931 | EXPANSION VALVE - An expansion valve is configured such that a shaft, a first valve, a second valve, a compression coil spring, and an adjustment screw are coaxially arranged within a body exactly below a power element, and the first valve and the second valve control the flow rate in an interlocked manner. A second valve seat of the second valve is press-fitted into the body, and an amount of press-fitting of the second valve seat into the body is adjusted such that when the first valve is in a closed state in which a first valve element is seated on a first valve seat, the second valve is in a closed state in which a second valve element is seated on the second valve seat. | 09-20-2012 |
20140130916 | COMPOSITE VALVE - A control valve according to an exemplary embodiment includes an interlocking mechanism that achieves a first operation and a second operation simultaneously or continuously. In the first operation, a sub-valve is opened by having an actuating rod displaced integrally with a sub-valve element in accordance with the magnitude of solenoidal force. In the second operation, a load, by which to bias a main valve element in a closing direction of a main valve, is increased by displacing the actuating rod relative to the main valve element. | 05-15-2014 |
20140318164 | AUTOMOTIVE AIR CONDITIONER AND EXPANSION VALVE - A first expansion valve is provided in a first refrigerant circulation passage through which the refrigerant discharged from a compressor is able to circulate by passing sequentially through an external heat exchanger and an evaporator and returning to the compressor. A second expansion valve is provided in a second refrigerant circulation passage through which the refrigerant discharged from the compressor is able to circulate by passing sequentially through an auxiliary condenser and the external heat exchanger and returning to the compressor. The second expansion valve regulates the valve opening degree such that the refrigerant state at an inlet side of the compressor during a heating operation is in a range where the dryness of refrigerant is greater than or equal to 0.9 and the superheat of refrigerant is less than or equal to 5° C. | 10-30-2014 |
20150096630 | ELECTROMAGNETIC VALVE - An electromagnetic valve according to one embodiment includes a driven member configured such that a piston and a valve element are vertically coupled with each other and configured such that a pilot passage runs through the driven member. Here, the piston separates a high-pressure chamber from a back pressure chamber. The valve element opens and closes a main valve by moving toward and away from a valve hole. The pilot passage communicates between a low-pressure chamber and the back pressure chamber. A communicating path, through which the high-pressure chamber and the back pressure chamber communicate with each other, is formed in the piston. The communicating path is formed such that an orifice, which is open to the back pressure chamber, and a communication hole, having a larger cross section than that of the orifice, are vertically connected with each other. The orifice is located above the communication hole. | 04-09-2015 |
Patent application number | Description | Published |
20090119450 | MEMORY DEVICE, MEMORY MANAGEMENT METHOD, AND PROGRAM - A memory device includes a non-volatile memory which allows data to be written, read, and erased electrically and in which writing and reading are done in units of a page and erasing is done in units of a block including a plurality of pages, and a control section that manages access to the non-volatile memory. The control section performs management of access to the non-volatile memory by performing logical address-physical address translation (logical-physical translation) in translation units (TUs) each being an integer fraction of a size of the block and an integer multiple of a page size. | 05-07-2009 |
20120166713 | ADMINISTRATION DEVICE, ADMINISTRATION METHOD, AND PROGRAM - An administration device includes an administration section. The administration section administers writing, reading, and erasing of data in a nonvolatile memory, in which the data can be electrically written, read, and erased and the writing and the reading are performed on a page-by-page basis and the erasing is performed on a block-by-block basis, by translating a logical address into a physical address on a per translation unit basis; and performs fold processing of increasing unwritten physical translation units by the number of written invalid physical translation units, which are contained in a block of a copy source, by copying data of written valid physical translation units among the contents of the block into a block, in which the unwritten physical translation units reside, and by erasing the block of the copy source. | 06-28-2012 |
20120215964 | MANAGEMENT DEVICE AND MANAGEMENT METHOD - There is provided a management device including a management unit that manages a nonvolatile memory configured to allow data to be written, read, or erased electrically, allow writing and reading to be performed in units of a page, and allow erasing to be performed in units of a block including a plurality of pages. The management unit divides a plurality of physical blocks of the nonvolatile memory into a virtual area including virtual blocks corresponding to the physical blocks, and an alternate area including alternate blocks for replacing defective physical blocks in the virtual area, manages the nonvolatile memory in management units of three stages including management of the physical blocks, management of the virtual blocks, and management of extended blocks, and writes to the nonvolatile memory first, second, and third management information for use in the management of the physical blocks, the virtual blocks, and the extended blocks, respectively. | 08-23-2012 |
20120239884 | MEMORY CONTROL DEVICE, MEMORY DEVICE, MEMORY CONTROL METHOD, AND PROGRAM - There is provided a memory control device including a device driver that executes writing or reading of data to/from a main storage unit and temporary writing or reading of data to/from a cache unit including a plurality of cache blocks, and a control unit that issues an instruction for writing or reading of data of a file system to/from the main storage unit or the cache unit to the device driver. The control unit may notify priority information about a priority for data storage into a logical block to which the cache block is associated to the device driver. | 09-20-2012 |
20130326123 | MEMORY MANAGEMENT DEVICE AND METHOD, AND PROGRAM - There is provided a memory management device including a non-volatile memory that performs writing and reading of data on a per-page basis, and performs erasing on a per-block basis, and a control unit that manages a data process in the non-volatile memory by performing logical-physical translation on a per-translation unit (TU) basis, and performs a fold process. The control unit sets data of a physical TU corresponding to unnecessary logical TU information to be excluded from a copy target in the fold process based on the unnecessary logical TU information, the unnecessary logical TU information being notified of by a file system and representing a logical TU corresponding to a physical TU in which unnecessary data is physically written. | 12-05-2013 |
20140181378 | CONTROL DEVICE, CONTROL METHOD, AND PROGRAM - There is provided a control device including, a reading and writing control unit configured to control writing and reading of data on and from a non-volatile memory that has a plurality of blocks each set to be a unit for performing erasure of data. The non-volatile memory stores order information indicating an order of the blocks in which data is to be written. The reading and writing control unit selects a writing target block that is a target block for writing of data according to the order indicated by the order information, and writes data in the selected writing target block. | 06-26-2014 |
Patent application number | Description | Published |
20090036215 | GO PLAYING SYSTEM - A go playing system enabling the players to play go over a network. The system comprises player information storage means, dan/kyu grade information storage means, play processing means, point computing means for computing an increase/decrease of the points of each player according to the win or loss of the play with a basic point, point reporting means for reporting an increase or decrease of the points due to the win or loss to each player terminal point updating means for storing the new points corresponding to the win/loss in the player information storage means, dan/kyu grade changing means for changing the dan/kyu grade of the winner and the loser by comparing their points with the dan/kyu promotion point and dan/kyu demotion point, and dan/kyu grade reporting means for reporting the change of the dan/kyu grade to the player terminal used by the player if the dan/kyu grade of the player is changed by the dan/kyu grade changing means. | 02-05-2009 |
20140335925 | LIFE AND DEATH JUDGEMENT SYSTEM FOR GO GAME - Provided is a life and death judgment system for a go game played with a computer, having an input reception unit that receives an input, a life and death judgment processing unit that judges whether judgment subject stones or target stones are alive, and an output processing unit that outputs the result of the life and death judgment. The life and death judgment processing unit tentatively determines the priority of a move at each point when processing life and death judgment in a predetermined judgment realm, judges a point of a move with a high possibility and/or a move with a low possibility of giving a result of the life and death judgment, changes the priority of the point of the move at each tentatively determined point, and undertakes the move of each stone in accordance with the priority after such change, thereby processing the life and death judgment. | 11-13-2014 |
Patent application number | Description | Published |
20140233255 | HEADLAMP DEVICE FOR AUTOMOBILE - A headlamp device of a vehicle is configured as follows: A headlamp housing | 08-21-2014 |
20150132779 | Method for Determining Ubiqutin Chain Length - Protein ubiquitylation, an essential post-translational modification, regulates almost every cellular process including protein degradation, protein trafficking, signal transduction, and DNA damage response in eukaryotic cells. The diverse functions of ubiquitylation are thought to be mediated by distinct chain topologies resulting from eight different ubiquitin linkages, chain lengths, and complexities. Currently, ubiquitin linkages are generally thought to be a critical determinant of ubiquitin signaling. However, ubiquitin chain lengths, another key element of ubiquitin signaling, have not been well documented especially in vivo situation during past three decades from the discovery of ubiquitin. The reason of this was simply because no method has been available for determination of ubiquitin chain length in endogenous ubiquitylated substrates. In the present invention, a practical technique for determining the actual length of substrate-attached polyubiquitin chains from biological samples is established. Using the method, the mean length of substrate-attached polyubiquitin chains was determined and the robustness of ubiquitin chain length regulation in cells is investigated. The following is a summary of findings in this invention: 1. A method for determining ubiquitin chain length was developed and this method was named ‘ubiquitin protection from trypsinization’ (Ub-ProT). 2. Using Ub-ProT, it was determined that the mean length of substrate-attached ubiquitin chains is in the dimer to decamer range. 3. By quantitative proteomics, it was found that the mean lengths of five major types of ubiquitin chains can be divided into two groups. 4. Proteasome-inhibition did not alter the mean length of substrate-attached polyubiquitin chains, indicating that cells have a robust system for regulating ubiquitin chain length. | 05-14-2015 |
Patent application number | Description | Published |
20080237892 | Semiconductor device - A semiconductor device having a first rectangular chip on which wires, electrode pads and chip mounting area are provided, a first dame formed on the first rectangular chip around the electrode pads and the chip mounting area so as to cover the wires and an under fill formed by filling liquid resin between a second rectangular chip mounted on the chip mounting area in a flip-chip manner and the first rectangular chip. | 10-02-2008 |
20080237895 | Semiconductor device - The invention provides a semiconductor device including a rectangular chip provided on a mounting region of a substrate, a liquid resin layer provided under the rectangular chip and on a side surface of the chip, and a plurality of dams formed on the substrate so as to extend along the side surface of the rectangular chip. The configuration allows the semiconductor device to be provided with the substrate having a reduced size which is achieved by preventing a liquid resin from flowing out. | 10-02-2008 |
20090031563 | Rearrangement sheet, semiconductor device and method of manufacturing thereof - There are provided a semiconductor device construction having more degrees of design freedom of the semiconductor element than prior arts, and a method of manufacturing such device easily and at low cost. For this purpose, a rearrangement sheet is employed provided with an insulating sheet and conductive metallic patterns formed on this insulating sheet. | 02-05-2009 |
20090155953 | Semiconductor device fabricating method and fabricating apparatus - Respective attracting openings of a bonding head are disposed so as to avoid joining regions at which bump electrodes (obverse electrodes) of a semiconductor chip are joined with bump electrodes of a package substrate. Bump electrodes (reverse electrodes) that are connected to the bump electrodes are provided at a reverse side of the semiconductor chip at positions opposing the bump electrodes. Because the attracting openings do not overlap the joining regions, the bump electrodes (reverse electrodes) are not suctioned at the joining regions. | 06-18-2009 |
20100248450 | METHOD OF PRODUCING SEMICONDUCTOR DEVICE - A method of producing a semiconductor device includes: a dicing step of dicing a wafer member using a dicing blade to form a cut portion in the wafer member, in which the wafer member is formed of a wafer portion, a glass substrate, and an adhesive layer for bonding the wafer portion and the glass substrate in a thickness direction of the wafer member so that the cut portion penetrates the wafer portion and the adhesive layer and reaches a part of the glass substrate; and an individual piece dividing step of dividing the wafer member into a plurality of semiconductor devices with the cut portion as a fracture initiation portion. | 09-30-2010 |
20100320581 | Semiconductor device - The invention provides a semiconductor device including a rectangular chip provided on a mounting region of a substrate, a liquid resin layer provided under the rectangular chip and on a side surface of the chip, and a plurality of dams formed on the substrate so as to extend along the side surface of the rectangular chip. The configuration allows the semiconductor device to be provided with the substrate having a reduced size which is achieved by preventing a liquid resin from flowing out. | 12-23-2010 |
20110258849 | Semiconductor device fabricating method and fabricating apparatus - Respective attracting openings of a bonding head are disposed so as to avoid joining regions at which bump electrodes (obverse electrodes) of a semiconductor chip are joined with bump electrodes of a package substrate. Bump electrodes (reverse electrodes) that are connected to the bump electrodes are provided at a reverse side of the semiconductor chip at positions opposing the bump electrodes. Because the attracting openings do not overlap the joining regions, the bump electrodes (reverse electrodes) are not suctioned at the joining regions. | 10-27-2011 |
Patent application number | Description | Published |
20110161644 | INFORMATION PROCESSOR - When a plurality of OSs are mounted, it is desirable to efficiently use memory resources without affecting other OSs. Also, even if the OSs are different from each other, they are mounted on one system, and therefore, inter-OS communication is required. In this case, data communication without affecting other OSs is required. Accordingly, an information processor includes: a firmware for assigning a first central processing unit, a first operating system, and a first region being a partial region of a memory as a first domain, assigning a second central processing unit, a second operating system, and a second region being a partial region of the memory as a second domain, and controlling to disable an access of one domain to a region assigned for the other domain; and a middleware for controlling a communication when the data communication is required between the first domain and the second domain. Further, when a sharable code is available in the operating systems, the code is stored in a region of the memory to which only a read access of each domain is enabled. Still further, when the communication is executed between the domains, with a state that the access to the memory region for the communication is limited by the middleware and the firmware, each domain accesses the region. | 06-30-2011 |