Patent application number | Description | Published |
20080209389 | Method, System and Program Product Supporting Sequential Encoding for Relational Analysis (SERA) of a Software Model - A method of verifying a software system includes receiving a description of a software system described utilizing a high-level modeling language, and responsive thereto, parsing the description and constructing an abstract syntax graph. The abstract syntax graph is transformed into a sequential logic representation of the software system, and following the transforming, the software system is verified based upon the sequential logic representation. Following verification, results of verification of the software system are output. | 08-28-2008 |
20080270086 | PREDICATE-BASED COMPOSITIONAL MINIMIZATION IN A VERIFICATION ENVIRONMENT - A system for performing verification includes a means for: importing a design netlist containing component(s), computing output function(s) for the component(s), generating output equivalent state set(s) from the output function(s), identifying next-state function(s) for the component(s), means for producing image equivalent state set(s) for the next-state function(s), means for classifying output-and-image equivalent state set(s) for the image equivalent state set(s) and the output equivalent state set(s), getting a preimage from the next-state function(s) and the output-and-image equivalent state(s) to generate a preimage of the output-and-image equivalent state(s), partitioning over original state(s) of the component(s), and equivalent class input set(s) of the component(s). Moreover, the system includes a means for: selecting input representative(s) of the equivalent input set(s), forming an input map from the input representative(s), synthesizing the input map, and injecting the input map back into the netlist to generate a modified netlist. | 10-30-2008 |
20090193390 | TECHNIQUES FOR MODELING VARIABLES IN SUBPROGRAMS OF HARDWARE DESCRIPTION LANGUAGE PROGRAMS - A method, system and computer program product for modeling variables in subprograms of a HDL program. A subprogram is provided with an initial value of a variable of an element being modeled and the subprogram is stored in memory of a data processing system. In response to a subprogram call, a copy of the stored subprogram is provided to the requesting HDL program. During execution, the initial value of the variable in the provided copy of the subprogram may be modified by the HDL program, but the value retains unchanged in the stored subprogram. | 07-30-2009 |
20100058256 | CO-OPTIMIZATION OF EMBEDDED SYSTEMS UTILIZING SYMBOLIC EXECUTION - Co-Optimization utilizing Symbolic Execution (COSE) works across components of an embedded design to optimize structures therein. COSE utilizes symbolic execution (SE) to analyze software components and defines a limited set of values that software feeds hardware as constraints. SE explores substantially all possible paths of execution of the code specifying a component. It accomplishes this by accumulating path conditions (PCs) and annotating them to the corresponding segments of the component. A PC is associated with a branch of code and consists of the conjunction of conditions over input and state variables necessary and sufficient for the branch to execute. These PCs define constraints that limit the set of values that software feeds hardware. These constraints are then propagated across the networks of the design and employ static analysis techniques such as constant propagation, redundancy removal, and don't care optimizations to reduce the hardware components. | 03-04-2010 |