Patent application number | Description | Published |
20110119413 | QUALITY OF SERVICE MANAGEMENT - A method and system for providing quality of service to a plurality of hosts accessing a common resource is described. According to one embodiment, a plurality of IO requests is received from clients executing as software entities on one of the hosts. An IO request queue for each client is separately managed, and an issue queue is populated based on contents of the IO request queues. When a host issue queue is not full, a new IO request is entered into the host issue queue and is issued to the common resource. A current average latency observed at the host is calculated, and an adjusted window size is calculated at least in part based on the current average latency. The window size of the issue queue is adjusted according to the calculated window size. | 05-19-2011 |
20120233363 | QUALITY OF SERVICE MANAGEMENT - A method for measuring latencies caused by processing performed within a common resource is provided. A current latency value representing a time of residency of an IO request in a queue prior to receipt of acknowledgment from the common resource of completion of the IO request is received from a device comprising the queue, which maintains entries for IO requests that have been dispatched to and are pending at the common resource. An average latency value is calculated based in part on the current latency value. An adjusted capacity size for the queue is calculated based in part on the average latency value and the queue's capacity is set to the adjusted capacity size. IO requests are held in a buffer if the queue's capacity is full to reduce the effect of an amount of work transmitted to the common resource on current latency values provided by the device. | 09-13-2012 |
20120324071 | MANAGING RESOURCES IN A DISTRIBUTED SYSTEM USING DYNAMIC CLUSTERS - One or more embodiments of the present invention provide a method for performing initial placement and load balancing of a data objects in a distributed system. The distributed system includes hardware resources, e.g., host systems and storage arrays, which are configured to execute and/or store data objects. A data object is initially placed into the distributed system by creating a virtual cluster of hardware resources that are compatible to execute and/or host the data object, and then selecting from the virtual cluster a hardware resource that is optimal for executing and/or hosting the data object. The data object is placed into the selected hardware resource, whereupon a load balancing operation is optionally performed across the virtual cluster. The virtual cluster is subsequently released, and the distributed system is returned to its original state with the data object included therein. | 12-20-2012 |
20120324441 | DECENTRALIZED MANAGEMENT OF VIRTUALIZED HOSTS - One or more embodiments of the present invention provide a technique for effectively managing virtualized computing systems with an unlimited number of hardware resources. Host systems included in a virtualized computer system are organized into a scalable, peer-to-peer (P2P) network in which host systems arrange themselves into a network overlay to communicate with one another. The network overlay enables the host systems to perform a variety of operations, which include dividing computing resources of the host systems among a plurality of virtual machines (VMs), load balancing VMs across the host systems, and performing an initial placement of a VM in one of the host systems. | 12-20-2012 |
20120324444 | DECENTRALIZED MANAGEMENT OF VIRTUALIZED HOSTS - One or more embodiments of the present invention provide a technique for effectively managing virtualized computing systems with an unlimited number of hardware resources. Host systems included in a virtualized computer system are organized into a scalable, peer-to-peer (P2P) network in which host systems arrange themselves into a network overlay to communicate with one another. The network overlay enables the host systems to perform a variety of operations, which include dividing computing resources of the host systems among a plurality of virtual machines (VMs), load balancing VMs across the host systems, and performing an initial placement of a VM in one of the host systems. | 12-20-2012 |
20130031200 | QUALITY OF SERVICE MANAGEMENT - A method for managing an amount of IO requests transmitted from a host computer to a storage system is described. A current latency value of an IO request most recently removed from an issue queue maintained by the host computer in order to transmit IO requests from the host computer to the storage system is periodically determined. An average latency value is the calculated based on the current latency value and a size limit of the issue queue is adjusted based in part on the average latency value. Upon receiving an IO request from one of a plurality of client applications running on the host computer, it can then be determined whether a number of pending IO requests in the issue queue has reached the size limit and the IO request can be transmitted to the issue queue if the number of pending IO request falls within the size limit. | 01-31-2013 |
20130238790 | METHODS AND SYSTEMS FOR DETECTING ANOMALIES DURING IO ACCESSES - An anomaly in a shared input/ouput (IO) resource that is accessed by a plurality hosts or clients is detected when a host that is not bound by any QoS policy presents large workloads to a shared IO resource that is also accessed by hosts or clients that are governed by QoS policy. The anomaly detection triggers a response from the hosts or clients as a way to protect against the effect of the anomaly. The response is an increase in window sizes. The window sizes of the hosts or clients may be increased to the maximum window size or in proportion to their QoS shares. | 09-12-2013 |
20130318228 | Fabric Distributed Resource Scheduling - Embodiments perform centralized input/output (I/O) path selection for hosts accessing storage devices in distributed resource sharing environments. The path selection accommodates loads along the paths through the fabric and at the storage devices. Topology changes may also be identified and automatically initiated. Some embodiments contemplate the hosts executing a plurality of virtual machines (VMs) accessing logical unit numbers (LUNs) in a storage area network (SAN). | 11-28-2013 |
20130326064 | DISTRIBUTED DEMAND-BASED STORAGE QUALITY OF SERVICE MANAGEMENT USING RESOURCE POOLING - A system and method for providing quality of service (QoS) for clients running on host computers to access a common resource uses a resource pool module and a local scheduler in at least one of the host computers. The resource pool module operates to compute an entitlement of each client for the common resource based on a current capacity for the common resource and demands of the clients for the common resource. In addition, the resource pool module operates to assign a portion of the computed current capacity for the common resource to a particular host computer using the computed entitlement of each client running on the particular host computer. The local scheduler operates to allocate the portion of the computed current capacity among the clients running on the particular host computer. | 12-05-2013 |
20130346577 | QUALITY OF SERVICE MANAGEMENT - A method for managing an amount of IO requests transmitted from a host computer to a storage system is described. A current latency value of an IO request most recently removed from an issue queue maintained by a host bus adapter of the host computer in order to transmit IO requests from the host computer to the storage system is periodically determined. An average latency value is the calculated based on the current latency value and a size limit of the issue queue is adjusted based in part on the average latency value. Upon receiving an IO request from one of a plurality of client applications running on the host computer, it can then be determined whether a number of pending IO requests in the issue queue has reached the size limit and the IO request can be transmitted to the issue queue if the number of pending IO request falls within the size limit. | 12-26-2013 |
20140059207 | CLIENT PLACEMENT IN A COMPUTER NETWORK SYSTEM USING DYNAMIC WEIGHT ASSIGNMENTS ON RESOURCE UTILIZATION METRICS - A system and method for placing a client in a computer network system uses continuously variable weights to resource utilization metrics for each candidate device, e.g., a host computer. The weighted resource utilization metrics are used to compute selection scores for various candidate devices to select a target candidate device for placement of the client. | 02-27-2014 |
20140215044 | QUALITY OF SERVICE MANAGEMENT USING HOST SPECIFIC VALUES - In one embodiment, a latency value is determined for an input/output IO request in a host computer of a plurality of host computers based on an amount of time the IO request spent in the host computer's issue queue. The issue queue of the host computer is used to transmit IO requests to a storage system shared by the plurality of host computers. The method determines a host specific value assigned to the host computer based in proportion on a number of shares assigned to the host in a quality of service policy for IO requests. The size for the host computer's issue queue is determined based on the latency value and the host specific value to control a number of IO requests that are added to the host computer's issue queue where other hosts in the plurality of hosts independently determine respective sizes for respective issue queues. | 07-31-2014 |
20140237113 | DECENTRALIZED INPUT/OUTPUT RESOURCE MANAGEMENT - A shared input/output (IO) resource is managed in a decentralized manner. Each of multiple hosts having IO access to the shared resource, computes an average latency value that is normalized with respect to average IO request sizes, and stores the computed normalized latency value for later use. The normalized latency values thus computed and stored may be used for a variety of different applications, including enforcing a quality of service (QoS) policy that is applied to the hosts, detecting a condition known as an anomaly where a host that is not bound by a QoS policy accesses the shared resource at a rate that impacts the level of service received by the plurality of hosts that are bound by the QoS policy, and migrating workloads between storage arrays to achieve load balancing across the storage arrays. | 08-21-2014 |
20140244841 | RESOURCE ALLOCATION USING CAPACITY DISTRIBUTION - A system and method for allocating a resource among clients running on host computers using capacity distribution uses lower and upper bounds with respect to a capacity to be distributed to each of the clients. Each client is allocated a portion of the capacity that corresponds to the lower bound for that client. Any excess amount of the capacity is then allocated to the clients based at least partly on the lower bound and the upper bound of each of the clients. | 08-28-2014 |
20140334301 | HIERARCHICAL ALLOCATION OF NETWORK BANDWIDTH FOR QUALITY OF SERVICE - Network bandwidth is allocated to virtual machines (VMs) according to a node hierarchy that includes a root node, intermediate nodes, and leaf nodes, wherein each leaf node represents a queue of packet transmission requests from a VM and each intermediate node represents a grouping of leaf queues. As VMs generate requests to transmit packets over the network, the network bandwidth is allocated by queuing packets for transmission in the leaf nodes, and selecting a leaf node from which a packet is to be transmitted based on tracking data that represent how much network bandwidth has been allocated to the nodes. Upon selecting the leaf node, the tracking data of the selected leaf node and the tracking data of an intermediate node that is a parent node of the selected leaf node are updated, and a command to transmit the packet of the selected leaf node is issued. | 11-13-2014 |
20150019906 | Transparent and Lightweight Recovery From Hardware Memory Errors - Systems and methods are disclosed that allow for transparently recovering from an uncorrected multi-bit error of arbitrary length located at a memory address. Storing one or more parity pages, for a set of pages in system memory, such that a page in the set of pages may be reconstructed using one of the parity pages is disclosed. Storing an indication of one or more page'disk location such that the one or more pages may be reconstructed by refilling the page from disk is also disclosed. | 01-15-2015 |
20150120931 | AUTOMATIC REMEDIATION IN A DISTRIBUTED COMPUTER SYSTEM WITH MULTIPLE CLUSTERS OF HOST COMPUTERS - A system and method for performing automatic remediation in a distributed computer system with multiple clusters of host computers uses the same placement selection algorithm for initial placements and for remediation placements of clients. The placement selection algorithm is executed to generate a placement solution when a remediation request in response to a remediation-requiring condition in the distributed computer system for at least one client running in one of the multiple clusters of host computers is detected and a remediation placement problem for the client is constructed. The placement solution is then implemented for the client for remediation | 04-30-2015 |
20150128138 | DECENTRALIZED MANAGEMENT OF VIRTUALIZED HOSTS - One or more embodiments of the present invention provide a technique for effectively managing virtualized computing systems with an unlimited number of hardware resources. Host systems included in a virtualized computer system are organized into a scalable, peer-to-peer (P2P) network in which host systems arrange themselves into a network overlay to communicate with one another. The network overlay enables the host systems to perform a variety of operations, which include dividing computing resources of the host systems among a plurality of virtual machines (VMs), load balancing VMs across the host systems, and performing an initial placement of a VM in one of the host systems. | 05-07-2015 |
20150215234 | APPLICATION SERVICE LEVEL OBJECTIVE AWARE DEMAND ESTIMATION - A management server and method for performing resource management operations in a distributed computer system uses at least one sampling parameter to estimate demand of a client for a resource. The sampling parameter has a correlation with at least one target performance goal of an application that the client is running. The demand estimation can then be used to make at least one decision in a resource management operation. | 07-30-2015 |
20150236978 | MANAGING RESOURCES IN A DISTRIBUTED SYSTEM USING DYNAMIC CLUSTERS - In an example, a method for performing initial placement of a data object in a distributed system that includes a plurality of hardware resources includes receiving a request to create an instance of a data object; determining, in response to the request, a list of hardware resources that satisfy one or more criteria of the data object; creating, in response to the request, a virtual cluster that includes a subset of the hardware resources included in the list of hardware resources; selecting a hardware resource from the virtual cluster into which the data object is to be placed; placing the data object into the hardware resource; and releasing the virtual cluster. | 08-20-2015 |
20150242235 | FABRIC DISTRIBUTED RESOURCE SCHEDULING - Embodiments perform centralized input/output (I/O) path selection for hosts accessing storage devices in distributed resource sharing environments. The path selection accommodates loads along the paths through the fabric and at the storage devices. Topology changes may also be identified and automatically initiated. Some embodiments contemplate the hosts executing a plurality of virtual machines (VMs) accessing logical unit numbers (LUNs) in a storage area network (SAN). | 08-27-2015 |
Patent application number | Description | Published |
20130227245 | MEMORY MANAGEMENT UNIT WITH PREFETCH ABILITY - Techniques are disclosed relating to integrated circuits that implement a virtual memory. In one embodiment, an integrated circuit is disclosed that includes a translation lookaside buffer configured to store non-prefetched translations and a translation table configured to store prefetched translations. In such an embodiment, the translation lookaside buffer and the translation table share table walk circuitry. In some embodiments, the table walk circuitry is configured to store a translation in the translation table in response to a prefetch request and without updating the translation lookaside buffer. In some embodiments, the translation lookaside buffer, the translation table, and table walk circuitry are included within a memory management unit configured to service memory requests received from a plurality of client circuits via a plurality of direct memory access (DMA) channels. | 08-29-2013 |
20130346800 | System on a Chip (SOC) Debug Controllability - In one embodiment, an SOC includes multiple components including a CPU complex and one or more non-CPU components such as peripheral interface controllers, memory controllers, media components, etc. The SOC also includes an SOC debug control unit, which is coupled to receive detected debug events from the components. Each component may include a local debug control unit that is configured to monitor for various debug events within that component. The debug events may be specific to the component. The local debug control units may transmit detected events to the SOC debug control unit. The SOC debug control unit may detect one or more events from one or more components, and may halt the components of the SOC responsive to detecting the selected events. | 12-26-2013 |
20140052929 | PROGRAMMABLE RESOURCES TO TRACK MULTIPLE BUSES - A system and method for efficiently monitoring traces of multiple components in an embedded system. A system-on-a-chip (SOC) includes a trace unit for collecting and storing trace history, bus event statistics, or both. The SOC may transfer cache coherent messages across multiple buses between a shared memory and a cache coherent controller. The trace unit includes multiple bus event filters. Programmable configuration registers are used to assign the bus event filters to selected buses for monitoring associated bus traffic and determining whether qualified bus events occur. If so, the bus event filters increment an associated count for each of the qualified bus events. The values used for determining qualified bus events may be set by programmable configuration registers. | 02-20-2014 |
20140052930 | EFFICIENT TRACE CAPTURE BUFFER MANAGEMENT - A system and method for efficiently storing traces of multiple components in an embedded system. A system-on-a-chip (SOC) includes a trace unit for collecting and storing trace history, bus event statistics, or both. The SOC may transfer cache coherent messages across multiple buses between a shared memory and a cache coherent controller. The trace unit includes a trace buffer with multiple physical partitions assigned to subsets of the multiple buses. The number of partitions is less than the number of multiple buses. One or more trace instructions may cause a trace history, trace bus event statistics, local time stamps and a global time-base value to be stored in a physical partition within the trace buffer. | 02-20-2014 |
20140086070 | Bandwidth Management - In some embodiments, a system includes a shared, high bandwidth resource (e.g. a memory system), multiple agents configured to communicate with the shared resource, and a communication fabric coupling the multiple agents to the shared resource. The communication fabric may be equipped with limiters configured to limit bandwidth from the various agents based on one or more performance metrics measured with respect to the shared, high bandwidth resource. For example, the performance metrics may include one or more of latency, number of outstanding transactions, resource utilization, etc. The limiters may dynamically modify their limit configurations based on the performance metrics. In an embodiment, the system may include multiple thresholds for the performance metrics, and exceeding a given threshold may include modifying the limiters in the communication fabric. There may be hysteresis implemented in the system as well in some embodiments, to reduce the frequency of transitions between configurations. | 03-27-2014 |
20140089546 | INTERRUPT TIMESTAMPING - A system and method for maintaining accurate interrupt timestamps. A semiconductor chip includes an interrupt controller (IC) with an interface to multiple sources of interrupts. In response to receiving an interrupt, the IC copies and records the value stored in a main time base counter used for maintaining a global elapsed time. The IC sends an indication of the interrupt to a corresponding processor. Either an interrupt service routine (ISR) or a device driver requests a timestamp associated with the interrupt. Rather than send a request to the operating system to obtain a current value stored in the main time base counter, the processor requests the recorded timestamp from the IC. The IC identifies the stored timestamp associated with the interrupt and returns it to the processor. | 03-27-2014 |
20140089682 | Security Enclave Processor for a System on a Chip - An SOC implements a security enclave processor (SEP). The SEP may include a processor and one or more security peripherals. The SEP may be isolated from the rest of the SOC (e.g. one or more central processing units (CPUs) in the SOC, or application processors (APs) in the SOC). Access to the SEP may be strictly controlled by hardware. For example, a mechanism in which the CPUs/APs can only access a mailbox location in the SEP is described. The CPU/AP may write a message to the mailbox, which the SEP may read and respond to. The SEP may include one or more of the following in some embodiments: secure key management using wrapping keys, SEP control of boot and/or power management, and separate trust zones in memory. | 03-27-2014 |
20140089712 | Security Enclave Processor Power Control - An SOC implements a security enclave processor (SEP). The SEP may include a processor and one or more security peripherals. The SEP may be isolated from the rest of the SOC (e.g. one or more central processing units (CPUs) in the SOC, or application processors (APs) in the SOC). Access to the SEP may be strictly controlled by hardware. For example, a mechanism in which the CPUs/APs can only access a mailbox location in the SEP is described. The CPU/AP may write a message to the mailbox, which the SEP may read and respond to. The SEP may include one or more of the following in some embodiments: secure key management using wrapping keys, SEP control of boot and/or power management, and separate trust zones in memory. | 03-27-2014 |
20140108688 | Fabric Delivered Interrupts - In an embodiment, a system includes at least one peripheral device, an interrupt controller, a memory controller, at least one CPU, and an interrupt message circuit coupled to the peripheral device. The interrupt message circuit may be coupled to receive the interrupt signal from the peripheral device, and may be configured to generate an interrupt message for transmission on a communication fabric. In some embodiments, there may be multiple peripherals which have independent paths through the fabric for memory operations to the memory controller. Each such peripheral may be coupled to an instance of the interrupt message circuit. In an embodiment, the interrupt is level sensitive. The interrupt message circuit may be configured to transmit interrupt set messages an interrupt clear messages to the interrupt controller, to indicate the levels. | 04-17-2014 |
20140122759 | Edge-Triggered Interrupt Conversion - In an embodiment, a system includes an interrupt controller, one or more CPUs coupled to the interrupt controller, a communication fabric, one or more peripheral devices configured to generate interrupts to be transmitted to the interrupt controller, and one or more interrupt message circuits coupled to the peripheral devices. The interrupt message circuits are configured to generate interrupt messages to convey the interrupts over the fabric to the interrupt controller. Some of the interrupts are level-sensitive interrupts, and the interrupt message circuits are configured to transmit level-sensitive interrupt messages to the interrupt controller. At least one of the interrupts is edge-triggered. The system is configured to convert the edge-triggered interrupt to a level-sensitive interrupt so that interrupts may be handled in the same fashion. | 05-01-2014 |
20140304441 | PROTOCOL CONVERSION INVOLVING MULTIPLE VIRTUAL CHANNELS - Embodiments of a bridge circuit and system are disclosed that may allow converting transactions from one communication protocol to another. The bridge circuit may be coupled to a first bus employing a first communication protocol, and a second bus employing a second communication protocol. The second bus may include a plurality of virtual channels. The bridge circuit may be configured to receive transactions over the first bus, and convert the transactions to the second communication protocol, and to assign the converted transaction to one of the plurality of virtual channels. The bridge circuit may be further configured store the converted transaction. A plurality of limited throughput signals may be generated by the bridge circuit dependent upon a number of available credits for the plurality of virtual channels. | 10-09-2014 |
20140337649 | Memory Power Savings in Idle Display Case - In an embodiment, a system includes a memory controller that includes a memory cache and a display controller configured to control a display. The system may be configured to detect that the images being displayed are essentially static, and may be configured to cause the display controller to request allocation in the memory cache for source frame buffer data. In some embodiments, the system may also alter power management configuration in the memory cache to prevent the memory cache from shutting down or reducing its effective size during the idle screen case, so that the frame buffer data may remain cached. During times that the display is dynamically changing, the frame buffer data may not be cached in the memory cache and the power management configuration may permit the shutting down/size reduction in the memory cache. | 11-13-2014 |
20150134331 | Always-On Audio Control for Mobile Device - In an embodiment, an integrated circuit may include one or more CPUs, a memory controller, and a circuit configured to remain powered on when the rest of the SOC is powered down. The circuit may be configured to receive audio samples from a microphone, and match those audio samples against a predetermined pattern to detect a possible command from a user of the device that includes the SOC. In response to detecting the predetermined pattern, the circuit may cause the memory controller to power up so that audio samples may be stored in the memory to which the memory controller is coupled. The circuit may also cause the CPUs to be powered on and initialized, and the operating system (OS) may boot. During the time that the CPUs are initializing and the OS is booting, the circuit and the memory may be capturing the audio samples. | 05-14-2015 |
20150143044 | MECHANISM FOR SHARING PRIVATE CACHES IN A SOC - Systems, processors, and methods for sharing an agent's private cache with other agents within a SoC. Many agents in the SoC have a private cache in addition to the shared caches and memory of the SoC. If an agent's processor is shut down or operating at less than full capacity, the agent's private cache can be shared with other agents. When a requesting agent generates a memory request and the memory request misses in the memory cache, the memory cache can allocate the memory request in a separate agent's cache rather than allocating the memory request in the memory cache. | 05-21-2015 |
20150346001 | System on a Chip with Always-On Processor - In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down. | 12-03-2015 |
20150347287 | System on a Chip with Always-On Processor Which Reconfigures SOC and Supports Memory-Only Communication Mode - In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down. | 12-03-2015 |
20160029318 | METHOD FOR WAKING A DATA TRANSCEIVER THROUGH DATA RECEPTION - A method for managing power in a system, in which the system may include a first device configured to transmit serial data and a second device, coupled to the first device. The second device may include a transceiver and interrupt logic, and may be configured to activate the interrupt logic and enable a reduced power mode for the transceiver. Power consumption of the transceiver operating in the reduced power mode may be less than power consumption of the transceiver in an operating mode. The second device may also be configured to assert an interrupt signal responsive to a change in a voltage level of an input of the second device and then de-activate the reduced power mode for the transceiver responsive to the assertion of the interrupt signal. | 01-28-2016 |
20160049207 | CONFIGURATION FUSE DATA MANAGEMENT IN A PARTIAL POWER-ON STATE - In an embodiment, an apparatus may include a plurality of circuit blocks, a plurality of fuses and circuitry. The circuitry may be configured to determine a state for each of the plurality of fuses in response to transitioning from an off mode to a first operating mode. A first number of circuit blocks may be enabled in the first operating mode. The circuitry may also be configured to initialize the first number of circuit blocks dependent upon the states of one or more of the plurality of fuses and to transition from the first operating mode to a second operating mode. A second number of circuit blocks, less than the first number, may be enabled in the second operating mode. The circuitry may also be configured to store data representing the states of a subset of the plurality of fuses into a first memory enabled in the second operating mode. | 02-18-2016 |
20160054773 | Method and Apparatus for Providing Telemetry for Power Management Functions - A method and apparatus for providing telemetry for use in power control functions is disclosed. A system includes an integrated circuit (IC) having a first power management circuit. The IC also includes a number of functional circuit blocks within a number of different power domains. A second power management circuit is implemented external to the IC and includes a number of voltage regulators. Each of the power domains is coupled to receive power from one voltage regulators. During operation, the first power management circuit may send commands requesting the change of one or more voltages provided to the IC. The second power management circuit may respond by performing the requested voltage change(s), and may also provide telemetry data to the first power management circuit. The second power management circuit may also provide telemetry data responsive to receiving a no operation command from the first power management circuit. | 02-25-2016 |
20160054788 | Parameter-Based Sensor Selection - A method and apparatus for parameter-based sensor selection is disclosed. In one embodiment, a system includes an integrated circuit (IC) having a first power management circuit, and a second power management circuit external to the IC. The IC includes various functional units implemented in various power domains, while the second power management circuit (which may be implemented on an IC) includes a number of voltage regulators for providing power to the power domains. The second power management circuit also includes sensors that provide data about a system parameter, with the data being provided at telemetry to the first power management circuit. When the system parameter is less than a first threshold, the telemetry data may be based on a first sensor. When the system parameter is greater than the first threshold, the telemetry data may be based on a second sensor. | 02-25-2016 |
20160055110 | Transaction Filter for On-Chip Communications Network - A transaction filter for an on-chip communications network is disclosed. In one embodiment, an integrated circuit (IC) include a number of functional circuit blocks, some of which may be placed in a sleep mode (e.g., power-gated). The IC also includes a number of transaction filters that are each associated with a unique one of the functional circuit blocks. Responsive to its associated functional circuit block generating a transaction, a given transaction filter may determine whether the functional circuit block to which the transaction is destined is in a sleep mode. If it is determined that the transaction is destined for a functional circuit block that is currently in the sleep mode, the transaction filter may block the transaction from being conveyed. | 02-25-2016 |
20160077579 | METHOD FOR PREPARING A SYSTEM FOR A POWER LOSS - In an embodiment, a system includes a power management unit (PMU), a non-volatile memory, a volatile memory, and a processor. The PMU may be configured to generate a power supply voltage, change a state of a status signal responsive to an event, and reduce a voltage level of the power supply voltage responsive to a predetermined period of time elapsing from detecting the event. The system may be configured to transition from a first to a second operating mode responsive to the change of the state of the status signal, and cancel pending commands to the non-volatile memory responsive to the transition to the second operating mode. The non-volatile memory may be configured to complete active commands prior the predetermined period of time elapsing. | 03-17-2016 |
20160091954 | LOW ENERGY PROCESSOR FOR CONTROLLING OPERATING STATES OF A COMPUTER SYSTEM - Embodiments of a method that allow the adjustment of performance settings of a computing system are disclosed. One or more functional units may include multiple monitor circuits, each of which may be configured to monitor a given operational parameter of a corresponding functional unit. Upon detection of an event related to a monitored operational parameter, a monitor circuit may generate an interrupt. In response to the interrupt a processor may adjust one or more performance settings of the computing system. | 03-31-2016 |
Patent application number | Description | Published |
20090029472 | Apparatuses and media for drug elution and methods for making and using them - Embodiments of the invention provide to apparatuses and media used in drug elution studies and methods for making and using them. Such methods and materials can be used for example to assess and control the manufacturing process variability of drug eluting implantable devices such as cardiac leads. One embodiment of the invention is a drug elution method that can be used for in-vitro studies of a matrix impregnated with a compound such as a drug blended polymer matrix. A related embodiment of the invention is an apparatus that is used for example to facilitate the practice of the above-noted methods by inhibiting the evaporation of dissolution media from the vessels in which elution is observed. | 01-29-2009 |
20090169624 | Nano-emulsion technology for drug elution - Embodiments of the invention provide to apparatuses and media used in drug elution studies and methods for making and using them. One embodiment of the invention is a drug elution method that can be used for in-vitro studies of a matrix impregnated with a compound such as a drug blended polymer matrix. Such methods and materials can be used for example to assess and control the manufacturing process variability of drug eluting implantable devices such as cardiac leads. | 07-02-2009 |
20100098595 | APPARATUSES AND MEDIA FOR DRUG ELUTION AND METHODS FOR MAKING AND USING THEM - Embodiments of the invention provide to apparatuses and media used in drug elution studies and methods for making and using them. Such methods and materials can be used for example to assess and control the manufacturing process variability of drug eluting implantable devices such as cardiac leads. One embodiment of the invention is a drug elution method that can be used for in-vitro studies of a matrix impregnated with a compound such as a drug blended polymer matrix. A related embodiment of the invention is an apparatus that is used for example to facilitate the practice of the above-noted methods by inhibiting the evaporation of dissolution media from the vessels in which elution is observed. | 04-22-2010 |
20100162800 | MEDIA COMPOSITIONS FOR ELUTING COMPOUNDS FROM MATRICES AND METHODS FOR MAKING AND USING THEM - Embodiments of the invention provide to apparatuses and media used in drug elution studies and methods for making and using them. One embodiment of the invention is a drug elution method that can be used for in-vitro studies of a matrix impregnated with a compound such as a drug blended polymer matrix. Such methods and materials can be used for example to assess and control the manufacturing process variability of drug eluting implantable devices such as cardiac leads. | 07-01-2010 |
20110152785 | SYRINGE PISTON WITH CHECK VALVE SEAL - A fluid syringe of the type used with fluid infusion devices is presented here. The fluid syringe generally includes a barrel, a piston, and a check valve seal. The barrel has an interior wall and a sealed main fluid chamber. The piston is slidably coupled within the barrel, and the piston has a piston seal forming an interference fluid seal against the interior wall. The check valve seal is coupled to the piston, and it is located between the piston seal and the main fluid chamber. The check valve seal forms an interference fluid seal against the interior wall when the piston is unloaded, and it disengages the interior wall to allow gas flow from the main fluid chamber toward the piston seal when the piston is loaded. | 06-23-2011 |
20110152820 | BARRIER COATINGS FOR FLUIDS CONTACTING MEDICAL DEVICES - The invention relates to methods and materials that, for example, function to increase the barrier properties of containers including polymeric drug medication reservoirs and related containers such as infusion set tubing. Embodiments of the invention include aqueous container systems having containers coated with a composition selected to have one or more material properties including an ability to reduce the diffusion or permeation of compounds such as oxygen, carbon dioxide, and preservatives (e.g. phenol, benzyl alcohol and m-cresol) into or through a wall of the container. | 06-23-2011 |
20120014919 | MODULATION OF SOCS EXPRESSION IN THERAPEUTIC REGIMENS - A method is provided for treating conditions that are susceptible of treatment with a cytokine wherein certain physiological processes normally associated with cytokine administration (e.g. the induction of SOCS 1 and/or SOCS 3) are diminished or eliminated. The method comprises continuously administering a controlled dose of a cytokine to an individual afflicted with a condition susceptible of treatment with the cytokine. | 01-19-2012 |
20120165754 | SYRINGE PISTON WITH FIN-SHAPED CIRCUMFERENTIAL SEALING ELEMENT - Syringe pistons for a fluid syringe, and related sealing elements, are presented here. A syringe piston includes a piston body having a fluid end, an actuator end, and an outer seal-retaining surface between the fluid end and the actuator end. The syringe piston may utilize a piston sealing sleeve or a piston sealing cover. The sleeve can be coupled to the piston body around the outer seal-retaining surface, the piston sealing sleeve having a fin-shaped fluid seal element to form an interference fluid seal with an interior wall of a syringe barrel. The sealing cover can be coupled overlying the tip of the piston body. The cover has a fin-shaped fluid seal element to form an interference fluid seal with an interior wall of a syringe barrel. | 06-28-2012 |
20120165755 | SYRINGE PISTON WITH FINNED SEALING COVER - Syringe pistons for a fluid syringe, and related sealing elements, are presented here. A syringe piston includes a piston body having a fluid end, an actuator end, and an outer seal-retaining surface between the fluid end and the actuator end. The syringe piston may utilize a piston sealing sleeve or a piston sealing cover. The sleeve can be coupled to the piston body around the outer seal-retaining surface, the piston sealing sleeve having a fin-shaped fluid seal element to form an interference fluid seal with an interior wall of a syringe barrel. The sealing cover can be coupled overlying the tip of the piston body. The cover has a fin-shaped fluid seal element to form an interference fluid seal with an interior wall of a syringe barrel. | 06-28-2012 |
20140031749 | SYRINGE PISTON WITH CHECK VALVE SEAL - A fluid syringe of the type used with fluid infusion devices is presented here. The fluid syringe generally includes a barrel, a piston, and a check valve seal. The barrel has an interior wall and a sealed main fluid chamber. The piston is slidably coupled within the barrel, and the piston has a piston seal forming an interference fluid seal against the interior wall. The check valve seal is coupled to the piston, and it is located between the piston seal and the main fluid chamber. The check valve seal forms an interference fluid seal against the interior wall when the piston is unloaded, and it disengages the interior wall to allow gas flow from the main fluid chamber toward the piston seal when the piston is loaded. | 01-30-2014 |
20140378799 | Anchoring Apparatus and Method for Attaching Device on Body - The present invention describes improved systems and methods for attaching external medical devices to the body of a patient using a multilayer attachment apparatus. Medical devices that require attachment to the body, including monitoring devices, drug-infusing devices and the like, can utilize embodiments of the attachment apparatus and method described herein. Embodiments of the invention include new adhesive and hook and loop attachment mechanisms and methods for using embodiments of the multilayer attachment apparatus to attach medical device and/or medical device components to the body. | 12-25-2014 |
20150112302 | METHODS AND SYSTEMS FOR INHIBITING FOREIGN-BODY RESPONSES IN DIABETIC PATIENTS - Methods and devices are provided for reducing a diabetic patient's foreign body immune response, including infusion site-loss and/or occlusion. Such foreign body responses are associated with the treatment of the diabetic patient where the treatment requires subcutaneous implantation of a foreign body, such as a cannula or catheter. In certain embodiments of the invention, a response-inhibiting agent is administered to a patient at the site of cannula/catheter insertion, thereby facilitating delivery of insulin to the diabetic patient and mitigating site-loss and/or occlusion over a period of time. | 04-23-2015 |
20160095987 | FLUID CONDUIT ASSEMBLY WITH GAS TRAPPING FILTER IN THE FLUID FLOW PATH - A fluid delivery system and a fluid conduit assembly suitable for use with the system are disclosed herein. The system includes a fluid infusion pump and a fluid conduit assembly coupled to the pump to deliver medication fluid to a user. The fluid conduit assembly includes a structure defining a flow path for the medication fluid, and a gas trapping filter coupled to the structure and positioned in the flow path. The gas trapping filter functions to filter particulates from the medication fluid and retain gas bubbles from the medication fluid. | 04-07-2016 |
Patent application number | Description | Published |
20090232387 | MULTI PARALLAX EXPLOITATION FOR OMNI-DIRECTIONAL IMAGING ELECTRONIC EYE - Techniques and systems are disclosed for electronic target recognition. In particular, techniques and systems are disclosed for performing electronic surveillance and target recognition using a multiple parallax exploitation (MPEX) electronic eye platform. Among other things, a MPEX system can include an imaging unit that includes multiple image capture devices spaced from one another to form an array to provide overlapping fields-of-view and to capture multiple overlapping stereo images of a scene. The MPEX system can also include a processing unit connected to the imaging unit to receive and process data representing the captured multiple overlapping stereo images from the imaging unit to characterize one or more objects of interest in the scene. | 09-17-2009 |
20100023290 | Quantum Resonance Interferometry for Detecting Signals - A computer-implemented method for signal analysis includes receiving a first signal, receiving a second signal, coupling the first signal with a first function generated from a first quantum mechanical system to generate a first tunneling rate, coupling the second signal with a second function generated from a second quantum mechanical system to generate a second tunneling rate, coupling the first tunneling rate with a third function generated from a third quantum mechanical system, coupling the second tunneling rate with the third function, obtaining a third tunneling rate, and upon determining that the third tunneling rate is greater than a threshold, identifying that the second signal corresponds to the first signal. | 01-28-2010 |
20150015888 | DYNAMIC RADIALLY CONTROLLED LIGHT INPUT TO A NONINVASIVE ANALYZER APPARATUS AND METHOD OF USE THEREOF - An analyzer apparatus and method of use thereof is described to dynamically irradiate a sample with incident light where the incident light is varied in time in terms of any of: position, radial position relative to a point of the skin of a subject, solid angle, incident angle, depth of focus, energy, and/or intensity. For example, the incident light is varied in radial position as a function of time relative to one or more of a sample site, a point on skin of the subject, a detection optic, and/or a sample volume observed by a detection system. The radially varied incident light is used to enhance and/or vary light probing the epidermis, the dermis, and/or the subcutaneous fat of the subject or of a group of subjects. | 01-15-2015 |
20150018642 | TISSUE PATHLENGTH RESOLVED NONINVASIVE ANALYZER APPARATUS AND METHOD OF USE THEREOF - An analyzer apparatus and method of use thereof is configured to dynamically interrogate a sample. For example, an analyzer using light interrogates a tissue sample using a temporal resolution system on a time scale of less than about one hundred nanoseconds. Optionally, near-infrared photons are introduced to a sample with a known illumination zone to detection zone distance allowing calculation of parameters related to photon pathlength in tissue and/or molar absorptivity of an individual or group through the use of the speed of light and/or one or more indices of refraction. Optionally, more accurate estimation of tissue properties are achieved through use of: knowledge of incident photon angle relative to skin, angularly resolved detector positions, anisotropy, skin temperature, environmental information, information related to contact pressure, blood glucose concentration history, and/or a skin layer thickness, such as that of the epidermis and dermis. | 01-15-2015 |
20150018644 | MULTIPLEXED PATHLENGTH RESOLVED NONINVASIVE ANALYZER APPARATUS WITH NON-UNIFORM DETECTOR ARRAY AND METHOD OF USE THEREOF - A noninvasive analyzer apparatus and method of use thereof is described comprising a near-infrared source, a non-uniform detector array, and a photon transport system configured to direct photons from the source to the detector via an analyzer-sample optical interface. The non-uniform detector array provides a multitude of distinguishable optical pathlengths, couples to a plurality of optical transmission filters, couples to a plurality of light directing micro-optics, and/or couples to an array of light-emitting diodes. | 01-15-2015 |
20150018646 | DYNAMIC SAMPLE MAPPING NONINVASIVE ANALYZER APPARATUS AND METHOD OF USE THEREOF - A noninvasive analyzer apparatus and method of use thereof is described using a sample mapping phase to establish one or more analyzer/software parameters used in a subsequent individual and/or group specific data collection phase. For example, in the sample mapping phase distance between incident and collected light is varied as a function of time for collected noninvasive spectra. Spectra collected in the sample mapping phase are analyzed to determine a physiological property of the subject, such as dermal thickness, hydration, collagen density, epidermal thickness, and/or subcutaneous fat depth. Using the physiological property or measure thereof, the analyzer is optically reconfigured for the individual to yield subsequent spectra having enhanced features for noninvasive analyte property determination. Similarly, in the mapping and/or collection phase, the incident light is varied in time in terms of any of: sample probe position, incident light solid angle, incident light angle, depth of focus, energy, and/or intensity. | 01-15-2015 |
20150041656 | MULTIPLEXED NONINVASIVE ANALYZER APPARATUS AND METHOD OF USE THEREOF - A noninvasive analyzer apparatus and method of use thereof is described using a plurality of time resolved sample illumination zones coupled to at least one two-dimensional detector array monitoring a plurality of detection zones. Control of illumination times and/or patterns along with selected detection zones yields pathlength resolved groups of spectra. Sectioned pixels and/or zones of the detector are optionally filtered for different light throughput as a function of wavelength. The pathlength resolved groups of spectra are subsequently analyzed to determine an analyte property. Optionally, in the mapping and/or collection phase, incident light is controllably varied in time in terms of any of: sample probe position, incident light solid angle, incident light angle, depth of focus, energy, intensity, and/or detection angle. Optionally, one or more physiological property and/or model property related to a physiological property is used in the analyte property determination. | 02-12-2015 |
20150045636 | MULTIPLEXED / PATHLENGTH RESOLVED NONINVASIVE ANALYZER APPARATUS AND METHOD OF USE THEREOF - A noninvasive analyzer apparatus and method of use thereof is described using a plurality of time resolved sample illumination zones coupled to at least one two-dimensional detector array monitoring a plurality of detection zones. Control of illumination times and/or patterns along with selected detection zones yields pathlength resolved groups of spectra. Sectioned pixels and/or zones of the detector are optionally filtered for different light throughput as a function of wavelength. The pathlength resolved groups of spectra are subsequently analyzed to determine an analyte property. Optionally, in the mapping and/or collection phase, incident light is controllably varied in time in terms of any of: sample probe position, incident light solid angle, incident light angle, depth of focus, energy, intensity, and/or detection angle. Optionally, one or more physiological property and/or model property related to a physiological property is used in the analyte property determination. | 02-12-2015 |
20160097716 | SYSTEMS AND METHODS FOR BLOOD GLUCOSE AND OTHER ANALYTE DETECTION AND MEASUREMENT USING COLLISION COMPUTING - In a noninvasive system for detection/measurement of glucose and other analytes in a medium such as tissue, spectra from the medium are deconstructed into features. Conditioned features, which contain frequency components specific to glucose or the other analytes, are derived from one or more features by modulating a carrier kernel with the feature. The conditioned features are computationally collided with one or more Zyotons that are co-dependent with the conditioned features. One or more collisions amplify a property of the analyte e.g., energy absorbed by glucose in tissue from radiation directed to the skin. A gradient of several values of the amplified property, each value corresponding to a particular radiation pattern according to a spectroscopic tomographic sequence, is used to select a suitable projector curve, with which a representative amplified value is projected to an accurate estimate of the concentration of glucose or the other analytes, without needing personalized calibration. | 04-07-2016 |