Patent application number | Description | Published |
20110182359 | CENTRAL DECODING CONTROLLER AND CONTROLLING METHOD THEREOF - A central decoding controller and a central decoder controlling method are disclosed. A video stream is processed and transmitted via at least two parallel channels. The method comprises steps of: receiving a video key frame obtained by decoding an original video frame via a first channel, and a plurality of intra-description frames neighboring the video key frame; receiving a predictive video frame obtained by processing a prediction analysis and an error correction to the original video frame via a second channel parallel to the first channel; receiving a plurality of inter-description frames via the second channel, the inter-description frames neighboring the video key frame; calculating correlation of the video key frame, the intra-description frames, and the inter-description frames; and selecting the video key frame or the predictive video frame as an output frame according to the correlation result. The method can improve video quality under wireless transmission or unstable internet transmission. | 07-28-2011 |
20120044107 | APPARATUS FOR PERFORMING GLOBAL NAVIGATION SATELLITE SYSTEM CONTROL, AND ASSOCIATED METHODS AND STORAGE MEDIA - An apparatus for performing Global Navigation Satellite System (GNSS) control includes: a GNSS receiver arranged to obtain/calculate at least one position of the apparatus; and an assistance data provider implemented within the apparatus, wherein the assistance data provider is arranged to provide the GNSS receiver with assistance data for use of obtaining/calculating the at least one position, and the assistance data provider selectively selects a specific assistance mode from a plurality of assistance modes for the GNSS receiver according to at least one predefined rule, with the assistance data corresponding to the specific assistance mode. Associated methods and storage media are also provided. | 02-23-2012 |
20120275115 | ELECTRONIC DEVICE - An electronic device including a casing, a heat generating element, a heat dissipating element and a fan is provided. The heat generating element is disposed in the casing. The heat dissipating element is disposed on the heat generating element. The fan is disposed on the heat dissipating element and is capable of rotating forward or reverse. When the electronic device in a first state is changed into a second state, the fan firstly rotates reverse to generate a first airflow for removing the dust in the casing. After the fan rotates reverse over a period of time, the fan stops from rotating reverse and starts to rotate forward to generate a second airflow for dissipating heat from the heat dissipating element. | 11-01-2012 |
20150115712 | POWER SUPPLY DEVICE - A power supply device includes a first body and a second body. The first body has an opening and an adapter module which is electrically connected to the first electronic device. The opening is divided into a first port and a second port via a first axis, and the shape of the first portion is asymmetrical with second port of the second portions. The second body has an energy storage unit. The energy storage unit is electrically connected to the adapter module to supply power to the first electronic device, when the second body is detached from the first body, the energy storage unit is adapted to supply power to the second electronic device. | 04-30-2015 |
Patent application number | Description | Published |
20140091273 | RESISTIVE RANDOM ACCESS MEMORY AND FABRICATION METHOD THEREOF - A resistive random access memory (RRAM) unit includes at least one bit line extending along a first direction, at least one word line disposed on a substrate and extending along a second direction so as to intersect the bit line, a hard mask layer on the word line to isolate the word line from the bit line, a first memory cell on a sidewall of the word line, and a second memory cell on the other sidewall of the word line. | 04-03-2014 |
20150072500 | METHOD FOR FABRICATING RESISTIVE RANDOM ACCESS MEMORY - A method of fabricating a resistive random access memory (RRAM) device is disclosed. A plurality of word lines extending along a first direction are formed on a substrate with a recess between the word lines. A spacer-type resistance layer and a top electrode layer are formed on a sidewall of each of the word lines. A photoresist stripe pattern extending along a second direction is then formed on the substrate. The first direction is perpendicular to the second direction. An etching process is performed to remove the top electrode layer and the spacer-type resistance layer not covered by the photoresist stripe pattern to form a plurality of top electrodes. A diode is formed on each of the top electrodes. | 03-12-2015 |
20150228895 | RESISTIVE RANDOM ACCESS MEMORY - A resistive random access memory including a first electrode, a dielectric layer, at least a first nanostructure and a second electrode is provided. The dielectric layer is disposed on the first electrode. The first nanostructure is disposed between the first electrode and the dielectric layer and includes a plurality of first cluster-type-type metal nanoparticles and a plurality of first covering-type metal nanoparticles. The first cluster-type-type metal nanoparticles are disposed on the first electrode. The first covering-type metal nanoparticles covers the first cluster-type-type metal nanoparticles, wherein a diffusion coefficient of the first cluster-type-type metal nanoparticles is larger than a diffusion coefficient of the first covering-type metal nanoparticles. The second electrode is disposed on the dielectric layer. | 08-13-2015 |
20150340427 | CAPACITOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME - A capacitor structure including at least one capacitor unit is provided. The capacitor unit includes a dielectric layer, an inner metal layer and an outer metal layer. The inner metal layer is disposed in the dielectric layer. The outer metal layer is disposed in the dielectric layer and surrounds the inner metal layer. The outer metal layer includes a first metal layer, two second metal layers and a third metal layer. The first metal layer is disposed under the inner metal layer. The second metal layers are disposed at two sides of the inner metal layer, and lower surfaces of the second metal layers are located equal to or below a lower surface of the inner metal layer. The third metal layer is disposed over the inner metal layer and connects to the second metal layers. | 11-26-2015 |
Patent application number | Description | Published |
20120228769 | CARRIER-FREE SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF - A carrier-free semiconductor package includes a circuit structure having an insulating layer and a circuit layer embedded in the insulating layer and having a plurality of conductive traces and RF (radio frequency) traces, a chip disposed on a first surface of the insulating layer and electrically connected to the conductive traces, an encapsulant covering the chip and the circuit layer, a ground layer formed on a second surface of the insulating layer opposite to the first surface, and a plurality of solder balls disposed on the conductive traces or terminals on the conductive traces, wherein portions of the solder balls electrically connect the ground layer so as to allow the RF traces and the ground layer to form a microstrip line having an RF function, thus obtaining a single-layer carrier-free semiconductor package having low cost and simplified RF design. | 09-13-2012 |
20140080265 | FABRICATION METHOD OF CARRIER-FREE SEMICONDUCTOR PACKAGE - A carrier-free semiconductor package includes a circuit structure having an insulating layer and a circuit layer embedded in the insulating layer and having a plurality of conductive traces and RF (radio frequency) traces, a chip disposed on a first surface of the insulating layer and electrically connected to the conductive traces, an encapsulant covering the chip and the circuit layer, a ground layer formed on a second surface of the insulating layer opposite to the first surface, and a plurality of solder balls disposed on the conductive traces or terminals on the conductive traces, wherein portions of the solder balls electrically connect the ground layer so as to allow the RF traces and the ground layer to form a microstrip line having an RF function, thus obtaining a single-layer carrier-free semiconductor package having low cost and simplified RF design. | 03-20-2014 |
Patent application number | Description | Published |
20080208658 | METHOD AND SYSTEM FOR ESTIMATING SUPPLY IMPACT ON A FIRM UNDER A GLOBAL CRISIS - The availability of relevant business resources, or supply, during a global crisis or disruption are estimated by using a forecast of a baseline supply of human resources and various forms of infrastructure and raw materials for a firm as input. That forecast is corrected to account for the impact of a crisis or other disruption, and a corrected forecast as output is provided. The corrected forecast reflects changes in the availability of business resources due to the crisis or disruption, dependencies between resources, as well as any mitigating effects resulting from the implementation of mitigation policies. | 08-28-2008 |
20090083107 | METHOD AND SYSTEM FOR STRATEGIC GLOBAL RESOURCE SOURCING - Method and system for strategic global resource sourcing in one aspect incorporates concurrently a plurality of qualitative and quantitative attributes that influence performance of sourcing strategy with respect to one or more quantitative measures, quantifies an impact of said qualitative attributes using said one or more quantitative measures, and optimizes the sourcing strategy with respect to said one or more quantitative measures subject to one or more constraints. | 03-26-2009 |
20090164262 | METHOD AND STRUCTURE FOR RISK-BASED RESOURCE PLANNING FOR CONFIGURABLE PRODUCTS - A method for planning under uncertainty is disclosed. The method includes steps of processing a stochastic programming formulation based on forecast values of at least one of product and service configurations, and determining a resource requirements plan for one or more planning periods in a non-deterministic bill of resources of at least two levels. | 06-25-2009 |
20110054642 | Optimizing Consumption of Resources - Methods, systems and apparatus for optimizing consumption of one or more resources are presented. For example, a method that may be implemented on a processor device and includes obtaining user preferences for the consumption of resources that include water and electricity, predicting the consumption of, and a first metric for the consumption of, the resources for each of a plurality of first time periods, determining a projected second metric for the consumption of the resources during a second time period according to the predicted consumption and the predicted first metric, and optimizing the consumption of the resources according to the projected second metric and the user preferences. The second time period includes the plurality of first time periods. The first metric is associated with the user preferences and at least one of the plurality of first time periods. The second metric indicates full or partial projected attainment of the preferences during the second time period. | 03-03-2011 |
20110055087 | Determining Cost and Processing of Sensed Data - Methods, systems and apparatus for determining a proposed cost for use of sensor resources and selecting a method of processing of sensed data are presented. Such a method includes the steps of: predicting a state of an environment, obtaining at least one criterion related to the use of the sensor resources comprising one or more data sensors, determining the proposed cost for use of the sensor resources, acquiring the sensed data from the one or more data sensors, determining a characteristic of the sensed data, and selecting the method of processing the sensed data according to the determined characteristic and the predicted state. The at least one criterion is based upon the predicted state. The determining of the proposed cost is based on the at least one criterion. One or more of steps are implemented on the processor device. | 03-03-2011 |
Patent application number | Description | Published |
20100189329 | Ultrasound Imaging System Parameter Optimization Via Fuzzy Logic - An ultrasound scanner is equipped with one or more fuzzy control units that can perform adaptive system parameter optimization anywhere in the system. In one embodiment, an ultrasound system comprises a plurality of ultrasound image generating subsystems configured to generate an ultrasound image, the plurality of ultrasound image generating subsystems including a transmitter subsystem, a receiver subsystem, and an image processing subsystem; and a fuzzy logic controller communicatively coupled with at least one of the plurality of ultrasound imaging generating subsystems. The fuzzy logic controller is configured to receive, from at least one of the plurality of ultrasound imaging generating subsystems, input data including at least one of pixel image data and data for generating pixel image data; to process the input data using a set of inference rules to produce fuzzy output; and to convert the fuzzy output into numerical values or system states for controlling at least one of the transmit subsystem and the receiver subsystem that generate the pixel image data. | 07-29-2010 |
20120083695 | CONTINUOUS TRANSMIT FOCUSING METHOD AND APPARATUS FOR ULTRASOUND IMAGING SYSTEM - In one embodiment, an ultrasound imaging method comprises: providing a probe that includes one or more transducer elements for transmitting and receiving ultrasound waves; generating a sequence of spatially distinct transmit beams which differ in one or more of origin and angle; determining a transmit beam spacing substantially based upon a combination of actual and desired transmit beam characteristics, thereby achieving a faster echo acquisition rate compared to a transmit beam spacing based upon round-trip transmit-receive beam sampling requirements; storing coherent receive echo data, from two or more transmit beams of the spatially distinct transmit beams; combining coherent receive echo data from at least two or more transmit beams to achieve a substantially spatially invariant synthesized transmit focus at each echo location; and combining coherent receive echo data from each transmit firing to achieve dynamic receive focusing at each echo location. | 04-05-2012 |
20120095338 | ULTRASOUND IMAGING SYSTEM PARAMETER OPTIMIZATION VIA FUZZY LOGIC - An ultrasound scanner is equipped with one or more fuzzy control units that can perform adaptive system parameter optimization anywhere in the system. In one embodiment, an ultrasound system comprises a plurality of ultrasound image generating subsystems configured to generate an ultrasound image, the plurality of ultrasound image generating subsystems including a transmitter subsystem, a receiver subsystem, and an image processing subsystem; and a fuzzy logic controller communicatively coupled with at least one of the plurality of ultrasound imaging generating subsystems. The fuzzy logic controller is configured to receive, from at least one of the plurality of ultrasound imaging generating subsystems, input data including at least one of pixel image data and data for generating pixel image data; to process the input data using a set of inference rules to produce fuzzy output; and to convert the fuzzy output into numerical values or system states for controlling at least one of the transmit subsystem and the receiver subsystem that generate the pixel image data. | 04-19-2012 |
20140378834 | Continuous Transmit Focusing Method and Apparatus for Ultrasound Imaging System - An ultrasound imaging method comprises: providing a probe that includes one or more transducer elements for transmitting and receiving ultrasound waves; generating a sequence of spatially distinct transmit beams which differ in one or more of origin and angle; determining a transmit beam spacing substantially based upon a combination of actual and desired transmit beam characteristics, thereby achieving a faster echo acquisition rate compared to a transmit beam spacing based upon round-trip transmit-receive beam sampling requirements; storing coherent receive echo data, from two or more transmit beams of the spatially distinct transmit beams; combining coherent receive echo data from at least two or more transmit beams to achieve a substantially spatially invariant synthesized transmit focus at each echo location; and combining coherent receive echo data from each transmit firing to achieve dynamic receive focusing at each echo location. | 12-25-2014 |
20150073276 | ABERRATION CORRECTION USING CHANNEL DATA IN ULTRASOUND IMAGING SYSTEM - Embodiments of the present invention provide an ultrasound scanner equipped with an image data processing unit that can perform adaptive parameter optimization during image formation and processing. In one embodiment, an ultrasound system comprises a channel data memory to store channel data obtained by digitizing ultrasound image data produced by an image scan; an image data processor configured to process the stored channel data in the memory to reconstruct an ultrasound image for each of a plurality of trial values of at least one parameter to be optimized; and a parameter optimization unit configured to evaluate an image quality of the reconstructed ultrasound image for each trial value of the at least one parameter, and to determine the optimized value of the at least one parameter based on the evaluated image quality. | 03-12-2015 |
20160051233 | SYSTEM AND METHOD FOR PROVIDING VARIABLE ULTRASOUND ARRAY PROCESSING IN A POST-STORAGE MODE - An ultrasonic imaging method includes activating a transmit aperture within a multi-element transducer array, transmitting one or more ultrasonic beams along scan direction(s) that span the region of interest, for each transmit event, receiving ultrasound echoes from each element of a receive aperture, grouping the receive channel echo data into two or more sets corresponding to different receive sub-apertures, combining each sub-aperture data set to generate partially focused echo-location data for one or more reconstruction lines, and storing all the sub-aperture echo data sets during a storage period in a format that can be retrieved for later analysis. A method includes, during a post-storage period, retrieving stored sub-aperture data, combining the sub-aperture data to form one or more selected reconstruction lines, processing echo data to extract motion information from one or more sample positions along the selected reconstruction lines, and displaying an image representative of the processed motion information. | 02-25-2016 |
Patent application number | Description | Published |
20150194343 | SELF-ALIGNED REPAIRING PROCESS FOR BARRIER LAYER - A self-aligned repairing process for a barrier layer is provided. A repair layer is formed by chemical vapor deposition using an organometallic compound as a precursor gas. The precursor gas adsorbed on a dielectric layer exposed by defects in a barrier layer is transformed to an insulating metal oxide layer, and the precursor gas adsorbed on the barrier layer is transformed to a metal layer. | 07-09-2015 |
20150200126 | Semiconductor Structure With Inlaid Capping Layer And Method Of Manufacturing The Same - A method of fabricating a semiconductor structure includes forming a dielectric layer overlaying a substrate; forming a trench in the dielectric layer; forming a first barrier layer lining the trench; forming a conductive layer overlaying the first barrier layer; forming a second barrier layer overlaying the conductive layer; forming a metallic sacrificial layer to cover the second barrier layer and to fill the trench; and performing a polishing process to remove the materials above a bottom portion of the second barrier layer. | 07-16-2015 |
20150200132 | Metal Capping Process And Processing Platform Thereof - Before depositing a metal capping layer on a metal interconnect in a damascene structure, a remote plasma is used to reduce native oxide formed on the metal interconnect. Accordingly, a remote plasma reducing chamber is integrated in a processing platform for depositing a metal capping layer. | 07-16-2015 |
20150201501 | Selective Repairing Process For Barrier Layer - A selectively repairing process for a barrier layer is provided. A repair layer is formed by chemical vapor deposition using an organosilicon compound as a precursor gas. The precursor gas adsorbed on a low-k dielectric layer exposed by defects in a barrier layer is transformed to a porous silicon oxide layer has a density more than the density of the low-k dielectric layer. | 07-16-2015 |
20150206791 | METHOD FOR FORMING SEMICONDUCTOR DEVICE STRUCTURE - In accordance with some embodiments, a method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer on a semiconductor substrate. The dielectric layer has at least one first trench in the dielectric layer. The method also includes forming a seed layer on a sidewall and a bottom surface of the first trench. The method further includes forming a first conductive layer on the seed layer. The method includes performing a thermal treatment process to melt and transform the seed layer and the first conductive layer into a second conductive layer. The method also includes forming a third conductive layer on the second conductive layer to fill the first trench. | 07-23-2015 |
20150206840 | SEMICONDUCTOR DEVICE STRUCTURE AND METHOD OF MANUFACTURING THE SAME - Embodiments of mechanisms for forming a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate. The semiconductor device structure further includes a dielectric layer on the semiconductor substrate. The semiconductor device structure also includes at least one conductive structure embedded in the dielectric layer. A plurality of crystal grains are composed of the conductive structure, and a ratio of an average grain size of the crystal grains to a width of the conductive structure ranges from about 0.75 to about 40. | 07-23-2015 |
20150235823 | PLASMA APPARATUS, MAGNETIC-FIELD CONTROLLING METHOD, AND SEMICONDUCTOR MANUFACTURING METHOD - Embodiments of a plasma apparatus are provided. The plasma apparatus includes a processing chamber and a wafer chuck disposed in the processing chamber. The plasma apparatus also includes a target element located over the wafer chuck and an electromagnet array located over the target element and having a number of electromagnets. Some of the electromagnets in a magnetic-field zone of the electromagnet array are enabled to generate a magnetic field adjacent to the target element. The magnetic-field zone is moved during a semiconductor manufacturing process. | 08-20-2015 |
Patent application number | Description | Published |
20120019752 | DISPLAY, ELECTRONIC DEVICE AND DISPLAY METHOD OF DISPLAY - A display including a display panel and a switchable retarder is provided. The switchable retarder disposed on a light path of a polarized image having a first polarization provided by the display panel and includes a first substrate, first electrode stripes, second electrode stripes, and a retardation medium. The first electrode stripes and the second electrode stripes are disposed between the display panel and the first substrate, and are electrically independent from each other. A retardation region is defined by each first electrode stripe and one second electrode stripe. The retardation medium is located at a side of the first electrode stripes and at a side of the second electrode stripes, and is controlled by an electric field in the corresponding retardation region such that each retardation region provides a retardation. Accordingly, the polarized image having the first polarization is transformed into the polarized image having a second polarization. | 01-26-2012 |
20140340747 | DISPLAY AND ELECTRONIC DEVICE - A display including a display panel and a switchable retarder is provided. The switchable retarder disposed on a light path of a polarized image having a first polarization provided by the display panel and includes a first substrate, first electrode stripes, second electrode stripes, and a retardation medium. The first electrode stripes and the second electrode stripes are disposed between the display panel and the first substrate, and are electrically independent from each other. A retardation region is defined by each first electrode stripe and one second electrode stripe. The retardation medium is located at a side of the first electrode stripes and at a side of the second electrode stripes, and is controlled by an electric field in the corresponding retardation region such that each retardation region provides a retardation. Accordingly, the polarized image having the first polarization is transformed into the polarized image having a second polarization. | 11-20-2014 |