Patent application number | Description | Published |
20090162642 | PAPER CONTAINING PREGGREGATED FILLER AND PROCESS FOR PRODUCING THE SAME - Provide a paper offering good paper strength properties in terms of strength and stiffness, high smoothness and excellent printing quality by adjusting the ash content in paper to a range of 3 to 40 percent by solid weight and allowing the paper to contain a pre-coagulated filler having an average particle size of 10 to 80 μm as measured by the laser diffraction method, wherein such filler is obtained by processing a filler using a composite acrylamide copolymer comprising (A) an anionic polysaccharide and (B) a cationic and/or amphoteric acrylamide copolymer. | 06-25-2009 |
20100108280 | NEWSPRINT PAPER FOR OFFSET PRINTING - A method of manufacturing a newsprint paper for offset printing, includes: selecting a filler or fillers having an average grain size of 0.5 to 5 μm and a zeta potential of 0 mV or above; providing a pulp slurry for making a base paper; adding the filler or fillers to the pulp slurry in an amount of more than 15 percent by weight but less than 40 percent by weight as ash relative to the dry weight of the base paper; and subjecting the resultant slurry to a papermaking machine to obtain the base paper. | 05-06-2010 |
20100170650 | Printability improving agents and papers coated with them - A printability improving agent for use in a neutral newsprint base paper which is printed with ecological inks, containing (I) a cationic copolymer obtained by polymerizing one or more hydrophobic monomer unit(s) selected from styrenes and alkyl acrylates and/or alkyl methacrylates with a quaternary ammonium salt-containing monomer unit, and (II) a copolymer obtained by polymerizing 100 parts by weight of one or more hydrophobic monomer(s) selected from the group above in the presence of 1-10 parts by weight of a surfactant. | 07-08-2010 |
20110303377 | NEWSPRINT PAPER FOR OFFSET PRINTING - A method of manufacturing a newsprint paper for offset printing, includes: selecting a filler or fillers having an average grain size of 0.5 to 5 μm and a zeta potential of 0 mV or above; providing a pulp slurry for making a base paper; adding the filler or fillers to the pulp slurry in an amount of more than 15 percent by weight but less than 40 percent by weight as ash relative to the dry weight of the base paper; and subjecting the resultant slurry to a papermaking machine to obtain the base paper. | 12-15-2011 |
Patent application number | Description | Published |
20090021974 | SEMICONDUCTOR DEVICE - A semiconductor device where multiple chips of identical design can be stacked, and the spacer and interposer eliminated, to improve three-dimensional coupling information transmission capability. A first semiconductor circuit including a three-dimensional coupling circuit (three-dimensional coupling transmission terminal group and three-dimensional coupling receiver terminal group); and a second semiconductor integrated circuit including a three-dimensional coupling circuit and feed-through electrode (power supply via hole and ground via hole); and a third semiconductor integrated circuit including a three-dimensional coupling circuit and feed-through electrode are stacked on the package substrate. | 01-22-2009 |
20090031053 | SEMICONDUCTOR INTEGRATED CIRCUIT AND SEMICONDUCTOR DEVICE WITH THE SAME - An interconnect configuration technology of making an access from an IP mounted on a semiconductor chip to an IP mounted on another semiconductor chip by transmitting and receiving a packet transferred through an interconnect built in a semiconductor chip among the chips using the 3D coupling technology. The device according to the technology has an initiator for transmitting an access request, a target for receiving the access request and transmitting an access response, a router for relaying the access request and the access response, and a 3D coupling circuit (three-dimensional transceiver) for performing communication with the outside, wherein the 3D coupling circuit is disposed adjacent to the router. | 01-29-2009 |
20090059943 | DATA PROCESSING SYSTEM - A data processing system enabling an outstanding-based variable flow control is provided. The data processing system includes a first semiconductor integrated circuit possessing an initiator and a second semiconductor integrated circuit possessing a target. The initiator transmits a request packet to the target, the target transmits a response packet to the initiator, and split transaction interface is practiced. The initiator includes an outstanding number counting circuit for counting an outstanding number defined by the difference in number between the request packets transmitted and the response packets received. The request packet transmission number is controlled so that the count value of the outstanding number counting circuit may not exceed the outstanding number to which the target can respond. The outstanding number is dynamically changeable to a suitable number so that the maximum latency from the issue of the request packet to the reception of the response packet is suppressed. | 03-05-2009 |
20090245445 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor device including a pair of stacked semiconductor ICs capable of communicating with each other by wireless. Each IC has: a transmitter circuit operable to send, by wireless, transmit data together with a clock signal deciding a transmission timing, and arranged so that the wireless transmission timing is adjustable; a receiver circuit operable to receive data in synchronization with a clock signal received by wireless, and arranged so that its wireless reception timing is adjustable; and a control circuit operable to perform timing adjustments of the transmitter and receiver circuits based on a result of authentication of data returned by the other IC in response to data transmitted through the transmitter circuit, and received by the receiver circuit. This arrangement for near field communication between stacked semiconductor ICs enables: reduction of the scale of a circuit for communication timing adjustment; and highly accurate adjustment of the communication timing. | 10-01-2009 |
20100182848 | SEMICONDUCTOR DEVICE AND DATA PROCESSOR - To improve the speed of accessing a low-speed circuit block from a high-speed circuit block without significantly increasing power consumption. | 07-22-2010 |
20110314323 | SEMICONDUCTOR DEVICE AND DATA PROCESSOR - To improve the speed of accessing a low-speed circuit block from a high-speed circuit block without significantly increasing power consumption. | 12-22-2011 |
20130073765 | SEMICONDUCTOR DEVICE AND DATA PROCESSOR - In a data processor having a bus controller that performs timing control of access from the CPU operated in synchronization with a high-speed first clock signal to a peripheral circuit operated in synchronization with a low-speed second clock signal, a timing control circuit is provided between the peripheral circuit and the bus controller, and the bus controller causes, in response to a read instruction from the peripheral circuit, the timing control circuit to output data held by the peripheral circuit to the bus controller in synchronization with the cycle of the high-speed clock signal, causes the timing control circuit to start, in response to a write instruction directed to the peripheral circuit, writing into the peripheral circuit in synchronization with the cycle of the high-speed clock signal, and terminates the writing in synchronization with the cycle of the low-speed clock signal. | 03-21-2013 |
Patent application number | Description | Published |
20110161688 | INFORMATION PROCESSING APPARATUS - According to one embodiment, an information processing apparatus includes a body housing comprising a top surface, a display housing connected to the body housing to pivotably move between a close position where the top surface is covered by the display housing and an open position where the top surface is opened, an acceleration sensor configured to detect an acceleration of the information processing apparatus, an opening/closing sensor configured to detect whether the display housing is located in the close position, an interface port provided in the body housing and configured to be connectable with an external device, and a controller configured to determine whether to power the interface port based on outputs of the acceleration sensor and the opening/closing sensor. | 06-30-2011 |
20130083249 | TELEVISION RECEIVER AND ELECTRONIC DEVICE - According to one embodiment, a television receiver includes: a display; a circuit board; a housing; an antenna; and a shield. The display includes a display screen. The circuit board is located at a side of the display opposite the display screen. The housing is configured to house the display and the circuit board. The antenna is in the housing, and includes a communication portion and a ground portion. The shield is along a periphery of the ground portion in the housing, and is located between the antenna and the circuit board. | 04-04-2013 |
20130107126 | STAND, DOCKING STATION, AND SUPPORTING DEVICE FOR TELEVISION RECEIVER AND ELECTRONIC EQUIPMENT | 05-02-2013 |
20130107137 | TELEVISION RECEIVER AND ELECTRONIC DEVICE | 05-02-2013 |
20140022749 | TELEVISION RECEIVER AND ELECTRONIC DEVICE - According to one embodiment, a television receiver includes: a display; a circuit board; a housing; an antenna; and a shield. The display includes a display screen. The circuit board is located at a side of the display opposite the display screen. The housing is configured to house the display and the circuit board. The antenna is in the housing, and includes a communication portion and a ground portion. The shield is along a periphery of the ground portion in the housing, and is located between the antenna and the circuit board. | 01-23-2014 |