Patent application number | Description | Published |
20100223525 | ERROR DETECTION DEVICE AND METHODS THEREOF - A first error detection for a first data word is performed using a first error correction code associated with the first data word. In response to the first error detection indicating a first uncorrectable error at the first data word based upon the first error correction code, a second error detection for a plurality of data words including the first data word and a second data word is performed using a second error correction code based upon the first and second data words. | 09-02-2010 |
20100301482 | SRAM BIT CELL WITH SELF-ALIGNED BIDIRECTIONAL LOCAL INTERCONNECTS - Improved SRAMs are formed with significantly reduced local interconnect to gate shorts, by a technique providing bidirectional, self-aligned local interconnects, employing a gate hard mask over portions of the gates not connected to the local interconnects. Embodiments include forming a gate hard mask over gates, forming bidirectional trenches overlying portions of the gate electrodes and active silicon regions, etching the hard mask layer to expose regions of the gate electrodes that are to connect to local interconnects, and filling the trenches with conductive material to form self-aligned local interconnects. | 12-02-2010 |
20120037996 | SRAM BIT CELL WITH SELF-ALIGNED BIDIRECTIONAL LOCAL INTERCONNECTS - Improved SRAMs are formed with significantly reduced local interconnect to gate shorts, by a technique providing bidirectional, self-aligned local interconnects, employing a gate hard mask over portions of the gates not connected to the local interconnects. Embodiments include forming a gate hard mask over gates, forming bidirectional trenches overlying portions of the gate electrodes and active silicon regions, etching the hard mask layer to expose regions of the gate electrodes that are to connect to local interconnects, and filling the trenches with conductive material to form self-aligned local interconnects. | 02-16-2012 |
20130069964 | METHOD AND APPARATUS FOR PROVIDING COMPLIMENTARY STATE RETENTION - A method, integrated circuit and apparatus are operative to control a plurality of passive variable resistance memory cells to store complimentary state information from at least one active memory circuit, such as a flop, latch, or any other suitable state generation circuit. The method, apparatus and integrated circuit may be operative to control the plurality of passive variable resistance memory cells to also restore the stored complimentary state information for the at least one active memory. | 03-21-2013 |
20130070513 | METHOD AND APPARATUS FOR DIRECT BACKUP OF MEMORY CIRCUITS - An integrated circuit employs at least one active memory circuit and at least one memory state backup circuit wherein the at least one memory state backup circuit includes at least one passive variable resistance memory cell and at least one passive variable resistance memory cell interface that are used to backup data from the active memory circuit to the PVRM cell. Data is then placed back into the active memory circuit from the PVRM cell during a restore operation. The PVRM cell interface is operative to read the PVRM cell in response to a restore signal. PVRM cell interface control logic is operative to remove power to the PVRM cell after backup of the data to the PVRM cell from the active memory circuit. A PVRM cell (e.g., a bit cell) is added to each memory circuit that stores state information on an integrated circuit. | 03-21-2013 |
20130070514 | INTEGRATED CIRCUIT WITH ON-DIE DISTRIBUTED PROGRAMMABLE PASSIVE VARIABLE RESISTANCE FUSE ARRAY AND METHOD OF MAKING SAME - An integrated circuit employs a plurality of functional blocks, such as but not limited to, processors (e.g., cores), and an on-die distributed programmable passive variable resistance memory array configured to provide configuration information for each of the plurality of functional blocks. A corresponding sub-portion of the on-die distributed programmable passive variable resistance memory array is fabricated in layers above each respective plurality of functional blocks. The on-die distributed programmable passive variable resistance memory array is used as either non-volatile prepackage configuration information store, or a non-volatile post-package configuration information store that may allow dynamic changing of hardware configuration of the functional blocks both during normal operation and prior to die packaging. A method for making the same is also disclosed. | 03-21-2013 |
20130083048 | INTEGRATED CIRCUIT WITH ACTIVE MEMORY AND PASSIVE VARIABLE RESISTIVE MEMORY WITH SHARED MEMORY CONTROL LOGIC AND METHOD OF MAKING SAME - An integrated circuit includes, in one example, an active memory cell array and a passive variable resistance memory cell array positioned above the active memory cell array, such as in upper layers of the integrated circuit. The active memory cell array and the passive variable resistance memory cell array share one or more components of memory control logic such as address decode logic, data read logic and/or data write logic. As such, a type of active memory and passive variable resistance memory hybrid structure shares memory control logic such as word line drivers, bit line drivers and read logic. The active memory cell array and passive variable resistance memory cell array overlap reducing integrated circuit die size, improving power reduction and reducing costs by sharing peripheral circuits. | 04-04-2013 |
Patent application number | Description | Published |
20090021838 | VISUAL EFFECT APPARATUS FOR DISPLAYING INTERLACED IMAGES USING BLOCK OUT GRIDS - A container for producing a graphical image. The container includes a container wall with front and rear portions. A label is included that extends about the circumference of the container with an inner surface contacting an exterior surface of the rear portion of the container wall and contacting an exterior surface of the front portion of the container wall. The label includes a block out grid made up of alternating block out lines and transparent viewing gaps on the outer or inner surface of the label. The view gaps provide a line of sight to subset of the segments of an interlaced image provided on or proximate to the rear portion of the container wall when the block out grid is positioned near the front portion of the container wall. The label may be used to create an air gap between the block out grid and the interlaced image. | 01-22-2009 |
20100180928 | SOLAR ARRAYS AND OTHER PHOTOVOLTAIC (PV) DEVICES USING PV ENHANCEMENT FILMS FOR TRAPPING LIGHT - A solar energy conversion assembly for efficiently capturing solar energy by providing additional chances to absorb reflected sunlight. The assembly includes one or more solar cells that each include a light-receiving surface. A fraction of light incident upon the light-receiving surface is reflected. The assembly includes a photovoltaic (PV) enhancement film of transparent material such as plastic positioned to cover at least a portion of the light-receiving surface. The PV enhancement film includes a substrate positioned proximate to or abutting the light-receiving surface. The film includes a plurality of total internal reflection (TIR) elements on the substrate opposite the light-receiving surface. The TIR elements transmit initially received or incident light to the light-receiving surface of the solar cell without significant focusing and then use TIR to trap a substantial portion of the reflected light to provide additional chances for absorption such that typically lost light may be converted to electricity. | 07-22-2010 |
20100180929 | PHOTOVOLTAIC (PV) ENHANCEMENT FILMS FOR ENHANCING OPTICAL PATH LENGTHS AND FOR TRAPPING REFLECTED LIGHT - A solar energy conversion assembly for efficiently capturing solar energy by providing additional chances to absorb reflected sunlight and providing longer path lengths in the photovoltaic (PV) material. The assembly includes a PV device including a layer of PV material and a protective top covering the PV material (e.g., a planar glass cover applied with adhesive to the PV material). The assembly further includes a PV enhancement film formed of a substantially transparent material, and film is applied to at least a portion of the protective top such as with a substantially transparent adhesive. The PV enhancement film includes a plurality of absorption enhancement structures on the substrate opposite the PV device. Each absorption enhancement structure includes a light receiving surface that refracts incident light striking the PV enhancement film to provide an average path length ratio of greater than about 1.20 in the layer of PV material. | 07-22-2010 |
20100185991 | COMPUTER-IMPLEMENTED METHOD OF OPTIMIZING REFRACTION AND TIR STRUCTURES TO ENHANCE PATH LENGTHS IN PV DEVICES - A computer-implemented method is provided for optimizing configuration of absorption enhancement structures for use in a photovoltaic enhancement film that is applied onto a PV device to improve absorption. The method includes receiving optimization run input defining a PV enhancement film including defining absorption enhancement structures with differing configurations. The method includes modeling a PV device including PV material such as a silicon thin film. A first ray tracing is performed over a range of incidence angles for the PV device. The method includes determining a set of base path angles for the PV material layer based on this first ray tracing. A second ray tracing is performed for the PV device with the enhancement film, which has absorption enhancement structures. Enhanced path lengths are determined based on the second ray tracking, and path length ratios are determined by comparing the enhanced path lengths to the base path lengths. | 07-22-2010 |
20110067687 | Tracking Fiber Optic Wafer Concentrator - A solar power system for supplying concentrated solar energy. The system includes a cylindrical absorber tube carrying the working fluid and a concentrator assembly, which includes an array of linear lenses such as Fresnel lenses. The concentrator assembly includes a planar optical wafer paired with each of the linear lenses to direct light, which the lenses focus on a first edge of the wafers, onto the collector via a second or output edge of the wafers. Each of the optical wafers is formed from a light transmissive material and acts as a light “pipe.” The lens array is spaced apart a distance from the first edges of the optical wafers. This distance or lens array height is periodically adjusted to account for seasonal changes in the Sun's position, such that the focal point of each linear lens remains upon the first edge of one of the optical wafers yearlong. | 03-24-2011 |
20110079267 | LENS SYSTEM WITH DIRECTIONAL RAY SPLITTER FOR CONCENTRATING SOLAR ENERGY - A concentration system or solar concentrator for supplying concentrated solar energy. The system includes a lens array with linear lenses focusing light received on an outer surface onto a number of focal point or focused lines of light. The system includes a light wafer with a substantially planar body formed of a thickness of a light transmissive material. The body includes a top surface facing the lens array and receiving the focused light from at least one the linear lens and further includes a bottom surface opposite the top surface. The light wafer includes a ray splitter, in the form of a triangular air gap, paired to each linear lens at or near a focal point of the paired lens to direct the received focused light into the body or towards edges or sides of the body where a solar collector such as a thermal or photovoltaic collector is positioned. | 04-07-2011 |
20110214665 | Tracking Fiber Optic Wafer Concentrator - A solar power system for supplying concentrated solar energy. The system includes a cylindrical absorber tube carrying the working fluid and a concentrator assembly, which includes an array of linear lenses such as Fresnel lenses. The concentrator assembly includes a planar optical wafer paired with each of the linear lenses to direct light, which the lenses focus on a first edge of the wafers, onto the collector via a second or output edge of the wafers. Each of the optical wafers is formed from a light transmissive material and acts as a light “pipe.” The lens array is spaced apart a distance from the first edges of the optical wafers, This distance or lens array height is periodically adjusted to account for seasonal changes in the Sun's position, such that the focal point of each linear lens remains upon the first edge of one of the optical wafers yearlong. | 09-08-2011 |
20110232721 | PHOTOVOLTAIC (PV) ENHANCEMENT FILMS OR PROTECTIVE COVERS FOR ENHANCING SOLAR CELL EFFICIENCES - A solar energy conversion assembly for efficiently capturing solar energy by providing additional chances to absorb reflected sunlight and providing longer path lengths in the photovoltaic (PV) material. The assembly includes a PV device including a layer of PV material and a protective top covering the PV material (e.g., a planar glass cover applied with adhesive to the PV material). The assembly further includes a PV enhancement film formed of a substantially transparent material, and film is applied to at least a portion of the protective top such as with a substantially transparent adhesive. The PV enhancement film includes a plurality of absorption enhancement structures on the substrate opposite the PV device. Each absorption enhancement structure includes a light receiving surface that refracts incident light striking the PV enhancement film to provide an average path length ratio of greater than about 1.20 in the layer of PV material. | 09-29-2011 |