Patent application number | Description | Published |
20100123851 | Backlight Module and Display Device Using the Same - The present disclosure is a backlight module including a light guide plate, a supporter, and a light source module. The light guide plate has a light incident side. The supporter has a bottom plate, a sidewall, and a top plate corresponding to the bottom plate. The bottom plate extends from a first end of the sidewall toward the light guide plate, and the top plate extends along a second end of the sidewall toward the light guide plate. The length of the sidewall is longer than the length of the top plate, such that the top plate corresponding to the sidewall forms at least one breach to expose the second end of the sidewall. The bottom plate, the top plate, and the sidewall together form an accommodating space, and the light incident side of the light guide plate is disposed between the top plate and the bottom plate. The light source module is disposed in the accommodating space and partially exposed through the at least one breach. The light source module has at least one light emitting unit and a printed circuit board. The light emitting unit is disposed on the printed circuit board, such that an emitting surface of the light emitting unit can face the light incident side of the light guide plate. | 05-20-2010 |
20100245716 | Display Device and Backlight Module with Thermal Isolating Layer - A display device and a backlight module thereof are provided. The display device further includes a display panel having a display area. The backlight module is disposed under the display panel and includes a light source holder, a light source, and a light guide plate. The light source holder has a sidewall, a top plate, and a bottom plate, wherein the bottom plate partially overlaps the display area of the display device. The light guide plate is disposed corresponding to the display area of the display device and has one end located in an opening between the top plate and the bottom plate. A thermal isolating layer is interposed between the light guide plate and a portion of the bottom plate which corresponds to the display area. The perpendicular distance between the light guide plate and the portion of the bottom plate overlapping the thermal isolating layer is greater than a perpendicular distance between the light guide plate and the other portion of the bottom plate. | 09-30-2010 |
20120161191 | LIGHT-EMITTING MODULE - A light-emitting module includes a light-emitting diode package structure and an insulating support structure. The light-emitting diode package structure includes a package base and at least two leads. The package base has a first surface, and each lead has a bonding surface. The insulating support structure has a second surface and a third surface opposite to each other, and the insulating support structure is disposed under the package base, so that the first surface is in contact with the second surface. The bonding surfaces and the third surface are located in different planes. | 06-28-2012 |
20130299869 | LIGHT-EMITTING MODULE - A light-emitting module includes a light-emitting diode package structure and an insulating support structure. The light-emitting diode package structure includes a package base and at least two leads. The package base has a first surface, and each lead has a bonding surface. The insulating support structure has a second surface and a third surface opposite to each other, and the insulating support structure is disposed under the package base, so that the first surface is in contact with the second surface. The bonding surfaces and the third surface are located in different planes. | 11-14-2013 |
Patent application number | Description | Published |
20090060750 | Fluid transportation device - A fluid transportation device includes a valve seat, a valve cap, a valve membrane, multiple buffer chambers, a vibration film and an actuator. The valve membrane is arranged between the valve seat and the valve cap, and includes several hollow-types valve switches, which includes at least a first valve switch and a second valve switch. The multiple buffer chambers include a first buffer chamber between the valve membrane and the valve cap and a second buffer chamber between the valve membrane and the valve seat. The vibration film is separated from the valve cap when the fluid transportation device is in a non-actuation status, thereby defining a pressure cavity. The actuator is connected to the vibration film. When the actuator is driven to be subject to deformation, the vibration film connected to the actuator is transmitted to render a volume change of the pressure cavity and result in a pressure difference for moving the fluid. | 03-05-2009 |
20090217994 | Multi-channel fluid conveying apparatus - A multi-channel fluid conveying apparatus, for delivering a fluid, includes a valve seat, a valve cover, a valve membrane, a plurality of temporary-deposit chambers, and an actuating device. The valve seat includes at least one inlet channel and at least one outlet channel. The valve cover is arranged on the valve seat. The valve membrane is interposed between the valve seat and the valve cover and includes a plurality of valve structures made of the same material with the same thickness, wherein at least one of the valve structures has a rigidity different from those of other valve structures. The plurality of temporary-deposit chambers is interposed between the valve membrane and the valve cover and between the valve membrane and the valve seat. The actuating device is, having a periphery, fixed to the valve cover. | 09-03-2009 |
Patent application number | Description | Published |
20100123851 | Backlight Module and Display Device Using the Same - The present disclosure is a backlight module including a light guide plate, a supporter, and a light source module. The light guide plate has a light incident side. The supporter has a bottom plate, a sidewall, and a top plate corresponding to the bottom plate. The bottom plate extends from a first end of the sidewall toward the light guide plate, and the top plate extends along a second end of the sidewall toward the light guide plate. The length of the sidewall is longer than the length of the top plate, such that the top plate corresponding to the sidewall forms at least one breach to expose the second end of the sidewall. The bottom plate, the top plate, and the sidewall together form an accommodating space, and the light incident side of the light guide plate is disposed between the top plate and the bottom plate. The light source module is disposed in the accommodating space and partially exposed through the at least one breach. The light source module has at least one light emitting unit and a printed circuit board. The light emitting unit is disposed on the printed circuit board, such that an emitting surface of the light emitting unit can face the light incident side of the light guide plate. | 05-20-2010 |
20100245716 | Display Device and Backlight Module with Thermal Isolating Layer - A display device and a backlight module thereof are provided. The display device further includes a display panel having a display area. The backlight module is disposed under the display panel and includes a light source holder, a light source, and a light guide plate. The light source holder has a sidewall, a top plate, and a bottom plate, wherein the bottom plate partially overlaps the display area of the display device. The light guide plate is disposed corresponding to the display area of the display device and has one end located in an opening between the top plate and the bottom plate. A thermal isolating layer is interposed between the light guide plate and a portion of the bottom plate which corresponds to the display area. The perpendicular distance between the light guide plate and the portion of the bottom plate overlapping the thermal isolating layer is greater than a perpendicular distance between the light guide plate and the other portion of the bottom plate. | 09-30-2010 |
20120020096 | Light Module, Composite Circuit Board Device Used Therein, and Assembling Method Thereof - A light module and an assembling method thereof are disclosed. The light module includes a first circuit board, a second circuit board, and a light source, wherein the first circuit board has a first opening and a second opening, and the second circuit board has a first bending portion. The light source is disposed on the first circuit board. The second circuit board passes through the first opening and the second opening of the first circuit board to form the first bending portion and the first circuit board and the second circuit board are fixed together to complete the light module assembling. | 01-26-2012 |
20120161191 | LIGHT-EMITTING MODULE - A light-emitting module includes a light-emitting diode package structure and an insulating support structure. The light-emitting diode package structure includes a package base and at least two leads. The package base has a first surface, and each lead has a bonding surface. The insulating support structure has a second surface and a third surface opposite to each other, and the insulating support structure is disposed under the package base, so that the first surface is in contact with the second surface. The bonding surfaces and the third surface are located in different planes. | 06-28-2012 |
20130107571 | DISPLAY APPARATUS | 05-02-2013 |
20130208509 | Backlight Module and Thermal Design Thereof - A backlight module includes a light guide plate, a light source module, a supporting frame, and a heat conductive glue layer. The light guide plate has a light-entering end; the light source module is disposed corresponding to the light-entering end and includes a flexible circuit board and a plurality of light sources. The flexible circuit board extends along the light-entering end and has a light source-bearing area and a heat-dissipating area, wherein a width of the heat-dissipating area in a direction perpendicular to the light-entering end is not smaller than a width of the light source-bearing area. The plurality of light sources are disposed in the light source-bearing area. The supporting frame has a holding portion which is bent to form an accommodation space for accommodating the light source module and the light-entering end. The heat conductive glue layer is disposed between the heat-dissipating area and an inner side of the holding portion for conducting heat from the heat-dissipating area to the holding portion. | 08-15-2013 |
20130299869 | LIGHT-EMITTING MODULE - A light-emitting module includes a light-emitting diode package structure and an insulating support structure. The light-emitting diode package structure includes a package base and at least two leads. The package base has a first surface, and each lead has a bonding surface. The insulating support structure has a second surface and a third surface opposite to each other, and the insulating support structure is disposed under the package base, so that the first surface is in contact with the second surface. The bonding surfaces and the third surface are located in different planes. | 11-14-2013 |
20140233257 | LIGHT EMITTING MODULE APPLIED TO DISPLAY DEVICE - A light emitting module includes a first circuit board, a driver chip, two connectors, a second circuit board and a plurality of light emitting units. The driver chip is disposed on the first circuit board. The two connectors are disposed on the first circuit board and electrically connected to the driver chip. The second circuit board has two groups of connecting cables and each group of connecting cables is electrically connected to one of the two connectors. The light emitting units are disposed on the second circuit board and electrically connected to the two groups of connecting cables. | 08-21-2014 |
Patent application number | Description | Published |
20120181629 | HV Interconnection Solution Using Floating Conductors - A device includes a first and a second heavily doped region in a semiconductor substrate. An insulation region has at least a portion in the semiconductor substrate, wherein the insulation region is adjacent to the first and the second heavily doped regions. A gate dielectric is formed over the semiconductor substrate and having a portion over a portion of the insulation region. A gate is formed over the gate dielectric. A floating conductor is over and vertically overlapping the insulation region. A metal line includes a portion over and vertically overlapping the floating conductor, wherein the metal line is coupled to, and carries a voltage of, the second heavily doped region. | 07-19-2012 |
20120319240 | High Voltage Resistor With Pin Diode Isolation - Provided is a high voltage semiconductor device that includes a PIN diode structure formed in a substrate. The PIN diode includes an intrinsic region located between a first doped well and a second doped well. The first and second doped wells have opposite doping polarities and greater doping concentration levels than the intrinsic region. The semiconductor device includes an insulating structure formed over a portion of the first doped well. The semiconductor device includes an elongate resistor device formed over the insulating structure. The resistor device has first and second portions disposed at opposite ends of the resistor device, respectively. The semiconductor device includes an interconnect structure formed over the resistor device. The interconnect structure includes: a first contact that is electrically coupled to the first doped well and a second contact that is electrically coupled to a third portion of the resistor located between the first and second portions. | 12-20-2012 |
20130032862 | High Voltage Resistor with High Voltage Junction Termination - Provided is a high voltage semiconductor device. The high voltage semiconductor device includes a substrate that includes a doped well disposed therein. The doped well and the substrate have opposite doping polarities. The high voltage semiconductor device includes an insulating device disposed over the doped well. The high voltage semiconductor device includes an elongate resistor disposed over the insulating device. A non-distal portion of the resistor is coupled to the doped well. The high voltage semiconductor device includes a high-voltage junction termination (HVJT) device disposed adjacent to the resistor. | 02-07-2013 |
20130134512 | Power MOSFETs and Methods for Forming the Same - A power MOSFET includes a semiconductor region extending from a top surface of a semiconductor substrate into the semiconductor substrate, wherein the semiconductor region is of a first conductivity type. A gate dielectric and a gate electrode are disposed over the semiconductor region. A drift region of a second conductivity type opposite the first conductivity type extends from the top surface of the semiconductor substrate into the semiconductor substrate. A dielectric layer has a portion over and in contact with a top surface of the drift region. A conductive field plate is over the dielectric layer. A source region and a drain region are on opposite sides of the gate electrode. The drain region is in contact with the first drift region. A bottom metal layer is over the field plate | 05-30-2013 |
20130313617 | Embedded JFETs for High Voltage Applications - A device includes a buried well region and a first HVW region of the first conductivity, and an insulation region over the first HVW region. A drain region of the first conductivity type is disposed on a first side of the insulation region and in a top surface region of the first HVW region. A first well region and a second well region of a second conductivity type opposite the first conductivity type are on the second side of the insulation region. A second HVW region of the first conductivity type is disposed between the first and the second well regions, wherein the second HVW region is connected to the buried well region. A source region of the first conductivity type is in a top surface region of the second HVW region, wherein the source region, the drain region, and the buried well region form a JFET. | 11-28-2013 |
20140139282 | Embedded JFETs for High Voltage Applications - A device includes a buried well region and a first HVW region of the first conductivity, and an insulation region over the first HVW region. A drain region of the first conductivity type is disposed on a first side of the insulation region and in a top surface region of the first HVW region. A first well region and a second well region of a second conductivity type opposite the first conductivity type are on the second side of the insulation region. A second HVW region of the first conductivity type is disposed between the first and the second well regions, wherein the second HVW region is connected to the buried well region. A source region of the first conductivity type is in a top surface region of the second HVW region, wherein the source region, the drain region, and the buried well region form a JFET. | 05-22-2014 |
20140197489 | Power MOSFETs and Methods for Forming the Same - Power Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) and methods of forming the same are provided. A power MOSFET may comprise a first drift region formed at a side of a gate electrode, and a second drift region beneath the gate electrode, adjacent to the first drift region, with a depth less than a depth of the first drift region so that the first drift region and the second drift region together form a stepwise shape. A sum of a depth of the second drift region, a depth of the gate dielectric, and a depth of the gate electrode may be of substantially a same value as a depth of the first drift region. The first drift region and the second drift region may be formed at the same time, using the gate electrode as a part of the implanting mask. | 07-17-2014 |
20140231884 | BOOTSTRAP MOS FOR HIGH VOLTAGE APPLICATIONS - A device includes a p-well region, and a first High-Voltage N-type Well (HVNW) region and a second HVNW region contacting opposite edges of the p-well region. A P-type Buried Layer (PBL) has opposite edges in contact with the first HVNW region and the second HVNW region. An n-type buried well region is underlying the PBL. The p-well region and the n-type buried well region are in contact with a top surface and a bottom surface, respectively, of the PBL. The device further includes a n-well region in a top portion of the p-well region, an n-type source region in the n-well region, a gate stack overlapping a portion of the p-well region and a portion of the second HVNW region, and a channel region under the gate stack. The channel region interconnects the n-well region and the second HVNW region. | 08-21-2014 |
20150162442 | Power MOSFETs and Methods for Forming the Same - Power Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) and methods of forming the same are provided. A power MOSFET may comprise a first drift region formed at a side of a gate electrode, and a second drift region beneath the gate electrode, adjacent to the first drift region, with a depth less than a depth of the first drift region so that the first drift region and the second drift region together form a stepwise shape. A sum of a depth of the second drift region, a depth of the gate dielectric, and a depth of the gate electrode may be of substantially a same value as a depth of the first drift region. The first drift region and the second drift region may be formed at the same time, using the gate electrode as a part of the implanting mask. | 06-11-2015 |
Patent application number | Description | Published |
20100165586 | DISPLAY PANEL APPARATUS - A display panel apparatus includes a panel, a fixed frame, a circuit board and one or more flexible printed circuits (FPC). The fixed frame may be a back bezel or a frame, and is placed at the rear of the panel. The fixed frame includes two fixed portions extending outwards from a side thereof. The circuit board is connected to the two fixed portions and disposed at the side of the fixed frame, and extends away from the fixed frame. The maximum plane of the circuit board and the maximum plane of the fixed frame are disposed at a same (common) plane. More specifically, the maximum plane of the circuit board and the maximum plane of the fixed frame are not overlapping in a vertical direction, and are on a same horizontal plane. | 07-01-2010 |
20110134661 | BACKLIGHT MODULE, BEZEL ASSEMBLY APPLIED TO BACKLIGHT MODULE, AND DISPLAY DEVICE - A bezel assembly, which is applied to a backlight module, includes a first bezel and a second bezel. The first bezel has a first side wall and a second side wall. A first hole structure is formed on a corner between the first and second side walls. The second bezel has a third side wall. A second hole structure and a third hole structure are formed on opposite sides of the third side wall. When the first bezel is disposed in the second bezel, the third side wall can completely cover the first hole structure of the first bezel from the outside of the first bezel, and the second and third hole structures are close to the first hole structure. | 06-09-2011 |
20120113349 | DISPLAY DEVICE - A display device includes a front casing, a back casing, a backlight module and a display panel. The back casing is connected to the front casing. The backlight module is disposed between the front casing and the back casing. The backlight module includes a bezel fixed on the back casing. The display panel is disposed between the front casing and the back casing and disposed on the backlight module. The display panel includes an optical film. The optical film has a first fixing portion, wherein the first fixing portion is extended out of an edge of the bezel and fixed on the back casing. | 05-10-2012 |
20120113351 | BACKLIGHT MODULE - A backlight module is disclosed, which includes an outer frame having a sidewall and a hole formed on the sidewall, an inner frame disposed inside of the outer frame, and an adhesive device. The inner frame includes a block wall and a support. The block wall has an inner surface, an outer surface, and a rework section. The outer surface is in contact with the sidewall, and the rework section is disposed corresponding to the hole. The adhesive device is disposed on the support. | 05-10-2012 |
20120300428 | Backlight Module - A backlight module is disclosed. The backlight module includes a light guide plate, a backlight source, an optical plate, and an optical coating layer. The light guide plate has a light emitting surface and a light incident end. The light incident end is located at an adjacent side of the light emitting surface. The backlight source is disposed corresponding to the light incident end and generates lights emitting to the light incident end. The optical plate is disposed above the light emitting surface. The optical plate includes an extension portion extending disposed above the backlight source. The optical coating layer is formed on a surface of the extension portion. | 11-29-2012 |
20130033891 | BACKLIGHT MODULE AND DISPLAY DEVICE USING THE SAME - An exemplary backlight module includes a frame, a light guide plate, a light source module and an optical film. The light guide plate is arranged on the frame and includes a light-incident surface and a light-emitting surface adjacent to the light-incident surface. The light source module includes a circuit board arranged between the frame and the light guide plate board, and a light emitting element arranged on the circuit board and facing the light-incident surface. The optical film includes a wavelength shifting portion arranged between the light emitting element and the light guide plate, a second extending portion arranged between the light guide plate and the frame, and a first extending portion connected between the wavelength shifting portion and the second extending portion and arranged between the light guide plate and the circuit board. A display device equipped with the backlight module is also provided. | 02-07-2013 |
20130044462 | Backlight Module and Display Device with Reduced Light Leakage - This invention provides a display device and a backlight module thereof, wherein the backlight module includes a backplate, a frame body, and a first optical film. The frame body is disposed on the backplate and extending along the inner surface of the sidewall. A concave portion is formed on the frame body and exposes the inner surface of the sidewall. The first optical film has a protrusion portion extending to the concave portion, wherein the frame body extends along the edge of the first optical film. The protrusion portion includes a main body and a shelter portion, wherein the shelter portion bends in opposition to the main body and at least partially shelter a portion of the sidewall exposed by the concave portion. | 02-21-2013 |
20130128445 | ELECTRONIC PRODUCT WITH VIDEO DISPLAY AND METHOD FOR ASSEMBLING THE SAME - An electronic product with a video display comprises a protection sheet, a display device and a shell, wherein the display device comprises a display panel and a driver unit. The display panel has a peripheral circuit area and a display surface attached to the protection sheet. The driver unit is fixed on the protection sheet and electrically connected to the peripheral circuit area. The shell which has a bottom surface and an opening opposite to the bottom surface is used to contain the display device and the protection sheet, wherein the protection sheet covers the opening, and the display device is disposed between the protection sheet and the bottom surface of the shell. | 05-23-2013 |
20140078443 | BACKLIGHT MODULE - A backlight module is disclosed, which includes an outer frame having a sidewall and a hole formed on the sidewall, an inner frame disposed inside of the outer frame, and an adhesive device. The inner frame includes a block wall and a support. The block wall has an inner surface, an outer surface, and a breakable section. The outer surface is in contact with the sidewall, and the breakable section is disposed corresponding to the hole. The adhesive device is disposed on the support. | 03-20-2014 |
Patent application number | Description | Published |
20100195325 | DYNAMIC MASK AND ILLUMINATION SYSTEM - A dynamic mask adapted to an illumination system is provided. The illumination system includes at least one light source capable of emitting an illumination beam. The dynamic mask includes a board disposed in a transmission path of the illumination beam for adjusting a luminous flux of the illumination beam. The board has at least one strip-shaped opening. The strip-shaped opening has a first end and a second end opposite to the first end. The strip-shaped opening is mirror-symmetric with respect to a symmetrical axis, and the symmetrical axis is a straight line extending from the first end to the second end. A width of the strip-shaped opening increases from the first end to the second end, and the board is capable of moving along a direction parallel to the symmetrical axis. An illumination system using the dynamic mask is also provided. | 08-05-2010 |
20130003025 | PROJECTION APPARATUS - A projection apparatus includes an optical engine base, a light source, a light valve, a lens module, and a fan. The light source is disposed at the optical engine base for emitting an illumination beam. The light valve is disposed at the optical engine base for converting the illumination beam into an image beam. The lens module is disposed at the optical engine base and includes a lens barrel and a lens assembly disposed in the lens barrel for converting the image beam into a projection beam. The fan is disposed at the optical engine base, and adjacent to the lens module. The fan is used for providing an air flow to cool the lens module. | 01-03-2013 |
20130250249 | PROJECTOR AND LIGHT INTEGRATION ROD THEREOF - A projector includes a light source, a light integration rod, a light valve, and a projection lens. The light source provides an illumination beam. The light integration rod has a light incidence end and a light emission end opposite to each other. Through the light incidence and emission ends, the illumination beam is emitted into and out from the light integration rod, respectively. Each of the light incidence end and the emission end is in a rectangular shape. The light incidence end has a first long edge and a first short edge. The light emission end has a second long edge paralleling to the first short edge and a second short edge paralleling to the first long edge. The light valve converts the illumination beam into an image beam. The projection lens is disposed on a transmission path of the image beam. A light integration rod is also provided. | 09-26-2013 |
20130271844 | PROJECTION APPARATUS - A projection apparatus including an image source, an imaging module and a beam splitting module is provided. The image source provides an image beam. The imaging module is disposed on a transmission path of the image beam and has an aperture stop. The beam splitting module is disposed on the transmission path of the image beam and located on or near the aperture stop. The beam splitting module includes a plurality of aperture stop sub-regions, and the beam splitting module separates a plurality of image sub-beams of the image beam irradiating these different aperture stop sub-regions. These image sub-beams respectively propagate towards different directions after travelling to these aperture stop sub-regions. | 10-17-2013 |
Patent application number | Description | Published |
20130099109 | IMAGE READING DEVICE AND IMAGE READING SYSTEM - An image reading device and an image reading system for recognizing a first image in a selected area on an object are provided. The selected area includes a first portion and a second portion, wherein the first portion is coated with an invisible ink, which is capable of absorbing the first light with a wavelength of invisible light, while the second portion is capable of reflecting the second light with the wavelength of invisible light. The image reading device comprises a main body and an optical element disposed on the main body. The optical element receives the second light corresponding to the second portion to recognize the first image corresponding to the first portion. The image reading system further comprises a processing device which is configured to resolve the first image into corresponding information content. | 04-25-2013 |
20140043233 | INTERACTIVE SYSTEM AND REMOTE DEVICE - An interactive system includes a display, a processor and a remote controller. The display includes at least one reference beacon for providing light with a predetermined feature. The remote controller includes an image sensor configured to capture an image containing the reference beacon and calculates an aiming coordinate according to an imaging position of the reference beacon in the captured image. The processor calculates a scale ratio of a pixel size of the display with respect to that of the image captured by the image sensor and moves a cursor position according to the scale ratio and the aiming coordinate. | 02-13-2014 |
20140048681 | OBJECT TRACKING DEVICE AND OPERATING METHOD THEREOF - An optical tracking device includes a light source, an image sensor and a processing unit. The light source emits light at a lighting frequency. The image sensor outputs an operating image when the light source is being turned on and outputs a background image when the light source is being turned off. The processing unit is configured to obtain background information from the background image, calculate a differential image of the operating image and the background image, obtain object information from the differential image and compare the background information and the object information thereby removing background noise. | 02-20-2014 |
20140071103 | Object Tracking Apparatus and Control Method Thereof - The present invention discloses an object tracking apparatus including a reference object, an optical sensor and a controller. The reference object has a plurality of light emitting devices, for generating an optical signal. The optical sensor is for detecting the optical signal and generating an identification signal in response to the optical signal. The controller is for generating a control signal according to the identification signal and outputting the control signal to the reference object, thereby adaptively adjusting a light emitting number or light emitting intensity of the plurality of light emitting devices. The present invention discloses a method for controlling an object tracking apparatus. | 03-13-2014 |
20140085212 | TOUCH PANEL APPARATUS, SYSTEM AND OPERATION METHOD THEREOF - The present invention discloses a touch panel apparatus, system and an operation method using for the same system. The apparatus recognizes a track of an object for executing a corresponding gesture function, and it includes: a touch control surface for the object to move on or above to form the track; at least one image sensor for capturing a plurality of continuous pictures including images of the object; and a processor for obtaining a plurality of displacement vectors according to changes in positions of the images of the object, comparing the displacement vectors with a set of basic vectors to obtain a code or a set of codes, and recognizing the code or the set of codes to execute the corresponding gesture function. | 03-27-2014 |
20140085264 | OPTICAL TOUCH PANEL SYSTEM, OPTICAL SENSING MODULE, AND OPERATION METHOD THEREOF - The present invention discloses an optical touch panel system, an optical sensing module, and an operation method using for the same system. The system recognizes a track of an object moving on or above a touch control surface to determine a corresponding gesture function; it includes a touch control surface, at least one image sensor, and a processor. The touch control surface includes at least two touch control areas. The image sensor captures a plurality of continuous pictures including the images of the objects. The processer determines which touch control area the object is moving on or above according to a starting position or a path of the track, and executes a gesture function corresponding to the track and the touch control area. | 03-27-2014 |
20140247214 | HANDHELD POINTER DEVICE AND TILT ANGLE ADJUSTMENT METHOD THEREOF - An exemplary embodiment of the present disclosure provides a handheld pointer device and a tilt angle adjustment method thereof. The tilt angle adjustment method includes the following steps. Images corresponding to the position of a reference point are captured as the handheld pointer device pointing toward the reference point to generate a plurality of frames. Whether the reference point has substantially moved is subsequently determined based on the plurality of frames. When determines that the reference point has not substantially moved, causes an accelerometer unit of the handheld pointer device to detect the accelerations thereof over various axes so as to update a first tilt angle being used currently to a second tilt angle, accordingly. The handheld pointer device may thus accurately and efficiently calculate the relative position of the reference point with the appropriate tilt angle of the handheld pointer device used. | 09-04-2014 |
20140354545 | OPTICAL OBJECT RECOGNITION SYSTEM - An optical object recognition system includes at least two beacons, an image sensor and a processing unit. The beacons operate in an emission pattern and the emission pattern of the beacons has a phase shift from each other. The image sensor captures image frames with a sampling period. The processing unit is configured to recognize different beacons according to the phase shift of the emission pattern in the image frames. | 12-04-2014 |
20150054745 | HANDHELD POINTER DEVICE AND POINTER POSITIONING METHOD THEREOF - A pointer positioning method for a handheld pointer device includes: capturing a first frame containing a reference point when the handheld pointer device updates a first tilt angle presently used to a second tilt angle; computing a first pointing coordinate according to the image position of the reference point in the first frame and the first tilt angle; computing a second pointing coordinate according to the image position of the reference point in the first frame and the second tilt angle; capturing a second frame containing the reference point to compute a third pointing coordinate according to the image position of the reference point in the second frame and the second tilt angle; generating a cursor parameter for controlling a display position of a cursor on a display apparatus according to the first pointing coordinate, the second pointing coordinate, and the third pointing coordinate. | 02-26-2015 |
20150253934 | OBJECT DETECTION METHOD AND CALIBRATION APPARATUS OF OPTICAL TOUCH SYSTEM - The present disclosure provides an object detection method including: pre-storing a lookup table of touch reference values, wherein the lookup table of touch reference values records a plurality of touch reference values associated with image positions of a plurality of calibration object images formed in calibration images captured by a first image sensor; capturing a first image, wherein the first image has at least an object image corresponding to a pointer formed therein; generating a first light distribution curve according to the first image; defining a first detection region in the first light distribution curve; obtaining at least one touch reference value associated with the object image using the lookup table of touch reference values; comparing at least one brightness value within the first detection region of the first light distribution curve with the at least one touch reference value obtained. | 09-10-2015 |
Patent application number | Description | Published |
20110085399 | Method for Extending Word-Line Pulses - An integrated circuit includes a positive power supply node, a current tracking circuit, and a current mirroring circuit including a plurality of current paths coupled in parallel. The currents of the plurality of current paths mirror a current of the current tracking circuit. The current mirroring circuit is configured to turn off the plurality of current paths one-by-one in response to a reduction in a positive power supply voltage on the positive power supply node. The integrated circuit further includes a charging node receiving a summation current of the plurality of current paths, wherein a voltage on the charging node is configured to increase through a charging of the summation current. | 04-14-2011 |
20120230127 | Providing Row Redundancy to Solve Vertical Twin Bit Failures - A circuit includes a failure address register configured to store a first row address, a row address modifier coupled to the failure address register, wherein the row address modifier is configured to modify the first row address received from the failure address register to generate a second row address. A first comparator is configured to receive and compare the first row address and a third row address. A second comparator is configured to receive and compare the second row address and the third row address. The first and the second row addresses are failed row addresses in a memory. | 09-13-2012 |
20130003446 | Method for Extending Word-Line Pulses - An integrated circuit includes a positive power supply node, a current tracking circuit, and a current mirroring circuit including a plurality of current paths coupled in parallel. The currents of the plurality of current paths mirror a current of the current tracking circuit. The current mirroring circuit is configured to turn off the plurality of current paths one-by-one in response to a reduction in a positive power supply voltage on the positive power supply node. The integrated circuit further includes a charging node receiving a summation current of the plurality of current paths, wherein a voltage on the charging node is configured to increase through a charging of the summation current. | 01-03-2013 |
20130161707 | Resistive Memory and Methods for Forming the Same - A device includes an active region formed of a semiconductor material, a gate dielectric at a surface of the active region, and a gate electrode over the gate dielectric. A first source/drain region and a second source/drain region are on opposite sides of the gate electrode. A Contact Etch Stop Layer (CESL) is over the first and the second source/drain regions. An Inter-Layer Dielectric (ILD) includes a top surface substantially level with a top surface of the gate electrode. A first contact plug is over and electrically connected to the first source/drain region. A second contact plug is over and aligned to the second source/drain region. The second contact plug and the second source/drain region are spaced apart from each other by a portion of the first CESL to form a capacitor. | 06-27-2013 |
Patent application number | Description | Published |
20100315322 | LIQUID CRYSTAL DISPLAY AND DRIVING METHOD THEREOF - A liquid crystal display includes a gate driver, a control circuit and a charge-sharing circuit. The control circuit provides a charge-sharing signal according to the parasitic capacitances at a first output end and a second output end in the gate driver. The charge-sharing circuit generates a third clock signal and a fourth clock signal by performing charge-sharing on a first clock signal and a second clock signal according to the charge-sharing signal. The third clock signal includes a signal falling edge which descends from a high level to a first level, and the fourth clock signal includes a signal falling edge which descends from the high level to a second level. The gate driver outputs a first gate driving signal and a second gate driving signal respectively at the first and the second output end according the third or the fourth clock signal. | 12-16-2010 |
20110057868 | LIQUID CRYSTAL DISPLAY CAPABLE OF SWITCHING COMMON VOLTAGE - A liquid crystal display capable of switching the common voltage includes a display panel and a printed circuit board. The display panel includes a plurality of scan lines, a plurality of data lines, and a plurality of pixels. Each pixel includes a transistor, a storage capacitor, and a liquid crystal capacitor. The first ends of the storage capacitor and the liquid crystal capacitor are electrically connected to the transistor. The second end of the liquid crystal capacitor is electrically connected to a common voltage source. The printed circuit board includes a switcher for switching the second end of the storage capacitor electrically connecting to common voltage source, an analog voltage source, or a ground. | 03-10-2011 |
20110084894 | GATE OUTPUT CONTROL METHOD AND CORRESPONDING GATE PULSE MODULATOR - A gate output control method is adapted into a flat display having a plurality of gate drive integrated circuits. The method comprises: providing a gate control signal; providing a oblique control signal to oblique modulate the gate control signal for generating a gate control signal with oblique; modulating the gate control signal with oblique to obtain a modulated gate control signal; and outputting the modulated gate control signal to the gate drive integrated circuits. A falling edge of the modulated gate control signal comprises a oblique-varying period and a vertical-varying period. In the oblique-varying period, the modulated gate control signal firstly changes to a predetermined voltage in a first slope, and then changes in a second slope until the vertical-varying period. In the vertical-varying period, the modulated gate control signal changes vertically or nearly vertically. | 04-14-2011 |
20120169386 | RESETTING CIRCUIT - An exemplary resetting circuit adapted for regulating a voltage on an output terminal of a shift register is disclosed. The resetting circuit includes a reset driving module and a reset module. The reset driving module is received with an enable signal to output a control voltage signal to an output terminal of the reset driving module. The reset module is electrically coupled to the output terminal of the shift register and the output terminal of the reset circuit driving module, and is controlled by the control voltage signal on the output terminal of the reset driving module to determine whether switching on an electrical path between the output terminal of the shift register and a gate-off voltage level. | 07-05-2012 |
20120169697 | CONTROL CIRCUIT AND METHOD OF FLAT PANEL DISPLAY - A control circuit and a method for charge sharing are provided. The control circuit and method are applied to a flat panel display including a plurality of pixel units. The control circuit includes a power supply unit, a data driver, a first switch set, a second switch set, a second switch set, and a timing controller. The control method includes steps of: outputting a first control signal to optionally switch on the switches in the first switch set in a first duration to re-allocate charges stored in the plurality of pixel units; and outputting a second control signal to optionally switch on the switches in the second switch set in a second duration to discharge charges stored in the plurality of pixel units via the voltage output pin. | 07-05-2012 |
20120194569 | DRIVER OF A LIQUID CRYSTAL DISPLAY PANEL AND METHOD THEREOF - The present invention provides a method for driving a liquid crystal display panel. The liquid crystal display panel has a plurality of pixels arranged in a matrix form and a plurality of data lines. The method includes generating gray level signals corresponding to the plurality of pixels according to input image data; determining whether the gray level values of the pixels in a same row corresponding to the plurality of data lines of a first color are all outside a first range; and when the gray level values of the pixels in the same row corresponding to the plurality of data lines of the first color are all outside the first range, controlling polarity of the gray level signals of the pixels in the same row corresponding to the plurality of data lines of the first color in a column inversion mode. | 08-02-2012 |
20120262431 | HALF SOURCE DRIVING DISPLAY PANEL - A half source driving display panel includes a first to a fourth data line, a plurality of pixels, and a plurality of gate lines including a first and a second gate line. The two pixels disposed between the first and the second gate line and between the first and the second data line are driven by one of the first and the second gate line, and so do the two pixels disposed between the first and the second gate line and between the third and the fourth data line. Two pixels disposed between the first and the second gate line and between the second and the third data line are driven by the other one of the first and the second gate line. | 10-18-2012 |
20120287170 | LIQUID CRYSTAL DISPLAY AND DRIVING METHOD THEREOF - A liquid crystal display having adaptive driving mechanism includes plural pixel array areas and a driving module. Each pixel array area has a plurality of pixels. The driving module includes a signal generation unit for generating grey-level signals corresponding to the pixels based on input image data, a weighting conversion unit for converting the grey-level signals corresponding to the pixels into a plurality of weightings, a weighting processing unit for generating a weighting sum by summing up the weightings corresponding to the pixel array area, an inversion-mode setting unit for setting a polarity inversion mode according to the weighting sum, and a data signal output unit. The data signal output unit is utilized for providing a plurality of data signals to be written into the pixel array area based on the polarity inversion mode. | 11-15-2012 |
20130033440 | AUTOSTEREOSCOPIC DISPLAY DEVICE HAVING TOUCH SENSING MECHANISM AND DRIVING METHOD THEREOF - An autostereoscopic display device having touch sensing mechanism includes a display panel for illustrating images, a touch sensing panel for detecting touch events, a 2D/3D switching panel disposed between the display panel and the touch sensing panel, and a control unit. The 2D/3D switching panel has a substrate, a first electrode disposed on the substrate, a counter substrate, and a second electrode disposed on the counter substrate. The control unit is employed to provide a first control signal and a second control signal furnished to the first electrode and the second electrode respectively. The first control signal is switched between a first high voltage and a first low voltage in a gradual-shift manner. The second control signal is switched between a second high voltage and a second low voltage in a gradual-shift or rapid-shift manner. | 02-07-2013 |
20130088470 | LIQUID CRYSTAL DISPLAY HAVING ADAPTIVE PULSE SHAPING CONTROL MECHANISM - A liquid crystal display having adaptive pulse shaping control mechanism includes a first gate driver for providing a first gate signal based on a first modulation voltage, a second gate driver for providing a second gate signal based on a second modulation voltage, a first pixel array unit for illustrating image according to the first gate signal, a second pixel array unit for illustrating image according to the second gate signal, a timing controller for performing a pulse compare operation over the first and second gate signals so as to generate a first shaping control signal and a second shaping control signal, a first gate pulse modulation unit for providing the first modulation voltage according to the first shaping control signal, and a second gate pulse modulation unit for providing the second modulation voltage according to the second shaping control signal. | 04-11-2013 |
20150077409 | LIQUID CRYSTAL DISPLAY HAVING ADAPTIVE PULSE SHAPING CONTROL MECHANISM - A liquid crystal display having adaptive pulse shaping control mechanism includes a first gate driver for providing a first gate signal based on a first modulation voltage, a second gate driver for providing a second gate signal based on a second modulation voltage, a first pixel array unit for illustrating image according to the first gate signal, a second pixel array unit for illustrating image according to the second gate signal, a timing controller for performing a pulse compare operation over the first and second gate signals so as to generate a first shaping control signal and a second shaping control signal, a first gate pulse modulation unit for providing the first modulation voltage according to the first shaping control signal, and a second gate pulse modulation unit for providing the second modulation voltage according to the second shaping control signal. | 03-19-2015 |
Patent application number | Description | Published |
20140085582 | FRINGE-FIELD SWITCHING MODE LIQUID CRYSTAL DISPLAY PANEL - A Fringe-Field Switching (FFS) mode liquid crystal display (LCD) panel with optimized designs of pixel areas and/or liquid crystal materials is provided. The FFS mode LCD panel includes an active-element array substrate with a plurality of pixel areas, an opposite substrate, and a liquid crystal layer. Each pixel area comprises a plurality of first common electrodes, a second common electrode between the pixel area and another horizontally adjacent pixel area, and a pixel electrode. The optical transmittance and homogeneity of the pixel area of the display panel are modified by manipulating the relative position of the electrodes in the pixel areas on the active-element array substrate and/or adopting specific parameters of liquid crystal materials in the liquid crystal layer of the display panel. | 03-27-2014 |
20150124206 | PIXEL STRUCTURE AND DISPLAY PANEL - A pixel structure disposed on a first substrate is provided. The pixel structure includes a scan line, a data line, an active component, a pixel electrode, a first dielectric layer, a common electrode, and a protrusion. The scan line and the data line are disposed on the first substrate. The pixel electrode is disposed on the first substrate. The first dielectric layer is disposed on the first substrate and covers the pixel electrode. The common electrode is disposed on the first dielectric layer, and the common electrode has at least two first branched electrodes and a first opening between the first branched electrodes. The first branched electrodes and the first opening on the first substrate overlap with the pixel electrode in a projection direction. The protrusion is disposed on the first dielectric layer, and the protrusion is disposed in the first opening between the first branched electrodes. | 05-07-2015 |
20150192831 | DISPLAY PANEL AND DISPLAY DEVICE - A display panel for a display device having a backlight module includes a first substrate, a plurality of data lines, a plurality of pixel electrodes, a dielectric layer, and a common electrode. The data lines are disposed substantially in parallel on the first substrate. The pixel electrodes are respectively disposed between the data lines. The dielectric layer covers the pixel electrodes and the data lines. The common electrode is disposed on the dielectric layer, and the common electrode has two first electrode branches, two second electrode branches, and two third electrode branches. The electrode branches are respectively and correspondingly disposed on the both sides of the pixel electrodes. The first electrode branches, the second electrode branches, and the third electrode branches respectively have a first interval, a second interval, and a third interval therebetween. The first interval is larger than the second interval and the third interval. | 07-09-2015 |
20150212380 | PIXEL STRUCTURE AND LIQUID CRYSTAL PANEL - A pixel structure includes a substrate, a plurality of gate lines and data lines, and at least one first pixel. The gate lines and the data lines are disposed on the substrate. The first pixel is disposed on the substrate and electrically connected to corresponding gate line and data line. The first pixel includes a first electrode, a first dielectric layer and a second electrode. The first electrode is disposed on the substrate. The first dielectric layer is disposed on the first electrode, and the first dielectric layer has at least one first island structure. The second electrode is disposed on a top surface of the first island structure, and the second electrode partially exposes the top surface of the first island structure. | 07-30-2015 |
Patent application number | Description | Published |
20090239003 | Optical plate, backlight module and liquid crystal display using the same - An optical plate comprising a base having a plurality of protrusions and flat portions, wherein the protrusions and the flat portions are arranged alternately; at least one auxiliary structure, formed on the protrusions, having birefringence; and a matching layer formed on the base and the auxiliary structure is provided. | 09-24-2009 |
20110255040 | LIQUID CRYSTAL DISPLAY PANEL - A liquid crystal display panel includes a first substrate, a second substrate, an active layer, a first alignment film, a second alignment film, a liquid crystal layer, and a sealant. The first substrate includes a display region and a sealant region encompassing the display region. The second substrate is disposed oppositely to the first substrate. The liquid crystal layer is disposed between the first alignment film and the second alignment film. The liquid crystal layer includes a plurality of liquid crystal molecules, wherein the dielectric anisotropy of the liquid crystal molecules is substantially equal to or greater than 7, or substantially equal to or less than −4. The sealant is disposed between the first substrate and the second substrate, and is disposed in the sealant region. The sealant includes acrylics, wherein a weight percentage of acrylics is substantially between 50 wt % and 90 wt %. | 10-20-2011 |
20120169979 | STEREOSCOPIC OPTICAL DEVICE AND METHOD OF MAKING THE SAME - A stereoscopic optical device includes a substrate, an alignment film and a liquid crystal layer. The alignment film includes at least one first region and at least one second region. The liquid crystal layer, disposed on the alignment film, includes first liquid crystal molecules and second liquid crystal molecules. The first liquid crystal molecules correspond to the first region of the alignment film and have a first pre-tilt angle, the second liquid crystal molecules correspond to the second region of the alignment film and have a second pre-tilt angle. The fast axis of the first liquid crystal molecules and the fast axis of the second crystal molecules substantially face the same direction, and the slow axis of the first liquid crystal molecules and the slow axis of the second liquid crystal molecules substantially face in the same direction. | 07-05-2012 |
Patent application number | Description | Published |
20090261450 | Electrical Fuse Structure and Method - An electrical fuse and a process of programming the same are presented. An electrical fuse comprises a lower level silicide layer on a non-doped or lightly-doped polysilicon layer, an upper level conductive layer, and a tungsten contact coupled between the lower level silicide layer and the upper level conductive layer. The tungsten contact and a neck portion of the silicide layer are the programmable portion of the electrical fuse. High post-programming resistance is achieved by a first programming phase that depletes silicide in the silicide layer, followed by a second programming phase that depletes tungsten in the tungsten contact. | 10-22-2009 |
20100090751 | Electrical Fuse Structure and Method - An electrical fuse and a process of programming the same are presented. An electrical fuse comprises a lower level silicide layer on a non-doped or lightly-doped polysilicon layer, an upper level conductive layer, and a tungsten contact coupled between the lower level silicide layer and the upper level conductive layer. The tungsten contact and a neck portion of the silicide layer are the programmable portion of the electrical fuse. High post-programming resistance is achieved by a first programming phase that depletes silicide in the silicide layer, followed by a second programming phase that depletes tungsten in the tungsten contact. | 04-15-2010 |
20140145299 | DEEP TRENCH STRUCTURE FOR HIGH DENSITY CAPACITOR - Some embodiments relate to high density capacitor structures. Some embodiments include a semiconductor substrate having an conductive region with a plurality of trenches formed therein. A first dielectric layer is formed over respective bottom portions and respective sidewall portions of the respective trenches. A first conductive layer is formed in the trench and over the first dielectric layer, wherein the first dielectric layer acts as a first capacitor dielectric between the conductive region and the first conductive layer. A second dielectric layer is formed in the trench and over the first conductive layer. A second conductive layer is formed in the trench and over the second dielectric layer, wherein the second dielectric layer acts as a second capacitor dielectric between the first conductive layer and the second conductive layer. Other embodiments are also disclosed. | 05-29-2014 |
Patent application number | Description | Published |
20130119549 | Mold Chase Design for Package-on-Package Applications - A method includes placing a mold chase over a bottom package, wherein the bottom package has a connector at a top surface of the bottom package. The mold chase includes a cover, and a pin under and connected to the cover. The pin occupies a space extending from a top surface of the connector to the cover. A polymer is filled into a space between the cover of the mold chase and the bottom package. The polymer is then cured. After the step of curing the polymer, the mold chase is removed, and the connector is exposed through an opening in the polymer, wherein the opening is left by the pin of the mold chase. | 05-16-2013 |
20140048934 | METHOD TO CONTROL UNDERFILL FILLET WIDTH - A semiconductor device assembly includes a substrate having an area of the surface treated to form a surface roughness. A die is mounted on the substrate by a plurality of coupling members. An underfill substantially fills a gap disposed between the substrate and the die, wherein a fillet width of the underfill is substantially limited to the area of surface roughness. | 02-20-2014 |
20140124916 | Molded Underfilling for Package on Package Devices - Presented herein are a package-on-package device having a molded underfill and a method for forming the same, the method comprising applying a package mount mounting a die to the first side of a carrier package. A molded underfill may be applied first side of the carrier package, and be in contact with a portion of the package mount a portion of a sidewall of the die. A top package having at least one land may be mounted to the first side of the carrier package above the die, and, optionally separated from the top of the die. The package mount may be coined prior to, during or after applying the molded underfill to optionally be level with the underfill surface. The underfill region contacting the package mount may be below or above the surface of the underfill region contacting the die sidewall. | 05-08-2014 |
20140252609 | Package-on-Package Structure and Methods for Forming the Same - A method includes coining solder balls of a bottom package, wherein top surfaces of the solder balls are flattened after the step of coining. The solder balls are molded in a molding material. The top surfaces of the solder balls are through trenches in the molding material. | 09-11-2014 |
20150228587 | Concentric Bump Design for the Alignment in Die Stacking - An integrated circuit structure includes an alignment bump and an active electrical connector. The alignment bump includes a first non-solder metallic bump. The first non-solder metallic bump forms a ring encircling an opening therein. The active electrical connector includes a second non-solder metallic bump. A surface of the first non-solder metallic bump and a surface of the second non-solder metallic bump are substantially coplanar with each other. | 08-13-2015 |
20150235989 | SUBSTRATE DESIGN FOR SEMICONDUCTOR PACKAGES AND METHOD OF FORMING SAME - An embodiment device package includes first die and one or more redistribution layers (RDLs) electrically connected to the first die. The one or more RDLs extend laterally past edges of the first die. The device package further includes one or more second dies bonded to a first surface of the one or more RDLs and a connector element on the first surface of the one or more RDLs. The connector element has a vertical dimension greater than the one or more second dies. A package substrate is bonded to the one or more RDLs using the connector element, wherein the one or more second dies is disposed between the first die and the package substrate. | 08-20-2015 |
20150235990 | SUBSTRATE DESIGN FOR SEMICONDUCTOR PACKAGES AND METHOD OF FORMING SAME - An embodiment device includes a first die, a second die, one or more redistribution layers (RDLs) electrically connected to the first die, a plurality of connectors on a surface of the one or more RDLs and a package substrate electrically connected to the first die and the second die. The package substrate is electrically connected to the first die through the one or more RDLs and the plurality of connectors. The package substrate comprises a cavity, and the second die is at least partially disposed in the cavity. | 08-20-2015 |
20150235993 | Thermal Performance Structure for Semiconductor Packages and Method of Forming Same - An embodiment device includes a first die, a second die electrically connected to the first die, and a heat dissipation surface on a surface of the second die. The device further includes a package substrate electrically connected to the first die. The package substrate includes a through-hole, and the second die is at least partially disposed in the through hole. | 08-20-2015 |
Patent application number | Description | Published |
20090172437 | Power Switch and Power Supply Using the Same - A power switch includes a power status providing module, a trigger, and a logic circuit. The power status providing module is configured for providing a first signal when being turned on, and for providing a second signal when being turned off. The trigger is configured for providing a first logic voltage when being pushed down, and for providing a second logic voltage when being released. The logic circuit has a data input terminal, a clock input terminal and an output terminal. The data input terminal is configured for receiving the first signal and the second signal to form a data signal. The clock input terminal is configured for receiving the first logic voltage and the second logic voltage to form an operation clock. The output terminal is configured for outputting a power control signal inverse to the data signal according to the operation clock. | 07-02-2009 |
20110102745 | STEREO DISPLAY APPARATUS - A stereo display apparatus includes a support member, at least one projector, a screen, first reflectors, and an actuator. The projector is connected to the support member, and includes a battery and an image memory module. The projector is capable of emitting an image beam. The screen is connected to the support member. The first reflectors surround the support member. The actuator is connected to the support member and is capable of driving the support member to rotate. The support member is capable of driving the projector and the screen to rotate. When the projector and the screen rotate, the image beam is projected onto the first reflectors in sequence, and the first reflectors reflect the image beam onto the screen in sequence. | 05-05-2011 |
Patent application number | Description | Published |
20100210086 | Junction Profile Engineering Using Staged Thermal Annealing - An annealing method includes performing an activation annealing on a wafer with a peak temperature of greater than about 1200° C., wherein the activation annealing has a first duration; and performing a defect-recovery annealing on the wafer at a defect-recovery temperature lower than the peak temperature for a second duration. The second duration is longer than the first duration. The annealing method includes no additional annealing steps at temperatures greater than about 1200° C., and no room-temperature cooling step exists between the activation annealing and the defect-recovery annealing. | 08-19-2010 |
20110316079 | Shallow Junction Formation and High Dopant Activation Rate of MOS Devices - A semiconductor structure comprises a gate stack in a semiconductor substrate and a lightly doped source/drain (LDD) region in the semiconductor substrate. The LDD region is adjacent to a region underlying the gate stack. The LDD region comprises carbon and an n-type impurity, and the n-type impurity comprises phosphorus tetramer. | 12-29-2011 |
20130068960 | Apparatus for Monitoring Ion Implantation - An apparatus for monitoring an ion distribution of a wafer comprises a first sensor and a sensor. The first sensor, the second sensor and the wafer are placed in an effective range of a uniform ion implantation current profile. A controller determines the ion dose of each region of the wafer based upon the detected signal from the first sensor and the second sensor. In addition, the controller adjusts the scanning frequency of an ion beam or the movement speed of the wafer to achieve a uniform ion distribution on the wafer. | 03-21-2013 |
20130280823 | Apparatus for Monitoring Ion Implantation - An apparatus for monitoring an ion distribution of a wafer comprises a first sensor and a sensor. The first sensor, the second senor and the wafer are placed in an effective range of a uniform ion implantation current profile. A controller determines the ion dose of each region of the wafer based upon the detected signal from the first sensor and the second senor. In addition, the controller adjusts the scanning frequency of an ion beam or the movement speed of the wafer to achieve a uniform ion distribution on the wafer. | 10-24-2013 |
20150069913 | ION Implantation with Charge and Direction Control - The present disclosure provides for various advantageous methods and apparatus of controlling electron emission. One of the broader forms of the present disclosure involves an electron emission element, comprising an electron emitter including an electron emission region disposed between a gate electrode and a cathode electrode. An anode is disposed above the electron emission region, and a voltage set is disposed above the anode. A first voltage applied between the gate electrode and the cathode electrode controls a quantity of electrons generated from the electron emission region. A second voltage applied to the anode extracts generated electrons. A third voltage applied to the voltage set controls a direction of electrons extracted through the anode. | 03-12-2015 |
20150221561 | Method for Monitoring Ion Implantation - A method comprises placing a wafer and a ring-shaped beam profiler on a wafer holder, wherein the ring-shaped beam profiler is adjacent to the wafer, moving a first sensor and a second sensor simultaneously with the wafer holder, receiving a first sensed signal and a second sensed signal from the first sensor and the second sensor respectively and adjusting an ion beam generated by an ion beam generator based upon the first sensed signal and the second sensed signal. | 08-06-2015 |
Patent application number | Description | Published |
20110149224 | POLYMER STABILIZATION ALIGNMENT LIQUID CRYSTAL DISPLAY PANEL AND LIQUID CRYSTAL DISPLAY PANEL - The present invention provides a polymer stabilization alignment liquid crystal display panel having a plurality of pixel regions. Each pixel region includes a main region and a sub region, and a first pixel electrode and a second pixel electrode correspond to the main region and the sub region respectively. Each first pixel electrode is separated from the adjacent data line and thereby forming a gap therebetween. Each second pixel electrode partially overlaps the adjacent data line. In addition, each second pixel electrode includes a plurality of branches, and at least one edge of the branches may be parallel to the data lines. Accordingly, the present invention not only can increase the aperture ratio, but also well control the liquid crystal molecules located near the data lines. Therefore, the display quality of the liquid crystal display panel can be improved. | 06-23-2011 |
20110317103 | LIQUID CRYSTAL DISPLAY PANEL - A liquid crystal display panel includes a first substrate, a second substrate, a liquid crystal layer, pixel regions, pixel electrodes and color filters. Each pixel region at least includes a main pixel region and a sub pixel region. Each pixel electrode is disposed on the first substrate. Each pixel electrode includes a first electrode disposed in the main pixel region and a second electrode disposed in the sub pixel region. Each color filter is disposed between the first substrate and the second substrate and corresponds to each pixel region. Each color filter includes a curved surface facing the liquid crystal layer and an extreme thickness position. When a predetermined voltage is applied to each pixel electrode, aligning directions of the liquid crystal molecules disposed above the first electrode are converged toward a center. The extreme thickness position substantially overlaps the center in a vertical projection direction. | 12-29-2011 |
20130278853 | POLYMER STABILIZATION ALIGNMENT LIQUID CRYSTAL DISPLAY PANEL AND LIQUID CRYSTAL DISPLAY PANEL - The present invention provides a polymer stabilization alignment liquid crystal display panel having a plurality of pixel regions defined by plurals of data lines and gate lines. Each pixel region includes a main region and a sub region, and a first pixel electrode and a second pixel electrode correspond to the main region and the sub region respectively, wherein each of the data lines has a first width adjacent to the main display region and a second width adjacent to the sub display region, and the second width is larger than the first width. Each first pixel electrode is separated from the adjacent data line and thereby forming a gap therebetween. Each second pixel electrode partially overlaps the adjacent data line to form an overlap width. Accordingly, the present invention not only can increase the aperture ratio, but also well control the liquid crystal molecules located near the data lines. | 10-24-2013 |
Patent application number | Description | Published |
20130093729 | PHOTO SENSOR OF A PHOTO TYPE TOUCH PANEL AND CONTROL METHOD THEREOF - The present invention provides a photo sensor of a photo type touch panel, which includes a transistor with a control terminal receiving a first control signal, a first capacitor electrically connected to a first terminal of the transistor, a first photo transistor with a first terminal electrically connected to the first capacitor, and a second photo transistor with a control terminal receiving a second control signal, a first terminal electrically connected to a second terminal of the first photo transistor, and a second terminal receiving a third control signal. | 04-18-2013 |
20130100080 | OPTICAL TOUCH CIRCUIT AND LIQUID CRYSTAL DISPLAY DEVICE USING SAME - In an exemplary optical touch circuit and a LCD device using the same, an optical sensing unit is turned on or off according to an irradiation light intensity and accordingly generates a first signal. A first signal readout unit is electrically coupled to the optical sensing unit and turned on or off according to a first operation timing sequence and accordingly outputs the first signal. A touch reference unit is for providing a reference voltage. A second signal readout unit is turned on or off according to a second operation timing sequence and accordingly outputs the reference voltage. The touch sensing unit is electrically coupled to the first and second signal readout units and uses a voltage difference between the first signal and the reference voltage as a basis to determine that whether the optical touch circuit is touched or not. | 04-25-2013 |
20140015801 | PHOTO SENSOR TYPE TOUCH PANEL - A photo sensor type touch panel includes a plurality of readout lines electrically connected in parallel. The overall capacitance of a coupling capacitor between the readout lines connected in parallel and adjacent data lines having one type of polarity is equal to the overall capacitance of a coupling capacitor between the readout lines connected in parallel and adjacent data lines having the other type of polarity. | 01-16-2014 |
20150205431 | TOUCH PANEL - A touch panel is disclosed herein. The touch panel includes a driving line, a gate line, a readout line, and a switching unit. The driving line is configured to transmit a driving signal. The gate line is configured to transmit a scan signal. The readout line forms a mutual capacitance with the gate line, and the mutual capacitance is configured to generate a first sensing signal in response to a driving signal according to a touch operation. The switching unit is electrically coupled to the gate line and the readout line, and configured to be selectively turned on to transmit the first sensing signal to the readout line according to the scan signal. | 07-23-2015 |
Patent application number | Description | Published |
20110287600 | Selective Etching in the Formation of Epitaxy Regions in MOS Devices - A method for forming a semiconductor structure includes forming a gate stack over a semiconductor substrate; forming a recess in the semiconductor substrate and adjacent the gate stack; and performing a selective epitaxial growth to grow a semiconductor material in the recess to form an epitaxy region. After the step of performing the selective epitaxial growth, a selective etch-back is performed to the epitaxy region. The selective etch-back is performed using process gases comprising a first gas for growing the semiconductor material, and a second gas for etching the epitaxy region. | 11-24-2011 |
20110287611 | Reducing Variation by Using Combination Epitaxy Growth - A method for forming a semiconductor structure includes forming a gate stack over a semiconductor substrate in a wafer; forming a recess in the semiconductor substrate and adjacent the gate stack; and performing a selective epitaxial growth to grow a semiconductor material in the recess to form an epitaxy region. The step of performing the selective epitaxial growth includes performing a first growth stage with a first growth-to-etching (E/G) ratio of process gases used in the first growth stage; and performing a second growth stage with a second E/G ratio of process gases used in the second growth stage different from the first E/G ratio. | 11-24-2011 |
20130252392 | Performing Enhanced Cleaning in the Formation of MOS Devices - A method includes etching a semiconductor substrate to form a recess, wherein the recess extends from a top surface of the semiconductor substrate into the semiconductor substrate. An enhanced cleaning is then performed to etch exposed portions of the semiconductor substrate. The exposed portions are in the recess. The enhanced cleaning is performed using process gases including hydrochloride (HCl) and germane (GeH | 09-26-2013 |
20140342522 | Reducing Variation by Using Combination Epitaxy Growth - A method for forming a semiconductor structure includes forming a gate stack over a semiconductor substrate in a wafer; forming a recess in the semiconductor substrate and adjacent the gate stack; and performing a selective epitaxial growth to grow a semiconductor material in the recess to form an epitaxy region. The step of performing the selective epitaxial growth includes performing a first growth stage with a first growth-to-etching (E/G) ratio of process gases used in the first growth stage; and performing a second growth stage with a second E/G ratio of process gases used in the second growth stage different from the first E/G ratio. | 11-20-2014 |
Patent application number | Description | Published |
20100093259 | Chemical Mechanical Polish Process Control for Improvement in Within-Wafer Thickness Uniformity - A method of performing chemical mechanical polish (CMP) processes on a wafer includes providing the wafer; determining a thickness profile of a feature on a surface of the wafer; and, after the step of determining the thickness profile, performing a high-rate CMP process on the feature using a polish recipe to substantially achieve a within-wafer thickness uniformity of the feature. The polish recipe is determined based on the thickness profile. | 04-15-2010 |
20120164918 | Chemical Mechanical Polish Process Control for Improvement in Within-Wafer Thickness Uniformity - A method of performing chemical mechanical polish (CMP) processes on a wafer includes providing the wafer; determining a thickness profile of a feature on a surface of the wafer; and, after the step of determining the thickness profile, performing a high-rate CMP process on the feature using a polish recipe to substantially achieve a within-wafer thickness uniformity of the feature. The polish recipe is determined based on the thickness profile. | 06-28-2012 |
20130023065 | Apparatus and Methods for End Point Determination in Reactive Ion Etching - Methods and apparatus for performing end point determination. A method includes receiving a wafer into an etch tool chamber for performing an RIE etch; beginning the RIE etch to form vias in the wafer; receiving in-situ measurements of one or more physical parameters of the etch tool chamber that are correlated to the RIE etch process; providing a virtual metrology model for the RIE etch in the chamber; inputting the received in-situ measurements to the virtual metrology model for the RIE etch in the chamber; executing the virtual metrology model to estimate the current via depth; comparing the estimated current via depth to a target depth; and when the comparing indicates the current via depth is within a predetermined threshold of the target depth; outputting a stop signal. An apparatus for use with the method embodiment is disclosed. | 01-24-2013 |
20130024019 | APPARATUS AND METHODS FOR END POINT DETERMINATION IN SEMICONDUCTOR PROCESSING - Methods and apparatus for performing end point determination are disclosed. An embodiment includes an apparatus comprising a process tool and a programmable processor. The process tool has an output for signaling in-situ measurements of physical parameters during processing of a wafer in the process tool, and the process tool has an input for receiving a signal indicating a modification of a recipe for the processing. The programmable processor is for executing a virtual metrology model of the process tool to estimate an estimated characteristic of the wafer achieved during the processing. The estimated characteristic is based on the in-situ measurements and the virtual metrology model. The programmable processor has an output for transmitting the signal when the estimated characteristic exceeds a predetermined threshold based on a target characteristic. | 01-24-2013 |