Dixit, CA
Abhay Dixit, Sherwood Park, CA US
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20150102618 | Monopod mounted solid pet waste collecting and disposing system - A monopod mounted solid pet waste collecting and disposing system, hereafter referred to as the “Pooper Scooper” is a pole device with a mounted scooper box. When not in use, the scooper box is mounted vertically parallel to the walking stick. When required for pet waste collection, it is deployed towards the horizontally parallel to the ground. The internal section of the stick has a mechanism that opens and closes the two segments of the scooper box. The Scooper box has a provision to insert a specially designed disposable cup or case inside the box which not only collects the pet waste, its distinctive design also protects the surfaces of the scooper box from coming in contact with the waste. The lower lip protects the lower edge of the scooper box from coming in contact with any waste or rough surfaces. Each disposable case also has an outer lip that allows the case to be opened or closed in sync with the scooper box. The scooper box has an ejection mechanism which allows for the quick and easy release of the disposable cup or case. | 04-16-2015 |
Abhay Dixit, San Diego, CA US
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20090021405 | SYSTEMS AND METHODS FOR PERFORMING OFF-CHIP DATA COMMUNICATIONS AT A HIGH DATA RATE - An electronic device is described. The electronic device includes a first integrated circuit (IC) and a second integrated circuit (IC). The electronic device also includes a multiplexer configured to multiplex a parallel data signal into a serial data signal, and a transmitter configured to transmit the serial data signal from the first IC to the second IC. The electronic device further includes a receiver configured to receive the serial data signal. The receiver includes a clamp circuit configured to clamp the voltage swing of an analog node within a determined range. The clamp also helps to extend the bandwidth of the receiver. | 01-22-2009 |
Abhay S. Dixit, San Diego, CA US
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20100127736 | LOW VOLTAGE DIFFERENTIAL SIGNALING DRIVER WITH PROGRAMMABLE ON-CHIP RESISTOR TERMINATION - A low voltage differential signaling driver is disclosed and may include a current steering output circuit having a first driver output and a second driver output. The low voltage differential signaling driver may also include a programmable on-chip resistor. | 05-27-2010 |
20110291703 | Method and Apparatus to Sterialize Parallel Data Input Values - A method and apparatus to serialize parallel data input values is disclosed. In a particular embodiment, a method of serializing parallel data input values includes receiving multiple data input values in parallel at an input tier of a selection circuit, where the input tier includes multiple combinatorial gate multiplexers. The method further includes selecting an output value at an output tier of the selection circuit, where the output tier includes at least one combinatorial gate multiplexer. | 12-01-2011 |
20130181742 | METHOD AND APPARATUS TO SERIALIZE PARALLEL DATA INPUT VALUES - A method includes applying a clock signal having an uneven duty cycle to a control input of at least one selection element of a selection circuit having a tree structure that includes multiple selection elements. The tree structure includes a data input tier and a data output tier. | 07-18-2013 |
Abhijit Dixit, Sunnyvale, CA US
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20130290545 | Provisioning tool for use in a distributed computer network - A tool that allows a CDN customer, partner, or other authorized entity to create a DNS canonical name (CNAME) on the content delivery network without having to contact the content delivery network service provider directly. | 10-31-2013 |
20150180826 | Provisioning tool for a content delivery network (CDN) - A tool that allows a CDN customer, partner, or other authorized entity to create a DNS canonical name (CNAME) on the content delivery network without having to contact the content delivery network service provider directly. | 06-25-2015 |
Anand Dixit, Mountain View, CA US
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20090083598 | METHOD FOR MONITORING AND ADJUSTING CIRCUIT PERFORMANCE - A method for testing an integrated circuit implemented in an electronic system. The method includes placing an integrated circuit (or portion thereof) that is implemented in an operational system (e.g., in a computer system) in an offline status. An electrical parameter of the integrated system (e.g., a voltage, clock frequency, etc.) is set, and a built-in self-test (BIST) is conducted. Any failures that occur during the BIST are recorded. Testing is then repeated for each of a plurality of predetermined values of the electrical parameter, recording any failures that occur. Once testing is complete a failure rate/range is determined for each of the predetermined values. | 03-26-2009 |
20090322401 | METHOD AND APPARATUS FOR AN EVENT TOLERANT STORAGE CIRCUIT - An apparatus for an event tolerant circuit including a latch. The event tolerant circuit may maintain correct data values even after the occurrence of an event such as a soft error. The event tolerant circuit may introduce a delay in a feedback loop, thereby passing the glitch value to an element in the feedback loop at different times, thus preventing the propagation of the glitch through the event tolerant circuit. | 12-31-2009 |
20100327937 | CONFIGURABLE PULSE GENERATOR - The described embodiments provide a circuit that can be configured as a pulse generator or as an oscillator. The circuit includes a pulse generator circuit and a test circuit that is coupled to the pulse generator circuit. In the described embodiments, an disable signal is coupled to the test circuit. When the disable signal is asserted, the test circuit is disabled, and the pulse generator circuit outputs pulses of a predetermined duration. In contrast, when the disable signal is deasserted, the test circuit is enabled, and the pulse generator circuit outputs an oscillating signal. | 12-30-2010 |
20100327982 | INVERTING DIFFERENCE OSCILLATOR - The described embodiments provide a configurable pulse generator circuit. More specifically, the described embodiments include a pulse generator circuit; an inverting difference oscillator (IDO) enabling circuit coupled to the pulse generator circuit; and a disable signal coupled to the IDO enabling circuit. When the disable signal is asserted, the IDO enabling circuit is disabled and the pulse generator circuit is configured as a pulse generator. In contrast, when the disable signal is deasserted, the IDO enabling circuit is enabled and the pulse generator circuit is configured as part of an IDO. | 12-30-2010 |
20110121906 | INVERTING DIFFERENCE OSCILLATOR - The described embodiments provide a configurable pulse generator circuit. More specifically, the described embodiments include a pulse generator circuit; an inverting difference oscillator (IDO) enabling circuit coupled to the pulse generator circuit; and a disable signal coupled to the IDO enabling circuit. When the disable signal is asserted, the IDO enabling circuit is disabled and the pulse generator circuit is configured as a pulse generator. In contrast, when the disable signal is deasserted, the IDO enabling circuit is enabled and the pulse generator circuit is configured as part of an IDO. | 05-26-2011 |
20110254669 | FAST REPEATER LATCH - A repeater circuit is disclosed. The repeater circuit includes an input circuit coupled to receive a data input signal and a clock signal, and an output circuit configured to, when activated, drive an output signal on an output node. The input circuit is further configured to activate the output circuit in order to initiate a logical transition of the data output signal. A deactivation circuit is configured to deactivate the output circuit at a delay subsequent to activation. A latch is coupled the output circuit and it is configured to change a latch output state responsive to activation of the output circuit. The latch is configured to hold a state the output node subsequent to deactivation of the output circuit. The input circuit is configured to activate the output circuit dependent on the clock signal. The deactivation circuit is configured to deactivate the output circuit independent of the clock signal. | 10-20-2011 |
20120099622 | REPEATER CIRCUIT WITH MULTIPLEXER AND STATE ELEMENT FUNCTIONALITY - A circuit implementing multiplexer, storage, and repeater functions is disclosed. The circuit includes first and second input stages having first and second data inputs, respectively. An output stage is configured to drive an output signal. The first input stage is configured to activate the output stage responsive to a first condition, while the second input stage is configured to activate the output stage responsive to a second condition. An intermediate stage is configured to deactivate the output stage at a first delay time subsequent to one of the first or second input stages activating the output stage. The repeater circuit also includes a storage element configured to store a state of the output signal, and further configured to cause the output node to be held at the state of the output signal subsequent to deactivation of the output stage. | 04-26-2012 |
20120212269 | SINGLE-INVERSION PULSE FLOP - A single inversion pulse flop includes a critical evaluation path with a single inverter and a storage feedback loop arranged in parallel with the critical evaluation path. The single inversion pulse flop incurs a single inversion delay and does not require an output buffer. | 08-23-2012 |
20130043921 | GLITCH HARDENED FLOP REPEATER - A repeater circuit is disclosed. The circuit includes an input stage configured to receive an input signal and a clock signal. An output stage is configured to drive an output signal on an output node to a first state responsive to a first transition of the input signal on the input node concurrent with a first phase of the clock signal. The input stage is configured to activate a first driver circuit of the output stage responsive to a first transition of the input signal. A reverse stage is configured to assert a first inhibit signal at a delay time subsequent to activation of the first driver circuit, which is configured to be deactivated responsive to assertion of the first inhibit signal. Assertion of the first inhibit signal is prevented responsive to a second transition of the input data signal occurring before the delay time has elapsed. | 02-21-2013 |
20150194968 | Phase Aligner with Short Lock Time - A phase alignment circuit is disclosed. In one embodiment, the circuit includes a register configured to capture and store, in parallel from a delay unit, a plurality of samples of a first signal, responsive to a change of state of a second signal. The circuit further includes a detection circuit configured to detect a bit position in the register at which a state change of the first signal occurs based on a concurrent evaluation of all samples of the first signal. Selection circuitry in the phase alignment circuit is configured to select an output from a one of a plurality of delay elements of the delay unit based on in the bit position at which the state change was detected. The selection circuitry is configured to output a third signal that is a delayed version of the first signal. | 07-09-2015 |
Anil Dixit, San Jose, CA US
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20090089250 | CONTRACT TEXT SEARCH SUMMARIZED BY CONTRACT - Embodiments of the invention provide systems and methods for searching one or more business objects and presenting the results organized by business object. According to one embodiment, searching one or more business objects can comprise receiving a set of criteria for searching the business objects. A search can be performed for one or more documents associated with each of the business objects based on the criteria for searching the business objects. A first view of results of said searching organized by business object can be presented. The first view of the results of said searching can comprise, for example, a list of contracts having one or more associated documents with content matching the search criteria. Additional views of the search results providing additional details of the results can be present based on user selections. | 04-02-2009 |
Anuradha Dixit, Irvine, CA US
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20140248644 | Highly Sensitive Cell-Based Assay to Detect the Presence of Active Botulinum Neurotoxin Serotype-A - The present specification discloses methods for detecting extremely low amounts of botulinum neurotoxin serotype A in samples, including complex matrices like blood, plasma, and serum. | 09-04-2014 |
Apratim Dixit, Venice, CA US
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20140213915 | WIRELESS MEMS LEFT ATRIAL PRESSURE SENSOR - Systems for monitoring left atrial pressure using implantable cardiac monitoring devices and, more specifically, to a left atrial pressure sensor implanted through a septal wall are presented herein. | 07-31-2014 |
20140213916 | WIRELESS MEMS LEFT ATRIAL PRESSURE SENSOR - Systems for monitoring left atrial pressure using implantable cardiac monitoring devices and, more specifically, to a left atrial pressure sensor implanted through a septal wall are presented herein. | 07-31-2014 |
Apratim Dixit, Menlo Park, CA US
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20150314123 | MRI COMPATIBLE MEDICAL DEVICES - A medical device for conducting electrical signal comprises an elongate member and a plurality of cables. Each cable may have three concentric layers: a first layer with an inner conductor, a second layer with an inner insulator, and a third layer with an outer conductor. The inner insulator electrically isolates the outer conductor from the inner conductor. | 11-05-2015 |
Apratim Dixit, Burbank, CA US
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20110022057 | APPARATUS AND METHODS FOR TRANSFERRING AN IMPLANTED ELONGATE BODY TO A REMOTE SITE - A transfer guidewire assembly configured to manipulate an implanted elongate body includes a flexible elongate portion, such as a guidewire, and coupler. The flexible elongate body has a proximal end and a distal end attached to the coupler. The coupler can include a catheter and/or a handle. The handle can include a screw. The coupler is configured to be removably attached to the end of an implanted elongate body, for example, by forming an interference fit with the outside diameter of the implanted body. A method for transferring an end of an implanted medical component from first site to a second site within a patient, such as a pacemaker, defibrillator, and/or sensor lead, etc., includes inserting a guidewire into the body at the first site and externalizing the guidewire at the second site. A proximal portion of the implanted component near the first site and is attached to the guidewire. The proximal portion of the implanted component is pulled through the patient's body and out the second site with the transfer guidewire assembly. | 01-27-2011 |
20120130219 | IMPLANTABLE MICRO-ELECTROMECHANICAL SYSTEM SENSOR - The disclosure relates in some aspects to an implantable pressure sensor and a method of measuring pressure. In some embodiments pressure may be measured through the use of an implantable lead incorporating one or more pressure sensors. In some aspects a pressure sensor is implemented in a micro-electromechanical system (“MEMS”) that employs direct mechanical sensing. A biocompatible material is attached to one or more portions of the MEMS sensor to facilitate implant in a body of a patient. The MEMS sensor may thus be incorporated into an implantable lead for measuring blood pressure in, for example, one or more chambers of the patient's heart. | 05-24-2012 |
Ashish B. Dixit, Mountain View, CA US
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20080244471 | SYSTEM AND METHOD OF CUSTOMIZING AN EXISTING PROCESSOR DESIGN HAVING AN EXISTING PROCESSOR INSTRUCTION SET ARCHITECTURE WITH INSTRUCTION EXTENSIONS - An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development. | 10-02-2008 |
20080244506 | SYSTEM AND METHOD OF DESIGNING INSTRUCTION EXTENSIONS TO SUPPLEMENT AN EXISTING PROCESSOR INSTRUCTION SET ARCHITECTURE - An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development. | 10-02-2008 |
Girish A. Dixit, San Jose, CA US
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20090011148 | Methods and apparatuses promoting adhesion of dielectric barrier film to copper - Adhesion between a copper metallization layer and a dielectric barrier film may be promoted by stabilizing a flow of a silicon-containing precursor in a divert line leading to the chamber exhaust. The stabilized gas flow is then introduced to the processing chamber to precisely form a silicide layer over the copper. This silicidation step creates a network of strong Cu—Si bonds that prevent delamination of the barrier layer, while not substantially altering the sheet resistance and other electrical properties of the resulting metallization structure. | 01-08-2009 |
Milind Dixit, Murrieta, CA US
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20110280956 | LANTHANUM CARBONATE HYDROXIDE, LANTHANUM OXYCARBONATE AND METHODS OF THEIR MANUFACTURE AND USE - The present invention is a method of producing a lanthanum carbonate hydroxide or lanthanum oxycarbonate which has improved properties. The method involves the use of a water soluble lanthanum and a water soluble non-alkali metal carbonate or bicarbonate. The resulting material can be used as a phosphate binder individually or for treating patients with hyperphosphatemia. | 11-17-2011 |
Milind Dixit, Newbury Park, CA US
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20140161885 | LANTHANUM CARBONATE HYDROXIDE, LANTHANUM OXYCARBONATE AND METHODS OF THEIR MANUFACTURE AND USE - The present invention is a method of producing a lanthanum carbonate hydroxide or lanthanum oxycarbonate which has improved properties. The method involves the use of a water soluble lanthanum and a water soluble non-alkali metal carbonate or bicarbonate. The resulting material can be used as a phosphate binder individually or for treating patients with hyperphosphatemia. | 06-12-2014 |
Sagar Shyam Dixit, Sunnyvale, CA US
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20130013844 | INTELLIGENT CONTENT AWARE CACHING OF VIRTUAL MACHINE DATA BY RELEVANCE TO THE NTFS FILE SYSTEM - Methods and systems to intelligently cache content in a virtualization environment using virtualization software such as VMWare ESX or Citrix XenServer or Microsoft HyperV or Redhat KVM or their variants are disclosed. Storage IO operations (reads from and writes to disk) are analyzed (or characterized) for their overall value and pinned to cache if their value exceeds a certain defined threshold based on criteria specific to the New Technology File System (NTFS) file-system. Analysis/characterization of NTFS file systems for intelligent dynamic caching include analyzing storage block data associated with a Virtual Machine of interest in accordance with a pre-determined data model to determine the value of the block under analysis for long term or short term caching. Integer values assigned to different types of NTFS objects in a white list data structure called a catalog that can be used to analyze the storage block data. | 01-10-2013 |
20130013865 | DEDUPLICATION OF VIRTUAL MACHINE FILES IN A VIRTUALIZED DESKTOP ENVIRONMENT - Techniques for deduplication of virtual machine files in a virtualized desktop environment are described, including receiving data into a page cache, the data being received from a virtual machine and indicating a write operation, and deduplicating the data in the page cache prior to committing the data to storage, the data being deduplicated in-band and in substantially real-time. | 01-10-2013 |
Sagar Shyam Dixit, Mountain View, CA US
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20140237181 | METHOD AND APPARATUS FOR PREPARING A CACHE REPLACEMENT CATALOG - Methods and systems to intelligently cache content in a virtualization environment using virtualization software such as VMWare ESX or Citrix XenServer or Microsoft HyperV or Redhat KVM or their variants are disclosed. Storage IO operations (reads from and writes to disk) are analyzed (or characterized) for their overall value and pinned to cache if their value exceeds a certain defined threshold based on criteria specific to the New Technology File System (NTFS) file-system. Analysis/characterization of NTFS file systems for intelligent dynamic caching include analyzing storage block data associated with a Virtual Machine of interest in accordance with a pre-determined data model to determine the value of the block under analysis for long term or short term caching. Integer values assigned to different types of NTFS objects in a white list data structure called a catalog that can be used to analyze the storage block data. | 08-21-2014 |
20140237182 | METHOD AND APPARATUS FOR SERVICING READ AND WRITE REQUESTS USING A CACHE REPLACEMENT CATALOG - Methods and systems to intelligently cache content in a virtualization environment using virtualization software such as VMWare ESX or Citrix XenServer or Microsoft HyperV or Redhat KVM or their variants are disclosed. Storage IO operations (reads from and writes to disk) are analyzed (or characterized) for their overall value and pinned to cache if their value exceeds a certain defined threshold based on criteria specific to the New Technology File System (NTFS) file-system. Analysis/characterization of NTFS file systems for intelligent dynamic caching include analyzing storage block data associated with a Virtual Machine of interest in accordance with a pre-determined data model to determine the value of the block under analysis for long term or short term caching. Integer values assigned to different types of NTFS objects in a white list data structure called a catalog that can be used to analyze the storage block data. | 08-21-2014 |
20140237183 | SYSTEMS AND METHODS FOR INTELLIGENT CONTENT AWARE CACHING - Methods and systems to intelligently cache content in a virtualization environment using virtualization software such as VMWare ESX or Citrix XenServer or Microsoft HyperV or Redhat KVM or their variants are disclosed. Storage IO operations (reads from and writes to disk) are analyzed (or characterized) for their overall value and pinned to cache if their value exceeds a certain defined threshold based on criteria specific to the New Technology File System (NTFS) file-system. Analysis/characterization of NTFS file systems for intelligent dynamic caching include analyzing storage block data associated with a Virtual Machine of interest in accordance with a pre-determined data model to determine the value of the block under analysis for long term or short term caching. Integer values assigned to different types of NTFS objects in a white list data structure called a catalog that can be used to analyze the storage block data. | 08-21-2014 |
Sangeeta Dixit, Sunnyvale, CA US
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20090250108 | SILICON CARBIDE FOR CRYSTALLINE SILICON SOLAR CELL SURFACE PASSIVATION - Embodiments of the present invention generally provide methods for depositing a silicon carbide (SiC) passivation layer that may act as a high-quality passivation layer for solar cells. Embodiments of the invention also provide methods for depositing a silicon carbide/silicon oxide passivation layer that acts as a high-quality rear surface passivation layer for solar cells. The methods described herein enable the use of deposition systems configured for processing large-area substrates for solar cell processing. According to embodiments of the invention, a SiC passivation layer may be formed with improved minority carrier lifetime measurements. The SiC passivation layer may be formed at a temperature between about 150° C. and 450° C., which is much lower than temperatures for thermal oxide passivation. | 10-08-2009 |
Sangeeta Dixit, Mountain View, CA US
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20080254203 | SILICON NITRIDE PASSIVATION FOR A SOLAR CELL - A silicon nitride layer may be formed with a suitable refractive index, mass density, and hydrogen concentration so that the layer may serve as an ARC/passivation layer on a solar cell substrate. The silicon nitride layer may be formed on a solar cell substrate by adding a hydrogen gas diluent to a conventional precursor gas mixture during the deposition process. Alternatively, the silicon nitride layer may be formed on a solar cell substrate by using a precursor gas mixture consisting essentially of silane and nitrogen. To improve deposition chamber throughput, the silicon nitride layer may be a dual stack film that includes a low-hydrogen interface layer and a thicker bulk silicon nitride layer. Placing a plurality of solar cell substrates on a substrate carrier and transferring the substrate carrier into the deposition chamber may further enhance deposition chamber throughput. | 10-16-2008 |
20100197145 | SILICON NITRIDE PASSIVATION FOR A SOLAR CELL - A silicon nitride layer may be formed with a suitable refractive index, mass density, and hydrogen concentration so that the layer may serve as an ARC/passivation layer on a solar cell substrate. The silicon nitride layer may be formed on a solar cell substrate by adding a hydrogen gas diluent to a conventional precursor gas mixture during the deposition process. Alternatively, the silicon nitride layer may be formed on a solar cell substrate by using a precursor gas mixture consisting essentially of silane and nitrogen. To improve deposition chamber throughput, the silicon nitride layer may be a dual stack film that includes a low-hydrogen interface layer and a thicker bulk silicon nitride layer. Placing a plurality of solar cell substrates on a substrate carrier and transferring the substrate carrier into the deposition chamber may further enhance deposition chamber throughput. | 08-05-2010 |
Sanhita Dixit, Fremont, CA US
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20090074988 | Droplet Bilayers - The invention provides methods and apparatuses for making an artificial, amphiphilic bilayer using aqueous micro-droplets (1-1,000 um dia) in a water-immiscible solvent, wherein immediately surrounding each droplet is a monolayer of amphiphilic molecules; the general method comprising: juxtapositioning the droplets with a focused laser beam such that the monolayers merge to create a bilayer of the amphiphilic molecules between the droplets. | 03-19-2009 |
Sanjay Dixit, Cupertino, CA US
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20130167181 | WIRELESS TCP LINK STATE MONITORING BASED VIDEO CONTENT ADAPTATION AND DATA DELIVERY - Systems and methods are used for receiving a video request from a user equipment for video to be downloaded; determining a link bandwidth status associated with the user equipment; in response to the link bandwidth status associated with the user equipment, determining whether to implement one or more additional processing functions associated with the video delivery; during the video delivery, repeating the determining such that the one or more additional processing functions associated with the video delivery can be implemented or not implemented at different times during the video delivery. These processing functions can include transrating, HTTP optimization, TCP optimization, and video pacing. | 06-27-2013 |
Sanjay G. Dixit, Los Altos, CA US
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20160110418 | PERFORMING SEQUENCE ANALYSIS AS A RELATIONAL JOIN - A usage model and the underlying technology used to provide sequence analysis as part of a relational database system. Included components include the semantic and syntactic integration of the sequence analysis with an existing query language, the storage methods for the sequence data, and the design of a multipart execution scheme that runs the sequence analysis as part of a potentially larger database join, especially using parallel execution techniques. | 04-21-2016 |
Saurabh Dixit, Sunnyvale, CA US
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20140324604 | SYSTEM AND METHOD FOR PRODUCING PROPOSED ONLINE ADVERTISEMENTS FROM PRE-EXISTING ADVERTISING CREATIVES - A system and method automatically transforms preexisting advertising creatives adapted for a first content service environment into advertising creatives for a second content service environment. The transformed advertising creative are then suitable for initiating a new advertising campaign. In one example, the system transforms advertising creatives from search advertisements and display advertisements into creatives for a stream advertising campaign. Stream advertisements may then be placed into a stream of content displayed on a user device. The transformed advertising creatives may be included in a proposal to a prospective advertiser. The advertiser then can choose to accept the proposal. The process of creating new advertising creatives for the proposal to the advertiser is simplified, automated and made more efficient. | 10-30-2014 |
20150039419 | KEYWORD PRICE RECOMMENDATION - An system can include a server that includes or is associated with a keyword price recommendation module. The module can be configured to recommend an optimal price for a keyword, per referral event, in a search engine marketing campaign. For making such a recommendation, the module can be configured to determine revenue generated per referral event for the keyword according to a number of referral events for the keyword for a plurality of users and revenue generated for the keyword by the plurality of users. It can also be configured to select a return on investment percentage for the keyword, and determine the optimal price for the keyword according to the revenue generated per referral event and the return on investment percentage. Additionally or alternatively, the keyword price recommendation module can be configured to calculate the return on investment percentage for the keyword according to at least one market condition. | 02-05-2015 |
20150039432 | KEYWORD RECOMMENDATION - An example system can include a server that includes or is associated with a keyword recommendation module. The keyword recommendation module can be configured to select keywords for a search engine for use in a search engine marketing campaign, wherein the search engine provides more traffic to Internet content of a publisher than other search engines, for the keywords. The module can also be configured to determine, per keyword, user engagement with the Internet content resulting from the traffic provided by the search engine for the keywords, according to one or more of time spent viewing the Internet content, page views of the Internet content, and dwell times. The module can also be configured to score, per keyword, the keywords according to the determined user engagement with the Internet content, and generate keyword recommendations according to the scoring of the keywords. | 02-05-2015 |
Sudhir Dixit, Woodside, CA US
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20090232037 | Adaptive mechanism for dynamic reconfiguration of mesh networks - In a wireless mesh network of network nodes, there is identified a first subset of the nodes that have a direct connection to at least one end user, and a second subset of nodes that are necessary to maintain connections among the end users. The first subset is exclusive of the second subset. Nodes that are not within either the first subset or the second subset enter a power savings mode, which may include shutting down completely for a predetermined period. This enables power savings in that only the minimum number of nodes that are necessary to maintain connectivity of the end users may remain powered. A centralized node may make the decisions and inform individual nodes to shut down, or each node may run the same algorithm using the same input information and determine its own shutdown decision. | 09-17-2009 |
Tarpan Dixit, San Francisco, CA US
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20110259391 | REAL TIME PROCESS MONITORING AND CONTROL FOR SEMICONDUCTOR JUNCTIONS - A method of manufacturing a semiconductor layer is provided. In a first deposition during a first period of time, at least one Group IIIA element and at least one Group VIA element are deposited on a substrate or on a layer optional disposed on the substrate such as a back-electrode. During a second deposition during a second period of time, at least one Group IB element and the at least one group VIA element are deposited on the substrate or the optional layer. The one Group IB element combines with the Group VIA element to form a IB | 10-27-2011 |
Vinay Bethgeri Ganesh Dixit, Sunnyvale, CA US
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20130085700 | TECHNIQUES FOR IMPROVED PEDOMETER READINGS - Techniques are provided for improving pedometer readings. In some embodiments, motion data, such as acceleration data is detected, and a magnitude of the acceleration data, referred to as the modulus, is processed. Techniques involve performing frequency analysis on the modulus. In some embodiments, the modulus samples are counted perform frequency analysis on each complete sample set. Each complete sample set includes overlapping samples with the previous sample set. A suitable frequency analysis algorithm, such as fast Fourier transform (FFT) dominant frequency computation is performed on each sample set to determine the dominant frequency of the modulus. The dominant frequency of the modulus may be smoothed in some embodiments to remove irregularities such as spikes or periods of inactivity. In some embodiments, results of frequency analysis may be used to determine whether a detected step is a walking step or a running step. | 04-04-2013 |
20130085711 | TECHNIQUES FOR IMPROVED PEDOMETER READINGS - Techniques are provided for improving pedometer readings. In some embodiments, motion data, such as acceleration data is detected, and a magnitude of the acceleration data, referred to as the modulus, is processed for improved step detection. Techniques involve computing a moving average of the modulus and applying an acceleration threshold filter to the modulus. Crossings are detected based on peak-to-peak swing of the modulus about the moving average. In some embodiments, the frequency of the modulus is used in an adaptive filtering technique. based on the dominant frequency of the modulus, a frequency band is selected to filter to modulus. The frequency band may be dynamically changed to one of several frequency bands when a significant frequency change is detected in the dominant frequency of the modulus. In some embodiments, steps are detected based on the acceleration threshold-filtered and the frequency-filtered modulus. | 04-04-2013 |
Vinay Bethgiri Ganesh Dixit, Sunnyvale, CA US
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20130085677 | TECHNIQUES FOR IMPROVED PEDOMETER READINGS - Techniques are provided for improving pedometer readings. In some embodiments, motion data, such as acceleration data is detected, and a magnitude of the acceleration data, referred to as the modulus, is processed. The modulus is used to detect walking steps and running steps during a measurement. In some embodiments, a distance ran is calculated based on the detected running steps and an estimated running stride length, and a distance walked is calculated based on the detected walking steps and an estimated walking stride length. The estimated running and walking stride lengths are calculated based on various parameters associated with the acceleration data, population data, and user-specific data. Expended calories may be estimated based on the distance ran and walked. The distance analysis process further includes calibration techniques, including, for example, least squares simple regression, least squares multiple regression, and K-factor analysis. | 04-04-2013 |
Vishva Dixit, Los Altos, CA US
Patent application number | Description | Published |
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20100087624 | Methods for making recombinant proteins using apoptosis inhibitors - The invention provided improved methods of making and producing recombinant proteins in in vitro cultures of host cells using apoptosis inhibitors. The use of one or more apoptosis inhibitors in the methods can reduce apoptosis in the cell cultures and markedly improve yield of the desired recombinant proteins. | 04-08-2010 |
20110045474 | COPI MOLECULES AND USES THEREOF - The invention provides diagnostic, prognostic, and therapeutic uses for detecting COP1 overexpression in a variety of cancers. The methods and uses can further include detecting p53 expression. The invention also provides reagents and kits for use in screening for test compounds that interfere with COP1 and p53 binding. | 02-24-2011 |
20110256133 | ANTI-POLYUBIQUITIN ANTIBODIES AND METHODS OF USE - The invention provides anti-polyubiquitin antibodies and methods of using the same. | 10-20-2011 |
20130058955 | ANTI-POLYUBIQUITIN ANTIBODIES AND METHODS OF USE - The invention provides anti-polyubiquitin antibodies and methods of using the same. | 03-07-2013 |
20150307602 | ANTI-POLYUBIQUITIN ANTIBODIES AND METHODS OF USE - The invention provides anti-polyubiquitin antibodies and methods of using the same. | 10-29-2015 |
Vishva M. Dixit, Los Altos Hills, CA US
Patent application number | Description | Published |
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20080241155 | Death domain containing receptor 4 - The present invention relates to novel Death Domain Containing Receptor-4 (DR4) proteins which are members of the tumor necrosis factor (TNF) receptor family. In particular, isolated nucleic acid molecules are provided encoding the human DR4 proteins. DR4 polypeptides are also provided as are vectors, host cells and recombinant methods for producing the same. The invention further relates to screening methods for identifying agonists and antagonists of DR4 activity and methods for using DR4 polynucleotides and polypeptides. The invention also relates to the treatment of diseases associated with reduced or increased levels of apoptosis using antibodies specific for DR4, which may be agonists and/or antagonists of DR4 activity. | 10-02-2008 |
Vishva M. Dixit, Los Altos, CA US
Patent application number | Description | Published |
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20140199327 | METHODS OF PROMOTING DIFFERENTIATION - Provided herein are methods of promoting cell fate change, particularly differentiation of tumor cells, by inhibition of USP1, UAF1, and/or ID (e.g., ID1, ID2, and/or ID3). | 07-17-2014 |