Patent application number | Description | Published |
20120161870 | FIGURE 8 BALUN - A balun includes a first set of wound conductors includes a first loop portion and a second loop portion. The first loop portion and the second loop portion are conductively coupled and form a first figure eight structure. The balun further includes a second set of wound conductors includes a third loop portion and a fourth loop portion. The third loop portion and the fourth loop portion are conductively coupled and form a second figure eight structure. The first loop portion and the third loop portion are inductively coupled. The second loop portion and the fourth loop portion are inductively coupled. | 06-28-2012 |
20130214987 | FIGURE 8 BALUN - A balun includes a first conductor winding having a first figure eight shape and a second conductor winding have a second figure eight shape. The first figure eight shape includes a first loop and a second loop. The second figure eight shape includes a third loop and a fourth loop. The first loop and the second loop are not concentric. The third loop and the fourth loop are not concentric. | 08-22-2013 |
20140333387 | CONDUCTOR WINDING AND INDUCTORS ARRANGED TO FORM A BALUN HAVING A FIGURE EIGHT SHAPE - A balun including a first conductor winding, a first inductor, a second inductor, a third inductor, and a fourth inductor. The first conductor winding has a figure eight shape including a first loop and a second loop. The first inductor and the second inductor substantially surround the first loop. The third inductor and the fourth inductor substantially surround the second loop. | 11-13-2014 |
20150289360 | CIRCUITS INCORPORATING INTEGRATED PASSIVE DEVICES HAVING INDUCTANCES IN 3D CONFIGURATIONS AND STACKED WITH CORRESPONDING DIES - A circuit including a die and an integrated passive device. The die includes a first substrate and at least one active device. The integrated passive device includes a first layer, a second substrate, a second layer and an inductance. The inductance includes vias, where the vias are implemented in the second substrate. The inductance is implemented on the first layer, the second substrate, and the second layer. A resistivity per unit area of the second substrate is greater than a resistivity per unit area of the first substrate. The third layer is disposed between the die and the integrated passive device. The third layer includes pillars, where the pillars respectively connect ends of the inductance to the at least one active device. The die, the integrated passive device and the third layer are disposed relative to each other to form a stack. | 10-08-2015 |
20150364418 | CIRCUITS INCORPORATING INTEGRATED PASSIVE DEVICES HAVING INDUCTANCES IN 3D CONFIGURATIONS AND STACKED WITH CORRESPONDING DIES - A circuit including: a die a first substrate and at least one active device; an integrated passive device including a first layer, a second substrate, a second layer and an inductance; and a third layer. The inductance includes vias and is an electrostatic discharge inductance. The vias are implemented in the second substrate. The inductance is implemented on the first layer, the second substrate, and the second layer. A resistivity per unit area of the second substrate is greater than a resistivity per unit area of the first substrate. The third layer is disposed between the die and the integrated passive device. The third layer includes pillars. The pillars respectively connect ends of the inductance to the at least one active device. The die, the integrated passive device and the third layer are disposed relative to each other to form a stack. | 12-17-2015 |
Patent application number | Description | Published |
20090057544 | CAMERA MODULE LENS CAP - A camera module lens cap is provided to protect a camera module in a mobile device where the camera module is exposed. The camera module lens cap includes an optically transparent member for positioning adjacent a camera lens, and a housing for carrying the optically transparent member. The housing includes an overhanging lip for engaging a base of the camera module. | 03-05-2009 |
20100297813 | Semiconductor package with position member - The present disclosure provides a very thin semiconductor package including a leadframe with a die-attach pad and a plurality of lead terminals, a die attached to the die-attach pad and electrically connected to the lead terminals via bonding wires, a position member disposed upon the die and/or die-attach pad, and a molding material encapsulating the leadframe, the die, and the position member together to form the semiconductor package. The method for manufacturing a very thin semiconductor package includes disposing a first position member on one side of the die-attach pad of a leadframe, attaching a die onto the opposite side of the die-attach pad, optionally disposing a second position member on top of the die, electrically connecting the die to the lead terminals of the leadframe, and encapsulating the leadframe, the die, and the position member(s) together to form the very thin semiconductor package. | 11-25-2010 |
20110006411 | Simplified multichip packaging and package design - A multichip integrated circuit apparatus includes first and second integrated circuit die mounted on opposite sides of a leadframe die paddle, with at least one of the integrated circuit die extending further toward the leads than does the die paddle. With this arrangement, the active circuit areas of both integrated circuit die can face in the same direction, and can be wire bonded to the same surfaces of the leads. This avoids wire bonding complications that are often encountered in multichip integrated circuit package designs. | 01-13-2011 |
20110018125 | SEMICONDUCTOR PACKAGE WITH A STIFFENING MEMBER SUPPORTING A THERMAL HEAT SPREADER - A semiconductor package includes a substrate board and a semiconductor die attached to a top surface of that substrate board. A heat spreader is provided over the semiconductor die. A stiffening ring is positioned surrounding the semiconductor die, the stiffening ring being attached to the top surface of the substrate board and attached to a bottom surface of the plate portion of the heat spreader. Space is left on the board outside of the stiffening ring to support the installation of passive components to the substrate board. An external ring may be included, with that external ring being interconnected to the stiffening ring by a set of tie bars. Alternatively, the heat spreader includes an integrally formed peripheral sidewall portion. | 01-27-2011 |
Patent application number | Description | Published |
20090014822 | MICROELECTRONIC IMAGERS AND METHODS FOR MANUFACTURING SUCH MICROELECTRONIC IMAGERS - Microelectronic imagers and methods of manufacturing such microelectronic imagers are disclosed. In one embodiment, a method for manufacturing a microelectronic imager can include irradiating selected portions of an imager housing unit. The housing unit includes a body having lead-in surfaces and a support surface that define a recess sized to receive a microelectronic die. The method also includes depositing a conductive material onto the irradiated portions of the housing unit and forming electrically conductive traces. The method further includes coupling a plurality of terminals at a front side of a microelectronic die to corresponding electrically conductive traces in the recess in a flip-chip configuration. The microelectronic die includes an image sensor aligned with at least a portion of an optical element carried by the housing unit and at least partially aligned with the recess. The method can then include depositing an encapsulant into the recess and over at least a portion of the microelectronic die. | 01-15-2009 |
20100068851 | CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS - Systems and methods for packaging integrated circuit chips in castellation wafer level packaging are provided. The active circuit areas of the chips are coupled to castellation blocks and, depending on the embodiment, input/output pads. The castellation blocks and input/output pads are encapsulated and held in place by an encapsulant. When the devices are being fabricated, the castellation blocks and input/output pads are sawed through. If necessary, the wafer portion on which the devices are fabricated may be thinned. The packages may be used as a leadless chip carrier package or may be stacked on top of one another. When stacked, the respective contacts of the packages are preferably coupled. Data may be written to, and received from, packaged chips when a chip is activated. Chips may be activated by applying the appropriate signal or signals to the appropriate contact or contacts. | 03-18-2010 |
20110018143 | WAFER LEVEL PACKAGING - Through vias in a substrate are formed by creating a trench in a top side of the substrate and at least one trench in the back side of the substrate. The sum of the depths of the trenches at least equals the height of the substrate. The trenches cross at intersections, which accordingly form the through vias from the top side to the back side. The through vias are filled with a conductor to form contacts on both sides and the edge of the substrate. Contacts on the backside are formed at each of the trench. The through vias from the edge contacts. Traces connect bond pads to the conductor in the through via. Some traces are parallel to the back side traces. Some traces are skew to the back side traces. The substrate is diced to form individual die. | 01-27-2011 |
Patent application number | Description | Published |
20120128752 | MULTI-PHASE MICROPARTICLES AND METHOD OF MANUFACTURING MULTI-PHASE MICROPARTICLES - The invention relates to a method of manufacturing multi-phase microparticles. The method comprises dissolving at least three different polymers in a volatile organic solvent to obtain a first solution. The first solution comprises at least two cloud points, wherein the second cloud point is higher than the first cloud point. Viscosity of the first solution and the first and second cloud point are selected such that the at least three different polymers are immiscible with each other in the first solution. The first solution is dispersed into an aqueous continuous phase which comprises a surfactant to obtain an emulsion. The volatile organic solvent is evaporated from the emulsion. The total concentration of the at least three different polymers together in the emulsion before evaporation is below the first cloud point, or is above the first cloud point and below the second cloud point or is above the second cloud point. The invention relates also to a multi-phase microparticle made by the method and a pharmaceutical composition comprising the multi-phase microparticle. | 05-24-2012 |
20120142641 | TARGETTED DRUG DELIVERY TO THE BONE - The present invention relates to a complex of a bisphosphonate compound, methods of preparing such complex and uses thereof. | 06-07-2012 |
20130281977 | DEVICE FOR CONTROLLED RELEASE OF A BIOACTIVE AGENT - Present invention relates to a device for controlled release of a bioactive agent. The device comprises a thin film located on the surface of the device, wherein said thin film comprises a bioactive agent-containing layer comprising a polymeric matrix and at least one bioactive agent. | 10-24-2013 |
20130295186 | METHOD FOR COATING PARTICLES WITH CALCIUM PHOSPHATE AND PARTICLES, MICROPARTICLES AND NANOPARTICLES FORMED THEREOF - The present invention relates to a method for coating particles with calcium phosphate (CaP), wherein the particles are negatively charged. The method includes contacting the particles with a first solution containing calcium ions, removing the first solution to obtain a precipitate, and contacting the precipitate with a second solution containing phosphate ions to obtain CaP-coated particles. | 11-07-2013 |
20130302429 | METHOD FOR ENCAPSULATING PARTICLES - The present invention relates to a method for encapsulating particles of a water-insoluble material within a capsule of a water-insoluble polymer, comprising (a) dispersing particles of the water-insoluble material or a solution containing the water-insoluble material in a first aqueous phase containing a first surfactant to obtain a first dispersion; (b) collecting the particles of the water-insoluble material coated with the first surfactant; (c) washing the collected particles; (d) adding the washed surfactant-coated water-insoluble material particles to a polymer solution containing the water-insoluble polymer of the capsule to obtain a polymer mixture; and (e) dispersing the polymer mixture in a second aqueous phase containing a second surfactant to obtain a second dispersion comprising the particles of the water-insoluble material encapsulated within the capsule of the water-insoluble polymer. | 11-14-2013 |