Patent application number | Description | Published |
20110123148 | Optical router with nearly ideal performance - An optimized planar optical router consisting of two stages performing stationary imaging between an input waveguide and a set of output waveguides has advantages of reduced size, larger number of channels and minimal loss variation in each passband. Each stage is a waveguide grating router, the two stages are characterized by nearly equal free-spectral ranges, and a waveguide lens is connected between the two stages. In one embodiment, the lens is connected between the central zones of the two stages, and the diffraction orders of the two stages vary monotonically from each passband to the next. In another embodiment, the loss caused by secondary images is substantially reduced by using a composite lens providing efficient transmission of both principal and secondary images. | 05-26-2011 |
20110206318 | Optical router with stationary response and increased number of channels - A planar optical router consisting of two stages performing stationary imaging has advantages of reduced size, increased number of channels and reduced crosstalk. In one embodiment, each stage of the router includes a waveguide grating, and the router produces several sets of interleaved images, with the property that different sets are characterized by different diffraction orders of the two gratings. The new arrangement substantially increases the number of output waveguides, as compared to previous arrangements using only one set of images, characterized by the same order of the output stage. Moreover, since adjacent sets are characterized by different orders, crosstalk is substantially reduced. In a second embodiment, the number of output waveguides is further increased by including two gratings in the second stage. | 08-25-2011 |
20120014644 | Optical router with nearly ideal performance - An optimized planar optical router consisting of two stages performing stationary imaging between an input waveguide and a set of output waveguides has advantages of reduced size, larger number of channels and minimal loss variation in each passband. The new router is an optimized M×N imaging arrangement including two waveguide gratings and n waveguide lenses connected between the principal zones of the two gratings. The largest values of N are realized by using a combination of two techniques that increase N without increasing the size of the two gratings. One technique increases N for a given number n of lenses and, the other, increases n. In one embodiment, each lens produces a periodic sequence of passbands, all transmitted from a particular input waveguide to the same output waveguide, whereas, in a second embodiment, the above passbands are transmitted to different output waveguides. In both cases, the loss caused by secondary images is substantially reduced by including secondary lenses. | 01-19-2012 |
Patent application number | Description | Published |
20080251747 | ELECTROMAGNETIC VALVE FOR THE DOSAGE OF FUEL IN AN INTERNAL COMBUSTION ENGINE - An electromagnetic valve for the dosage of fuel in an internal combustion engine; the electromagnetic valve is provided with: a cylindrical tubular valve body; an obturator, which is arranged within the tubular valve body and is mobile between an open position and a closed position; and an electromagnetic actuator to shift the obturator and comprising a coil arranged outside the tubular valve body, a fixed magnetic pole is arranged within the tubular valve body, a mobile keeper arranged within the tubular valve body, mechanically connected to the obturator and is adapted to be magnetically attracted by the magnetic pole when the coil is excited, a tubular magnetic armature arranged outside the tubular valve body around the coil, and a magnetic washer having an annular shape arranged above the coil between the tubular valve body and the tubular magnetic armature to guide the closing of the magnetic flow around the coil. | 10-16-2008 |
20090266920 | Electromagnetic fuel injector for gaseous fuels with anti-wear stop device - Electromagnetic fuel injector for gaseous fuels comprising: an injection nozzle controlled by an injection valve; a movable shutter to regulate the flow of fuel through the injection valve; an electromagnetic actuator, which is suitable to move the shutter between a closed position and an open position of the injection valve and comprises a fixed magnetic pole, a coil suitable to induce a magnetic flux in the magnetic pole, and a movable anchor suitable to be magnetically attracted by the magnetic pole; an absorption element, which is made of an amagnetic elastic material and is arranged between the magnetic pole and the anchor; and a protective element, which is made of a magnetic metal material having high surface hardness and is interposed between the absorption element and the anchor. | 10-29-2009 |
20110253811 | Electromagnetic fuel injector for gaseous fuels with anti-wear stop device - Electromagnetic fuel injector for gaseous fuels comprising: an injection nozzle controlled by an injection valve; a movable shutter to regulate the flow of fuel through the injection valve; an electromagnetic actuator, which is suitable to move the shutter between a closed position and an open position of the injection valve and comprises a fixed magnetic pole, a coil suitable to induce a magnetic flux in the magnetic pole, and a movable anchor suitable to be magnetically attracted by the magnetic pole; an absorption element, which is made of an amagnetic elastic material and is arranged between the magnetic pole and the anchor; and a protective element, which is made of a magnetic metal material having high surface hardness and is interposed between the absorption element and the anchor. | 10-20-2011 |
Patent application number | Description | Published |
20080207727 | 3-Aminocarbazole Compounds, Pharmaceutical Composition Containing the Same and Method for the Preparation Thereof - A compound of formula (I), in which R1, R2, R3, R4, R5, R6, X and Y have the meanings indicated in the description, and the pharmaceutically acceptable salts thereof. A pharmaceutical composition containing a compound of formula (I) or a pharmaceutically acceptable salt thereof. A method for preparing the abovementioned compound of formula (I) and the pharmaceutically acceptable salts thereof. | 08-28-2008 |
20100286189 | (AZA)INDOLE DERIVATIVE SUBSTITUTED IN POSITION 5, PHARMACEUTICAL COMPOSITION COMPRISING IT, INTERMEDIATE COMPOUNDS AND PREPARATION PROCESS THEREFOR - An (aza)indole derivative substituted in position 5, of formula (I) in which X, Y, Z, G1, G2, G3, R1, W, and R2 have the meanings given in the description, a pharmaceutical composition comprising it, and also intermediate compounds and a preparation process therefor. | 11-11-2010 |
20110046197 | 3-AMINOCARBAZOLE COMPOUNDS, PHARMACEUTICAL COMPOSITION CONTAINING THE SAME AND METHOD FOR THE PREPARATION THEREOF - A method for treating an inflammatory process selected from the group consisting of oedema, erythema, articular inflammation, rheumatoid arthritis, arthrosis, a colorectal tumor, a pulmonary carcinoma, an adenocarcinoma, and combinations thereof, in a person in need thereof, the method comprising administering to the person in need thereof, in an amount sufficient to treat the inflammatory process, a 3-aminocarbazole or a salt thereof. | 02-24-2011 |
20130158269 | (AZA)INDOLE DERIVATIVE SUBSTITUTED IN POSITION 5, PHARMACEUTICAL COMPOSITION COMPRISING IT, INTERMEDIATE COMPOUNDS AND PREPARATION PROCESS THEREFOR - An (aza)indole derivative substituted in position 5, of formula (I) in which X, Y, Z, G1, G2, G3, R1, W, and R2 have the meanings given in the description, a pharmaceutical composition comprising it, and also intermediate compounds and a preparation process therefor. | 06-20-2013 |
20150057294 | 1H-INDAZOLE-3-CARBOXAMIDE COMPOUNDS AS GLYCOGEN SYNTHASE KINASE 3 BETA INHIBITORS - The present invention relates to the 1H-indazole-3-carboxamide compounds having the following general formula (I) as glycogen synthase kinase 3 beta (GSK-3β) inhibitors and to their use in the treatment of GSK-3p-related disorders such as, for example, (i) insulin-resistance disorders; (ii) neurodegenerative diseases; (iii) mood disorders; (iv) schizophrenic disorders; (v) cancerous disorders; (vi) inflammation, (vii) substance abuse disorders; (viii) epilepsies; and (ix) neuropathic pain. | 02-26-2015 |
Patent application number | Description | Published |
20080270754 | USING FIELD PROGRAMMABLE GATE ARRAY (FPGA) TECHNOLOGY WITH A MICROPROCESSOR FOR RECONFIGURABLE, INSTRUCTION LEVEL HARDWARE ACCELERATION - A method for dynamically programming Field Programmable Gate Arrays (FPGAs) in a coprocessor, the coprocessor coupled to a processor, includes: beginning an execution of an application by the processor; receiving an instruction from the processor to the coprocessor to perform a function for the application; determining that the FPGA in the coprocessor is not programmed with logic for the function; fetching a configuration bit stream for the function; and programming the FPGA with the configuration bit stream. In this manner, the FPGA are programmable “on the fly”, i.e., dynamically during the execution of an application. The hardware acceleration and resource sharing advantages provided by the FPGA can be utilized more often by the application. Logic flexibility and space savings on the chip comprising the coprocessor and processor are provided as well. | 10-30-2008 |
20080291913 | Detecting a timeout of elements in an element processing system - Provides methods, systems and apparatus for timer management of an element processing system wherein timer intervals related to elements to be processed can be handled in a time-efficient manner. An example method is a method for detecting a timeout of elements in an element processing system wherein a timer value, indicating a timeout interval with respect to a given time base, is assigned to each of the elements when processed. From a number of elements processed, the timer value indicating a minimum timeout interval to expire is determined out of the number of timer values assigned to the number of elements being processed. | 11-27-2008 |
20100217946 | INDIRECTLY-ACCESSED, HARDWARE-AFFINE CHANNEL STORAGE IN TRANSACTION-ORIENTED DMA-INTENSIVE ENVIRONMENTS - Embodiments of the invention provide a method, system, and computer program product for managing a computer memory system including a channel controller and a memory area. In one embodiment, the method comprises the channel controller receiving a request including a header and a payload, and separating said memory area into a working memory area and an auxiliary memory area. A copy of the header is deposited in the working memory area; and a full copy of the request, including a copy of the header and a copy of the payload, is deposited in the auxiliary memory area. The copy of the request in the auxiliary memory area is used to perform hardware operations; and the copy of the header in the working memory area is used to perform software operations. | 08-26-2010 |
Patent application number | Description | Published |
20120167097 | ADAPTIVE CHANNEL FOR ALGORITHMS WITH DIFFERENT LATENCY AND PERFORMANCE POINTS - A method for processing requests in a channel can include receiving a first request in the channel, running calculations on the first request in a processing time T | 06-28-2012 |
20120278905 | CONFIGURABLE INTEGRATED TAMPER DECTECTION CIRCUITRY - Tamper detection circuitry includes a first surface layer surrounding a protected memory, the first surface layer comprising a first plurality of conductive sections; a second surface layer surrounding the protected memory, the second surface layer comprising a second plurality of conductive sections; a programmable interconnect located inside the first surface layer, the programmable interconnect being connected to each conductive section by a plurality of conductive traces, the programmable interconnect being configured to group the conductive section of the first and second plurality of conductive sections into a plurality of circuits, each of the plurality of circuits having a different respective voltage; and a tamper detection module, the tamper detection module configured to detect tampering in the event that a conductive section that is part of a first circuit comes into physical contact with a conductive section that is part of a second circuit. | 11-01-2012 |
20130091346 | Code Updates in Processing Systems - A method for updating code images in a system includes booting a first image of a code with a sub-system processor, receiving a second image of the code, performing a security and reliability check of the second image of the code with the sub-system processor, determining whether the security and reliability check of the second image of the code is successful, storing the second image of the code in a first memory device responsive to determining that the security and reliability check of the second image of the code is successful, designating the second image of the code as an active image, and sending the second image of the code to a second memory device, the second memory device communicatively connected with the first memory device and a main processor. | 04-11-2013 |
20140115405 | INTEGRITY CHECKING INCLUDING SIDE CHANNEL MONITORING - A method for integrity checking for a cryptographic engine in a computing system includes monitoring a state of a side channel of the cryptographic engine during operation of the cryptographic engine by a side channel monitor; comparing the state of the side channel to a side channel model of the cryptographic engine to determine whether a mismatch exists between the state of the side channel and the side channel model; and based on a mismatch between the state of the side channel and the model of the side channel, indicating an error in the cryptographic engine. | 04-24-2014 |
20150254079 | Code Updates in Processing Systems - A method for updating code images in a system includes booting a first image of a code with a sub-system processor, receiving a second image of the code, performing a security and reliability check of the second image of the code with the sub-system processor, determining whether the security and reliability check of the second image of the code is successful, storing the second image of the code in a first memory device responsive to determining that the security and reliability check of the second image of the code is successful, designating the second image of the code as an active image, and sending the second image of the code to a second memory device, the second memory device communicatively connected with the first memory device and a main processor. | 09-10-2015 |
20150261499 | PIPELINED MODULAR REDUCTION AND DIVISION - Embodiments relate to modular reductions. An aspect includes a system to perform modular reductions. The system includes a shift register to store an input string or number. The system also includes a plurality of processing elements arranged in a pipeline configuration to convert the input string to a predefined alphabet or to convert the number to a different base based on a plurality of modular reductions, an output of one of the plurality of processing elements being an input to a subsequent one of the plurality of processing elements in the pipeline as part of a recursive division, and an input of a first one of the plurality of processing elements in the pipeline being an output of the shift register. | 09-17-2015 |
Patent application number | Description | Published |
20150234781 | CONJUGATE GRADIENT SOLVERS FOR LINEAR SYSTEMS - A conjugate gradient solver apparatus is provided for generating data defining a solution vector x for a linear system represented by Ax=b where A is a predetermined matrix and b is a predetermined vector. The apparatus includes solver circuitry and a precision controller. The solver circuitry processes input data, defining said matrix A and vector b, in accordance with an iterative conjugate gradient method to generate said data defining the solution vector x. The solver circuitry is adapted to process data items, corresponding to vectors used in said conjugate gradient method, having a variable fixed-point data format. The precision controller determines the fixed-point data formats of respective said data items adaptively during progress of the conjugate gradient method in the solver circuitry. | 08-20-2015 |
20150234783 | ITERATIVE REFINEMENT APPARATUS - An iterative refinement apparatus configured to generate data defining a solution vector x for a linear system represented by Ax=b, where A is a predetermined matrix and b is a predetermined vector. An outer solver processes input data, defining the matrix A and vector b, in accordance with an outer loop of an iterative refinement method to generate said data defining the solution vector x. An inner solver processes data items in accordance with an inner loop of the iterative refinement method. The inner solver is configured to process said data items having variable bit-width and data format. A precision controller determines the bit-widths and data formats of the data items adaptively in dependence on the results of the processing steps of the iterative refinement method; the precision controller configured to control operation of the inner solver for processing said data items with the bit-widths and data formats. | 08-20-2015 |
20150293882 | CONJUGATE GRADIENT SOLVERS FOR LINEAR SYSTEMS - A conjugate gradient solver apparatus is provided for generating data defining a solution vector x for a linear system represented by Ax=b where A is a predetermined matrix and b is a predetermined vector. The apparatus includes solver circuitry and a precision controller. The solver circuitry processes input data, defining said matrix A and vector b, in accordance with an iterative conjugate gradient method to generate said data defining the solution vector x. The solver circuitry is adapted to process data items, corresponding to vectors used in said conjugate gradient method, having a variable fixed-point data format. The precision controller determines the fixed-point data formats of respective said data items adaptively during progress of the conjugate gradient method in the solver circuitry. | 10-15-2015 |