Patent application number | Description | Published |
20080238582 | Flexible Capacitive Coupler Assembly And Method Of Manufacture - A flexible capacitive coupler assembly includes a flexible dielectric substrate assembly having a front surface and a rear surface, the front surface having thereon a macroscopic metal capacitive pad. A package supports the flexible dielectric substrate. An electrical connection is made to package wiring or leads on the flexible dielectric substrate to establish electrical contact with a computer subsystem. | 10-02-2008 |
20080272177 | CONDUCTIVE BONDING MATERIAL FILL TECHNIQUES - A system provides solder into cavities in a circuit supporting substrate. The system places a fill head in substantial contact with a circuit supporting substrate. The circuit supporting substrate includes at least one cavity. A linear motion or a rotational motion is provided to at least one of the circuit supporting substrate and the fill head while the fill head is in substantial contact with the circuit supporting substrate. Solder is forced out of the fill head toward the circuit supporting substrate. The solder is provided into the at least one cavity contemporaneous with the at least one cavity being in proximity to the fill head. The system brings a second circuit supporting substrate in close proximity to the circuit supporting substrate, at least one receiving pad on the second circuit supporting substrate substantially contacts the conductive bonding material of the at least one cavity. | 11-06-2008 |
20080302502 | FILL HEAD FOR INJECTION MOLDING OF SOLDER - A system, method, and apparatus for injection molding conductive bonding material into a plurality of cavities in a surface are disclosed. The method comprises aligning a fill head with a surface. The mold includes a plurality of cavities. The method further includes placing the fill head in substantial contact with the surface. At least a first gas is channeled about a first region of the fill head. The at least first gas has a temperature above a melting point of conductive bonding material residing in a reservoir thereby maintaining the conductive bonding material in a molten state. The conductive bonding material is forced out of the fill head toward the surface. The conductive bonding material is provided into at least one cavity of the plurality of cavities contemporaneous with the at least one cavity being in proximity to the fill head. | 12-11-2008 |
20080315409 | DIRECT EDGE CONNECTION FOR MULTI-CHIP INTEGRATED CIRCUITS - The present invention allows for direct chip-to-chip connections using the shortest possible signal path. | 12-25-2008 |
20090008057 | ROTATIONAL FILL TECHNIQUES FOR INJECTION MOLDING OF SOLDER - A system and method for injection molding conductive bonding material into a plurality of cavities in a non-rectangular mold is disclosed. The method comprises aligning a fill head with a non-rectangular mold. The non-rectangular mold includes a plurality of cavities. The fill head is placed in substantial contact with the non-rectangular mold. Rotational motion is provided to at least one of the non-rectangular mold and the fill head while the fill head is in substantial contact with the non-rectangular mold. Conductive bonding material is forced out of the fill head toward the non-rectangular mold. The conductive bonding material is provided into at least one cavity of the plurality of cavities contemporaneous with the at least one cavity being in proximity to the fill head. | 01-08-2009 |
20090112834 | METHODS AND SYSTEMS INVOLVING TEXT ANALYSIS - An exemplary method for determining emotive tone in text, the method comprising, matching text in a text file with text entries in a control file database, wherein the formatting attributes include textual and non-textual indicators, receiving a first set of emotive values associated with the matching text entries from the control file database, calculating an emotive score with the first set of emotive values, assigning the emotive score to the text file, and displaying the emotive score of the text file. | 04-30-2009 |
20090266480 | Process for Preparing a Solder Stand-Off - The present invention relates to an injection molding of solder (IMS) process for preparing heterogenous solder bumps that contain a stand-off feature. | 10-29-2009 |
20090298292 | PROCESSING FOR OVERCOMING EXTREME TOPOGRAPHY - A process for overcoming extreme topographies by first planarizing a cavity in a semiconductor substrate in order to create a planar surface for subsequent lithography processing. As a result of the planarizing process for extreme topographies, subsequent lithography processing is enabled including the deposition of features in close proximity to extreme topographic surfaces (e.g., deep cavities or channels) and, including the deposition of features within a cavity. In a first embodiment, the process for planarizing a cavity in a semiconductor substrate includes the application of dry film resists having high chemical resistance. In a second embodiment, the process for planarizing a cavity includes the filling of cavity using materials such as polymers, spin on glasses, and metallurgy. | 12-03-2009 |
20100001045 | SOLDER STANDOFFS FOR INJECTION MOLDING OF SOLDER - A method of producing standoffs in an injection molded solder (IMS) mold, which possesses cavities, each of which is filled with a solder paste using standard techniques, such as screening or IMS. This solder paste is heated to a reflow temperature at which the solder melts and forms a ball or sphere. Since solder pastes are known to reduce in volume due to the therein contained organic material burning off, the remaining solder ball will be significantly lower in volume than that of the cavity. A solder material having a lower melting point is then filled into the cavities about the solder balls. The mold and solder metal are then allowed to cool, resulting in the formation of a solid sphere of metal in the cavity surrounded by solder material of a lower melting point, which, upon transfer to a wafer, form the standoffs. | 01-07-2010 |
20100038126 | INTERPOSER STRUCTURES AND METHODS OF MANUFACTURING THE SAME - Flexible and rigid interposers for use in the semiconductor industry and methods for manufacturing the same are described. Auto-catalytic processes are used to minimize the costs associated with the production of flexible interposers, while increasing the yield and lifetime. Electrical contact regions are easily isolated and the risk of corrosion is reduced because all portions of the interposer are plated at once. Leads projecting from the flexible portion of the interposers accommodate a greater variety of components to be tested. Rigid interposers include a pin projecting from a probe pad affixed to a substrate. The rigidity of the pin penetrates oxides on a contact pad to be tested. Readily available semiconductor materials and processes are used to manufacture the flexible and rigid interposers according to the invention. The flexible and rigid interposers can accommodate pitches down to 25 μm. | 02-18-2010 |
20110130005 | PROCESSING FOR OVERCOMING EXTREME TOPOGRAPHY - A process for overcoming extreme topographies by first planarizing a cavity in a semiconductor substrate in order to create a planar surface for subsequent lithography processing. As a result of the planarizing process for extreme topographies, subsequent lithography processing is enabled including the deposition of features in close proximity to extreme topographic surfaces (e.g., deep cavities or channels) and, including the deposition of features within a cavity. In a first embodiment, the process for planarizing a cavity in a semiconductor substrate includes the application of dry film resists having high chemical resistance. In a second embodiment, the process for planarizing a cavity includes the filling of cavity using materials such as polymers, spin on glasses, and metallurgy. | 06-02-2011 |
20120187577 | Direct Edge Connection for Multi-Chip Integrated Circuits - The present invention allows for direct chip-to-chip connections using the shortest possible signal path. | 07-26-2012 |
20130342234 | PROBE-ON-SUBSTRATE - Probes are directly patterned on a test substrate, thereby eliminating a need for an interposer. Probe contact structures are formed as a two-level structure having a greater lateral dimension for a lower level portion than for an upper level portion. First cavities are formed in a masking layer applied to a test substrate, filling the cavities with a conductive material, and planarizing the top surfaces of the conductive material portions to form lower level portions. Another masking layer is applied over the lower level portions and patterned to define second cavities having a smaller lateral dimension that the lower level portions. The second cavities are filled with at least one conductive material to form upper level portions of the probe contact structures. The upper level portion of each probe contact structure can be employed to penetrate a surface oxide of solder balls. | 12-26-2013 |
20130344694 | PROBE-ON-SUBSTRATE - Probes are directly patterned on a test substrate, thereby eliminating a need for an interposer. Probe contact structures are formed as a two-level structure having a greater lateral dimension for a lower level portion than for an upper level portion. First cavities are formed in a masking layer applied to a test substrate, filling the cavities with a conductive material, and planarizing the top surfaces of the conductive material portions to form lower level portions. Another masking layer is applied over the lower level portions and patterned to define second cavities having a smaller lateral dimension that the lower level portions. The second cavities are filled with at least one conductive material to form upper level portions of the probe contact structures. The upper level portion of each probe contact structure can be employed to penetrate a surface oxide of solder balls. | 12-26-2013 |
20140141618 | PROCESSING FOR OVERCOMING EXTREME TOPOGRAPHY - A process for overcoming extreme topographies by first planarizing a cavity in a semiconductor substrate in order to create a planar surface for subsequent lithography processing. As a result of the planarizing process for extreme topographies, subsequent lithography processing is enabled including the deposition of features in close proximity to extreme topographic surfaces (e.g., deep cavities or channels) and, including the deposition of features within a cavity. In a first embodiment, the process for planarizing a cavity in a semiconductor substrate includes the application of dry film resists having high chemical resistance. In a second embodiment, the process for planarizing a cavity includes the filling of cavity using materials such as polymers, spin on glasses, and metallurgy. | 05-22-2014 |
20140280027 | FLOW-DIRECTED COLLABORATIVE COMMUNICATION - Resolving a query received from a first node in a network includes accepting, by a second node in the network, ownership of the query from the first node, receiving, at the second node, an identification of a third node in the network, wherein the identification is received from a user of the second node and the user of the second node believes that a user of the third node has information necessary to resolve at least part of the query, and transferring, by the second node, ownership of the at least part of the query to the third node, wherein the accepting, the receiving, and the transferring dynamically generates a data structure that traces a propagation of the query, and the data structure is accessible to an origin of the query. | 09-18-2014 |
20140280449 | FLOW-DIRECTED COLLABORATIVE COMMUNICATION - A method for resolving a query received from a first node in a network includes accepting, by a second node in the network, ownership of the query from the first node, receiving, at the second node, an identification of a third node in the network, wherein the identification is received from a user of the second node and the user of the second node believes that a user of the third node has information necessary to resolve at least part of the query, and transferring, by the second node, ownership of the at least part of the query to the third node, wherein the accepting, the receiving, and the transferring dynamically generates a data structure that traces a propagation of the query, and the data structure is accessible to an origin of the query. | 09-18-2014 |
20150024549 | ALIGNMENT OF INTEGRATED CIRCUIT CHIP STACK - The present disclosure relates to methods and devices for manufacturing a three-dimensional chip package. A method includes forming a linear groove on an alignment rail, attaching an alignment rod to the linear groove, forming alignment channels on a plurality of integrated circuit chips, and aligning the plurality of integrated circuit chips by stacking the plurality of integrated circuit chips along the alignment rail. Another method includes forming an alignment ridge on an alignment rail, forming alignment channels on a plurality of integrated circuit chips, and aligning the plurality of integrated circuit chips by stacking the plurality of integrated circuit chips along the alignment rail. | 01-22-2015 |