Patent application number | Description | Published |
20110115268 | ADJUSTING DEVICE FOR A LUMBAR SUPPORT AND METHOD OF ADJUSTING A LUMBAR SUPPORT - An adjusting device for a lumbar support comprises a pair of spaced guide members, an adjusting member coupled to the pair of guide members, and a drive mechanism for effecting an adjustment of the lumbar support. The adjusting member is displaceable along the pair of guide members and configured such that the lumbar support is adjusted when the adjusting member is displaced. The drive mechanism comprises a motor, which is provided on the adjusting member so as to be displaceable along the guide members jointly with the adjusting member. The motor may be coupled to a shaft having a structured exterior surface, the drive mechanism being configured to effect a relative displacement between the adjusting member and the shaft. | 05-19-2011 |
20130154326 | ADJUSTING DEVICE FOR A LUMBAR SUPPORT AND METHOD OF ADJUSTING A LUMBAR SUPPORT - An adjusting device for a lumbar support comprises a pair of spaced guide members, an adjusting member coupled to the pair of guide members, and a drive mechanism for effecting an adjustment of the lumbar support. The adjusting member is displaceable along the pair of guide members and configured such that the lumbar support is adjusted when the adjusting member is displaced. The drive mechanism comprises a motor, which is provided on the adjusting member so as to be displaceable along the guide members jointly with the adjusting member. The motor may be coupled to a shaft having a structured exterior surface, the drive mechanism being configured to effect a relative displacement between the adjusting member and the shaft. | 06-20-2013 |
20130341982 | ADJUSTING DEVICE FOR A LUMBAR SUPPORT AND METHOD OF ADJUSTING A LUMBAR SUPPORT - An adjusting device for a lumbar support includes a pair of spaced guide members. A first adjusting member is coupled to the pair of guide members and displaceable along the pair of guide members and configured such that the lumbar support is adjusted when the first adjusting member is displaced. A second adjusting member is displaceable along the pair of guide members. A drive mechanism for effecting an adjustment of the lumbar support includes a motor provided on the first adjusting member so as to be displaceable along the guide members jointly with the first adjusting member. | 12-26-2013 |
Patent application number | Description | Published |
20090004426 | Suppression of Oxygen Precipitation in Heavily Doped Single Crystal Silicon Substrates - This invention generally relates to a process for suppressing oxygen precipitation in epitaxial silicon wafers having a heavily doped silicon substrate and a lightly N-doped silicon epitaxial layer by dissolving existing oxygen clusters and precipitates within the substrate. Furthermore, the formation of oxygen precipitates is prevented upon subsequent oxygen precipitation heat treatment. | 01-01-2009 |
20090004458 | Diffusion Control in Heavily Doped Substrates - This invention generally relates to a process for suppressing silicon self-interstitial diffusion near the substrate/epitaxial layer interface of an epitaxial silicon wafer having a heavily doped silicon substrate and a lightly doped silicon epitaxial layer. Interstitial diffusion into the epitaxial layer is suppressed by a silicon self-interstitial sink layer comprising dislocation loops. | 01-01-2009 |
20090022930 | SINGLE CRYSTAL SILICON HAVING IMPROVED GATE OXIDE INTEGRITY - A process for producing a single crystal silicon wafer comprising a front surface, a back surface, a lateral surface joining the front and back surfaces, a central+ axis perpendicular to the front and back surfaces, and a segment which is axially symmetric about the central axis extending substantially from the front surface to the back surface in which crystal lattice vacancies are the predominant intrinsic point defect, the segment having a radial width of at least about 25% of the radius and containing agglomerated vacancy defects and a residual concentration of crystal lattice vacancies wherein (i) the agglomerated vacancy defects have a radius of less than about 70 nm and (ii) the residual concentration of crystal lattice vacancy intrinsic point defects is less than the threshold concentration at which uncontrolled oxygen precipitation occurs upon subjecting the wafer to an oxygen precipitation heat treatment. | 01-22-2009 |
20090130824 | ARSENIC AND PHOSPHORUS DOPED SILICON WAFER SUBSTRATES HAVING INTRINSIC GETTERING - A process for the preparation of low resistivity arsenic or phosphorous doped (N+/N++) silicon wafers which, during the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, reliably form oxygen precipitates. | 05-21-2009 |
20090252974 | EPITAXIAL WAFER HAVING A HEAVILY DOPED SUBSTRATE AND PROCESS FOR THE PREPARATION THEREOF - This invention generally relates to a process for suppressing silicon self-interstitial diffusion near the substrate/epitaxial layer interface of an epitaxial silicon wafer having a heavily doped silicon substrate and a lightly doped silicon epitaxial layer. Interstitial diffusion into the epitaxial layer is suppressed by a silicon self-interstitial sink layer comprising dislocation loops. | 10-08-2009 |
20110177682 | SUPPRESSION OF OXYGEN PRECIPITATION IN HEAVILY DOPED SINGLE CRYSTAL SILICON SUBSTRATES - This invention generally relates to a process for suppressing oxygen precipitation in epitaxial silicon wafers having a heavily doped silicon substrate and a lightly N-doped silicon epitaxial layer by dissolving existing oxygen clusters and precipitates within the substrate. Furthermore, the formation of oxygen precipitates is prevented upon subsequent oxygen precipitation heat treatment. | 07-21-2011 |
20110250739 | EPITAXIAL WAFER HAVING A HEAVILY DOPED SUBSTRATE AND PROCESS FOR THE PREPARATION THEREOF - This invention generally relates to a process for suppressing silicon self-interstitial diffusion near the substrate/epitaxial layer interface of an epitaxial silicon wafer having a heavily doped silicon substrate and a lightly doped silicon epitaxial layer. Interstitial diffusion into the epitaxial layer is suppressed by a silicon self-interstitial sink layer comprising dislocation loops. | 10-13-2011 |
20130102129 | PROCESSES FOR SUPPRESSING MINORITY CARRIER LIFETIME DEGRADATION IN SILICON WAFERS - Processes for suppressing minority carrier lifetime degradation in silicon wafers are disclosed. The processes involve quench cooling the wafers to increase the density of nano-precipitates in the silicon wafers and the rate at which interstitial atoms are consumed by the nano-precipitates. | 04-25-2013 |
20140141537 | PRODUCTION OF HIGH PRECIPITATE DENSITY WAFERS BY ACTIVATION OF INACTIVE OXYGEN PRECIPITATE NUCLEI - Processes for the treatment of silicon wafers to form a high density non-uniform distribution of oxygen precipitate nuclei therein such that, upon being subjected to the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, the wafers form oxygen precipitates in the bulk and a precipitate-free zone near the surface are disclosed. The processes involve activation of inactive oxygen precipitate nuclei by performing heat treatments between about 400° C. and about 600° C. for at least about 1 hour. | 05-22-2014 |
20140182788 | Apparatus for Stressing Semiconductor Substrates - Apparatus for use in preparing heterostructures having a reduced concentration of defects including apparatus for stressing semiconductor substrates to allow them to conform to a crystal having a different crystal lattice constant. | 07-03-2014 |
20140187022 | Processes and Apparatus for Preparing Heterostructures with Reduced Strain by Radial Distension - Apparatus and processes for preparing heterostructures with reduced strain are disclosed. The heterostructures may include a semiconductor structure that conforms to a surface layer having a different crystal lattice constant than the structure to form a relatively low-defect heterostructure. | 07-03-2014 |
20140187023 | Processes and Apparatus for Preparing Heterostructures with Reduced Strain by Radial Compression - Apparatus and processes for preparing heterostructures with reduced strain are disclosed. The heterostructures may include a semiconductor structure that conforms to a surface layer having a different crystal lattice constant than the structure to form a relatively low-defect heterostructure. | 07-03-2014 |
20140361408 | OXYGEN PRECIPITATION IN HEAVILY DOPED SILICON WAFERS SLICED FROM INGOTS GROWN BY THE CZOCHRALSKI METHOD - A method for controlling oxygen precipitation in a single crystal silicon wafer having a wafer resistivity of less than about 10 milliohm-cm is provided so that the wafer has uniformly high oxygen precipitation behavior from the central axis to the circumferential edge. The single crystal silicon wafer comprises an additional dopant selected from among carbon, arsenic, and antimony. | 12-11-2014 |
20150123248 | SILICON WAFERS WITH SUPPRESSED MINORITY CARRIER LIFETIME DEGRADATION - Processes for suppressing minority carrier lifetime degradation in silicon wafers are disclosed. The processes involve quench cooling the wafers to increase the density of nano-precipitates in the silicon wafers and the rate at which interstitial atoms are consumed by the nano-precipitates. | 05-07-2015 |