Lenoble
Bertrand Lenoble, Silly BE
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20110293677 | Fabric And Fibre Conditioning Additives - A fabric, fibre, hair or skin conditioning additive for use in a liquid cleaning product is encapsulated within a shell comprising a silicon-containing polymer network. | 12-01-2011 |
20110311723 | Silicate Shell Microcapsules For Treating Textiles - Compositions containing suspended silicate shell microcapsules of a silicone textile treatment are disclosed. These compositions are particularly useful as textile treatments to impart hydrophobicity, softness, and flame retardant properties. | 12-22-2011 |
20120021023 | Process For Preparing Silicate Shell Microcapsules - A process for preparing silicate shell microcapsules comprises adding a water reactive silicon compound to an oil in water emulsion, thereby condensing and polymerizing the water reactive silicon compound to form silicate shell microcapsules having a core comprising the oil phase of the said emulsion. The water reactive silicon compound comprises a tetraalkoxysilane and an alkoxysilane having an amino or quaternary ammonium substituted alkyl group. | 01-26-2012 |
Bertrand Louis Julien Lenoble, Silly BE
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20110076409 | Coating Compositions - The invention relates to coatings for leather. In particular it relates to top coats for leather. It provides a leather coating composition comprising an organic synthetic resin in aqueous dispersion and an organopolysiloxane, characterized in that the organopolysiloxane is present in aqueous emulsion and comprises a silicone resin having an empirical formula: (I) where •R is a monovalent organic group having 1-30 carbon atoms, •Z is hydrogen or an alkyl group having 1-4 carbon atoms, •x has a value from 0.75 to 1.7, and •y has a value from 0.1 to 2.0, and having a viscosity of from 1 to 4000 mPa·s at 25° C. We have found that the use of a silicone resin according to the invention greatly increases the abrasion resistance, as measured by the Taber method, of leather coated with the coating composition. | 03-31-2011 |
Damien Lenoble, Grenoble FR
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20100167488 | INTEGRATED CIRCUIT COMPRISING A GRADUALLY DOPED BIPOLAR TRANSISTOR AND CORRESPONDING FABRICATION PROCESS - An integrated circuit includes a bipolar transistor comprising a substrate and a collector formed in the substrate. The collector includes a highly doped lateral zone, a very lightly doped central zone and a lightly doped intermediate zone located between the central zone and the lateral zone | 07-01-2010 |
Damien Lenoble, Eprave BE
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20120202299 | ILLUMINATION DETECTION SYSTEM AND METHOD - An optical analysis apparatus and method in which a detector provides two different signals, based on responses to incident light absorbed within the detector over different depths. These signals are processed to discriminate between incident light of two different frequencies and thereby determine the intensity of the light of one desired frequency. | 08-09-2012 |
20120247707 | ACTIVE THERMAL MANAGEMENT DEVICE AND THERMAL MANAGEMENT METHOD - An active thermal management device and method, in which a phase change material unit, comprising at least one phase change material arranged in series or parallel, is connectable to a source of thermal energy, such as LEDs at a first operating condition. Thermal energy from the source of thermal energy is stored in the phase change material unit. The phase change material unit is connectable to a sink of thermal energy, such as second LEDs at a second operating condition. The thermal energy stored in the phase change material unit may be re-used. The first operating condition can include a 15V supply voltage, and the second operating condition can include either no supply voltage, or a lower 9V supply voltage of 9V, such that heat from the first LEDs, which may be over-temperature, can pre-heat the second LEDs, improving thermal and optical matching. | 10-04-2012 |
Damien Lenoble, Crolles FR
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20090001463 | FINFET FIELD EFFECT TRANSISTOR INSULTATED FROM THE SUBSTRATE - A finFET field effect transistor is produced by the formation of an electrical junction between the thin fin portion of semiconductor material which forms the channel of the transistor and the circuit substrate. Doping particles are implanted in the substrate through a mask which is then subsequently used to form the thin fin portion of the channel. The channel of the finFET transistor is thus electrically insulated from the circuit substrate in the same manner as in MOS integrated circuits realized from bulk silicon substrates. | 01-01-2009 |
20100276693 | FINFET FIELD EFFECT TRANSISTOR INSULATED FROM THE SUBSTRATE - A finFET field effect transistor is produced by the formation of an electrical junction between the thin fin portion of semiconductor material which forms the channel of the transistor and the circuit substrate. Doping particles are implanted in the substrate through a mask which is then subsequently used to form the thin fin portion of the channel. The channel of the finFET transistor is thus electrically insulated from the circuit substrate in the same manner as in MOS integrated circuits realized from bulk silicon substrates. | 11-04-2010 |
Damien Lenoble, Gieres FR
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20100025773 | PROCESS FOR PRODUCING A CONTACT PAD ON A REGION OF AN INTEGRATED CIRCUIT, IN PARTICULAR ON THE ELECTRODES OF A TRANSISTOR - A region is locally modified so as to create a zone that extends as far as at least part of the surface of the region and is formed from a material that can be removed selectively with respect to the material of the region. The region is then covered with an insulating material. An orifice is formed in the insulating material emerging at the surface of the zone. The selectively removable material is removed from the zone through the orifice so as to form a cavity in place of the zone. The cavity and the orifice are then filled with at least one electrically conducting material so as to form a contact pad. | 02-04-2010 |
Damien Lenoble, Ixelles BE
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20090020786 | SEMICONDUCTOR DEVICE - A method for forming a semiconductor device on a substrate having a first major surface lying in a plane and the semiconductor device are disclosed. In one aspect, the method comprises, after patterning the substrate to form at least one structure extending from the substrate in a direction substantially perpendicular to a major surface of the substrate, forming locally modified regions at locations in the substrate not covered by the structure, thus locally increasing etching resistance of these regions. Forming locally modified regions may prevent under-etching of the structure during further process steps in the formation of the semiconductor device. | 01-22-2009 |
20090184358 | METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE AND THE SEMICONDUCTOR DEVICE MADE THEREOF - A method for fabricating a semiconductor device and the device made thereof are disclosed. In one aspect, the method includes providing a substrate comprising a semiconductor material. The method further includes patterning at least one fin in the substrate, the fin comprising a top surface, at least one sidewall surface, and at least one corner. A supersaturation of point defects is created in the at least one fin. The at least one fin is annealed and then cooled down such that semiconductor atoms of the semiconductor material migrate via the point defects. | 07-23-2009 |
Ferdinand Lenoble, Berlin DE
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20120059245 | METHOD AND DEVICE FOR MONITORING AND IMPROVING ARTERIOGENESIS - A method for determining an arteriovascular condition of a subject having an arterial blood flow is shown. The method involves determining a temporal progression of an instantaneous blood flow condition of the arterial blood flow as well as deriving a slew rate of the temporal progression during an increase of the temporal progression. In addition, an arteriovascular condition indicator device is shown, which comprises: an input for receiving an input signal representing an instantaneous arterial blood flow condition of a subject and a slew rate monitor connected to the input. A corresponding control device for providing an activation signal is also shown. The control device comprises a maximum detector connected to the slew rate monitor. A method for stimulation of arteriogenesis is also shown, wherein a temporal progression of an instantaneous blood flow condition is monitored, a slew rate of the temporal progression is derived, and the maximum of the slew rate is determined. An external pressure is applied repeatedly to the arteriovascular section in synchronization with the occurrence of the determined maximum. | 03-08-2012 |
20130136717 | THERAPEUTIC USE OF AGONISTS OR ANTAGONISTS OF BRADYKININ RECEPTOR 1 OR 2, FOR MODULATION COLLATERAL BLOOD VESSEL GROWTH - The present invention relates to bradykinin receptor modulators and pharmaceutical compositions thereof for use as a medicament for modulating collateral blood vessel growth of collateral arteries and/or other blood vessels of pre-existing arterial networks. The bradykinin receptor modulators of arteriogenesis are applicable in the treatment and/or prevention of disorders associated with defective blood flow or blood vessel malformation. A preferred aspect of the invention relates to bradykinin receptor agonists for use as a medicament for the prevention of cardiovascular ischemic disease in a patient at risk thereof. Further, the invention relates to a bradykinin receptor agonist for use in a method for treating a cardiovascular ischemic disease in a patient in need thereof, wherein said cardiovascular ischemic disease is a peripheral limb disease. | 05-30-2013 |
Mathieu Lenoble, Nisshin-City JP
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20110029281 | Link travel time calculation device and method for calculating link travel time interval - A link travel time calculation device includes: a collection element for collecting a travel position and a transit time in each vehicle; and a link travel time calculation element. The calculation element calculates a total travel time interval of all sections based on the travel position and the transit time in a predetermined time period. The calculation element calculates a first travel time interval of an upstream section and a second travel time interval of a downstream section based on the travel position and the transit time. The calculation element calculates a travel time interval of the object link with respect to the predetermined time period by subtracting a sum of the first travel time interval and the second travel time interval from the total travel time interval. | 02-03-2011 |
Michel Lenoble, Bourges FR
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20100236392 | PERCUSSION DEVICE FOR A MEDIUM OR LARGE CALIBRE WEAPON - A percussion device for a medium or large caliber weapon incorporating a firing pin, spring means and a drive cam for the firing pin enabling its displacement in translation up to an “armed” position and the compression of the spring means, such device wherein it incorporates means to immobilize the firing in the “armed” position, these means being supported by the weapon breech and able to take up a position in which they immobilize the firing pin and another in which they release the firing pin. | 09-23-2010 |
Philippe Lenoble, Grasse FR
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20100115478 | METHODS, SYSTEMS, AND COMPUTER PROGRAM PRODCUT FOR PARALLELIZING TASKS IN PROCESSING AN ELECTRONIC CIRCUIT DESIGN - Disclosed are a method, a system, and a computer program product for implementing compact manufacturing model during various stages of electronic circuit designs. In some embodiments, the method loads the full design database information on the master; distributes the tasks to be processed in parallel; loads a full design on a master; spawns a plurality of slave sessions; sends to at least one slave a nutshell representation of the electronic circuit design; identifies a task to perform in parallel and sends the task to be performed in parallel; and receives execution results or processing results from some of the plurality of slaves and updates one or more databases to incorporate the execution or processing results. In some embodiments, the method allows speeding up the applications without major rewrite without a need for design partition, and without memory penalty. | 05-06-2010 |
20120089954 | METHODS, SYSTEMS, AND COMPUTER PROGRAM PRODUCT FOR PARALLELIZING TASKS IN PROCESSING AN ELECTRONIC CIRCUIT DESIGN - Disclosed are a method, a system, and a computer program product for implementing compact manufacturing model during various stages of electronic circuit designs. In some embodiments, the method loads the full design database information on the master; distributes the tasks to be processed in parallel; loads a full design on a master; spawns a plurality of slave sessions; sends to at least one slave a nutshell representation of the electronic circuit design; identifies a task to perform in parallel and sends the task to be performed in parallel; and receives execution results or processing results from some of the plurality of slaves and updates one or more databases to incorporate the execution or processing results. In some embodiments, the method allows speeding up the applications without major rewrite without a need for design partition, and without memory penalty. | 04-12-2012 |