Patent application number | Description | Published |
20090003082 | Method of making memory cell with voltage modulated sidewall poly resistor - A method of making a two terminal nonvolatile memory cell includes forming a first electrode, forming a charge storage medium, forming a resistive element, and forming a second electrode. The charge storage medium and the resistive element are connected in parallel between the first and the second electrodes, and a presence or absence of charge being stored in the charge storage medium affects a resistivity of the resistive element. | 01-01-2009 |
20090003083 | Memory cell with voltage modulated sidewall poly resistor - A two terminal nonvolatile memory cell includes a first electrode, a second electrode, a charge storage medium, and a resistive element. The charge storage medium and the resistive element are connected in parallel between the first and the second electrodes. A presence or absence of charge being stored in the charge storage medium affects a resistivity of the resistive element. | 01-01-2009 |
20110062563 | NON-VOLATILE MEMORY WITH REDUCED MOBILE ION DIFFUSION - Mobile ion diffusion causes a shift in the threshold voltage of non-volatile storage elements in a memory chip, such as during an assembly process of the memory chip. To reduce or avoid such shifts, a coating can be applied to a printed circuit board substrate or a leader frame to which the memory chip is surface mounted. An acrylic resin coating having a thickness of about 10 μm may be used. A memory chip is attached to the coating using an adhesive film. Stacked chips may be used as well. Another approach provides metal barrier traces over copper traces of the printed circuit board, within a solder mask layer. The metal barrier traces are fabricated in the same pattern as the copper traces but are wider so that they at least partially envelop and surround the copper traces. Corresponding apparatuses and fabrication processes are provided. | 03-17-2011 |
20110075482 | MAINTAINING INTEGRITY OF PRELOADED CONTENT IN NON-VOLATILE MEMORY DURING SURFACE MOUNTING - A non-volatile memory chip package is prepared for surface mounting to a substrate in a solder reflow process by programming erased blocks to higher threshold voltage levels, to improve data retention for blocks which are preloaded with content, such as by an electronic device manufacturer. Following the surface mounting, the previously-erased blocks are returned to the erased state. The threshold voltage of storage elements of the preloaded blocks can change during the surface mounting process due to a global charge effect phenomenon. The effect is most prominent for higher state storage elements which are surrounded by erased blocks, in a chip for which the wafer backside was thinned and polished. The erased blocks can be programmed using a single program pulse without performing a verify operation, as a wide threshold voltage distribution is acceptable. | 03-31-2011 |
Patent application number | Description | Published |
20090140299 | MEMORY WITH HIGH DIELECTRIC CONSTANT ANTIFUSES ADAPTED FOR USE AT LOW VOLTAGE - A memory array having memory cells comprising a diode and an antifuse can be made smaller and programmed at lower voltage by using an antifuse material having a higher dielectric constant and a higher acceleration factor than those of silicon dioxide, and by using a diode having a lower band gap than that of silicon. Such memory arrays can be made to have long operating lifetimes by using the high acceleration factor and lower band gap materials. Antifuse materials having dielectric constants between 5 and 27, for example, hafnium silicon oxynitride or hafnium silicon oxide, are particularly effective. Diode materials with band gaps lower than that of silicon, such as germanium or a silicon-germanium alloy, are particularly effective. | 06-04-2009 |
20090141535 | METHODS INVOLVING MEMORY WITH HIGH DIELECTRIC CONSTANT ANTIFUSES ADAPTED FOR USE AT LOW VOLTAGE - Methods involve using a memory array having memory cells comprising a diode and an antifuse, in which the antifuse is made smaller and programmed at lower voltage by using an antifuse material having a higher dielectric constant and a higher acceleration factor than those of silicon dioxide, and in which the diode is made of a material having a lower band gap than that of silicon. Such memory arrays can be made to have long operating lifetimes by using the high acceleration factor and lower band gap materials. Antifuse materials having dielectric constants between 5 and 27, for example, hafnium silicon oxynitride or hafnium silicon oxide, are particularly effective. Diode materials with band gaps lower than that of silicon, such as germanium or a silicon-germanium alloy, are particularly effective. | 06-04-2009 |
20100276660 | MEMORY WITH HIGH DIELECTRIC CONSTANT ANTIFUSES ADAPTED FOR USE AT LOW VOLTAGE - A memory cell is provided that includes a diode and a resistance-switching material layer coupled in series with the diode. The resistance-switching material layer: (a) has a dielectric constant in the range of about 5 to about 27, and (b) includes a material from the family consisting of X | 11-04-2010 |
20130119338 | RESISTANCE-SWITCHING MEMORY CELLS ADAPTED FOR USE AT LOW VOLTAGE - A memory cell is provided that includes a diode and a resistance-switching material layer coupled in series with the diode. The resistance-switching material layer: (a) includes a material from the family consisting of XvOw, wherein X represents an element from the family consisting of Hf and Zr, and wherein the subscripts v and w have non-zero values that form a stable compound, and (b) has a thickness between 20 and 65 angstroms. Other aspects are also provided. | 05-16-2013 |
20130314971 | METHODS INVOLVING MEMORY WITH HIGH DIELECTRIC CONSTANT ANTIFUSES ADAPTED FOR USE AT LOW VOLTAGE - Methods involve using a memory array having memory cells comprising a diode and an antifuse, in which the antifuse is made smaller and programmed at lower voltage by using an antifuse material having a higher dielectric constant and a higher acceleration factor than those of silicon dioxide, and in which the diode is made of a material having a lower band gap than that of silicon. Such memory arrays can be made to have long operating lifetimes by using the high acceleration factor and lower band gap materials. Antifuse materials having dielectric constants between 5 and 27, for example, hafnium silicon oxynitride or hafnium silicon oxide, are particularly effective. Diode materials with band gaps lower than that of silicon, such as germanium or a silicon-germanium alloy, are particularly effective. | 11-28-2013 |
20140158974 | RESISTANCE-SWITCHING MEMORY CELLS ADAPTED FOR USE AT LOW VOLTAGE - A memory cell is provided that includes a diode and a resistance-switching material layer coupled in series with the diode. The resistance-switching material layer has a thickness between 20 and 65 angstroms. Other aspects are also provided. | 06-12-2014 |
Patent application number | Description | Published |
20110019197 | Scattered Light Separation - An apparatus for detecting top scattered light from a substrate. A source directs a light onto a position on the substrate. The light thereby reflects off in a specular beam, scatters off the top surface, and scatters off a bottom surface of the substrate. An objective receives the top and bottom scattered light. The objective has a first focal point focused on the position on the top surface of the substrate, and a second focal point focused on a pinhole field stop. The pinhole field stop passes the top scattered light that is focused on the pinhole field stop, and blocks the bottom scattered light. A sensor receives and quantifies the top scattered light. | 01-27-2011 |
20110058174 | Substrate Edge Inspection - An apparatus for inspecting an edge of a substrate. A light source produces a light beam, and a two-dimensional beam deflector receives the light beam and creates a semi-annular scanning beam. A first flared parabolic surface receives the semi-annular scanning beam and directs the semi-annular scanning beam onto the edge of the substrate, thereby creating specularly reflected light from the edge of the substrate. A second flared parabolic surface receives and directs the specularly reflected light to a detector. The detector receives the directed specularly reflected light and produces signals. An analyzer analyzes the signals and detects defects at the edge of the substrate. | 03-10-2011 |
20130308124 | Substrate Inspection - Various embodiments for substrate inspection are provided. | 11-21-2013 |
20140218722 | Optical Inspector - An optical inspector includes a radiating source, a time varying beam reflector, a telecentric scan lens, a first and second lens, a field stop, and a detector. The radiating source irradiates a first position of on the time varying beam reflector with a source beam. The time varying beam reflector directs the source beam to the telecentric scan lens, which in turn directs the source beam to a sample. The first lens focuses scattered radiation from the sample to generate multiple scan lines at a first focal plane. The field stop is positioned at the first focal plane to block one or more scan lines at the first focal plane. The scan line not blocked by the field stop propagates to the second lens. The second lens de-scans the scan line and generates a point of scattered radiation at a second focal plane where the detector input is located. | 08-07-2014 |
20140218724 | Optical Inspector - An optical inspector includes a radiating source, a time varying beam reflector, a telecentric scan lens, a separating minor, and a first and second detector. The radiating source is configured to irradiate a first position on the time varying beam reflector with a source beam. The time varying beam reflector directs the source beam to the telecentric scan lens, which in turn directs the source beam to a sample. The telecentric scan lens directs specular reflection and near specular scattered radiation to the time varying beam reflector. The specular reflection is directed by the separating mirror to the first detector. The near specular scattered radiation is not reflected by the separating minor and propagates to the second detector. In response, the optical inspector determines the total reflectivity, the surface slope, or the near specular scattered radiation intensity of the sample. | 08-07-2014 |
20140307255 | MULTI-SURFACE SCATTERED RADIATION DIFFERENTIATION - An optical inspector includes a radiating source, a time varying beam reflector, a telecentric scan lens, a first and second waveplate, a polarizing beam splitter, a first detector, a focusing lens, a blocker, and a second detector. The radiating source irradiates the first waveplate generating circularly polarized source beam that irradiates a first position of on the time varying beam reflector with a source beam. The time varying beam reflector directs the source beam to the telecentric scan lens, which in turn directs the source beam to a sample. Reflected radiation from a sample is directed to the second waveplate generating linearly polarized beam that irradiates the polarizing beam splitter which directs a portion of the reflected radiation to the first detector. Scattered radiation from the sample is directed by the focusing lens to the second detector. Contemporaneous measurements by the first and second detectors are compared to differentiate. | 10-16-2014 |