Patent application number | Description | Published |
20090029561 | Semiconductor processing apparatus - There is provided a semiconductor processing apparatus comprising a processing tube for housing a substrate support member that supports a plurality of substrates stacked at a prescribed pitch in a vertical direction; a gas supply part that extends in a direction in which the substrates are stacked in the processing tube and that has a plurality of gas supply openings; an exhaust part that opens onto the processing tube; a gas rectifying plate that is disposed in a space between a penumbra of the substrates supported on the substrate support member and an inner wall of the processing tube, and that extends from the gas supply part in a circumferential direction of the processing tube and in the direction in which the substrates are stacked; and a gas flow regulating part disposed in a space in the processing tube that is above a top-most gas supply opening and a top-most substrate and in a space in the processing tube that is below a bottom-most substrate and a bottom-most gas supply opening. A thin film formed on the substrate can be made more uniform. | 01-29-2009 |
20100035440 | SUBSTRATE PROCESSING APPARATUS AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A substrate processing apparatus includes: a reaction tube configured to process a plurality of substrates; a heater configured to heat the inside of the reaction tube; a holder configured to arrange and hold the plurality of substrates within the reaction tube; a first nozzle disposed in an area corresponding to a substrate arrangement area where the plurality of substrates are arranged, and configured to supply hydrogen-containing gas from a plurality of locations of the area into the reaction tube; a second nozzle disposed in the area corresponding to the substrate arrangement area, and configured to supply oxygen-containing gas from a plurality of locations of the area into the reaction tube; an exhaust outlet configured to exhaust the inside of the reaction tube; and a pressure controller configured to control pressure inside the reaction tube to be lower than atmospheric pressure, wherein the first nozzle is provided with a plurality of first gas ejection holes, and the second nozzle is provided with as many second gas ejection holes as at least the plurality of substrates so that the second gas ejection holes correspond to at least the respective substrates. | 02-11-2010 |
20100282166 | HEAT TREATMENT APPARATUS AND METHOD OF HEAT TREATMENT - Provided is a heat treatment apparatus. The heat treatment apparatus comprises a process chamber configured to grow silicon carbide (SiC) epitaxial films on SiC substrates, a substrate holding tool configured to hold a plurality of substrates in a state where the substrates are vertically arranged and approximately horizontally oriented, so as to hold the substrates in the process chamber, a first reaction gas supply nozzle configured to supply a carbon-containing gas into the process chamber, a second reaction gas supply nozzle configured to supply a silicon-containing gas into the process chamber, a magnetic field generating coil disposed at an outside of the process chamber for electromagnetic induction heating, and a coil supporter configured to support the magnetic field generating coil. An upper end of the second reaction gas supply nozzle is lower than a lower end of the coil supporter configured to support the magnetic field generating coil. | 11-11-2010 |
20110065286 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SUBSTRATE PROCESSING APPARATUS - At a low temperature of 500° C. to 700° C., the concentration of atomic oxygen is controlled in a wafer stacked direction, and the thickness distribution of oxide films is kept uniform in the wafer stacked direction. A semiconductor device manufacturing method includes a process of oxidizing substrates by supplying oxygen-containing gas and hydrogen-containing gas through a mixing part from an end side of a substrate arrangement region where the substrates are arranged inside the process chamber so that the gases flow toward the other end side of the substrate arrangement region, and supplying hydrogen-containing gas from mid-flow locations corresponding to the substrate arrangement region. The oxygen-containing gas and the hydrogen-containing gas reacts with each other in the mixing part to produce an oxidation species containing atomic oxygen, and the oxidation species has a maximum concentration at an ejection hole through which the oxidation species is ejected from the mixing part into the process chamber. | 03-17-2011 |
20110253049 | Semiconductor processing apparatus - There is provided a semiconductor processing apparatus comprising a processing tube for housing a substrate support member that supports a plurality of substrates stacked at a prescribed pitch in a vertical direction; a gas supply part that extends in a direction in which the substrates are stacked in the processing tube and that has a plurality of gas supply openings; an exhaust part that opens onto the processing tube; a gas rectifying plate that is disposed in a space between a penumbra of the substrates supported on the substrate support member and an inner wall of the processing tube, and that extends from the gas supply part in a circumferential direction of the processing tube and in the direction in which the substrates are stacked; and a gas flow regulating part disposed in a space in the processing tube that is above a top-most gas supply opening and a top-most substrate and in a space in the processing tube that is below a bottom-most substrate and a bottom-most gas supply opening. A thin film formed on the substrate can be made more uniform. | 10-20-2011 |
20130157474 | SUBSTRATE PROCESSING APPARATUS, METHOD OF PROCESSING SUBSTRATE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - An oxygen-containing gas and a hydrogen-containing gas are supplied into a pre-reaction chamber heated to a second temperature and having the pressure set to less than an atmospheric pressure, and a reaction is induced between both gases in the pre-reaction chamber to generate reactive species, and the reactive species are supplied into the process chamber and exhausted therefrom, in which a substrate heated to the first temperature is housed and the pressure is set to less than the atmospheric pressure, and processing is applied to the substrate by the reactive species, with the second temperature set to be not less than the first temperature at this time. | 06-20-2013 |
20150270125 | REACTION TUBE, SUBSTRATE PROCESSING APPARATUS, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A structure for constituting a process chamber in which a plurality of substrates is processed by reacting a predetermined precursor gas therein includes an outer tube having a cylindrical shape with an upper end portion closed and a lower end portion opened, and an inner tube, installed within the outer tube, including a first exhaust slit and a second exhaust slit through which the predetermined precursor gas is exhausted, the first exhaust slit located in a substrate arrangement region in which the plurality of substrates are arranged, and the second exhaust slit located in a region lower than the substrate arrangement region. | 09-24-2015 |
Patent application number | Description | Published |
20100275848 | HEAT TREATMENT APPARATUS - Provided is a heat treatment apparatus that can form films having a uniform thickness on a plurality of substrates. The heat treatment apparatus comprises a process chamber configured to grow silicon carbide (SiC) films on wafers, a boat configured to hold a plurality of wafers in a state where the wafers are vertically arranged and approximately horizontally oriented so as to hold the wafers in the process chamber, a heating unit installed in the processing chamber, and a gas supply nozzle configured to supply a reaction gas. The heating unit comprises a susceptor configured to cover at least a part of the boat, and a susceptor wall disposed between the boat and the susceptor. | 11-04-2010 |
20110210118 | SUBSTRATE PROCESSING APPARATUS, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SUBSTRATE - There are provided a substrate processing apparatus and a method of manufacturing a substrate in which induction heating of members made of a metal material and installed outside an induction coil is suppressed and safety may be improved during processing of a substrate. The substrate processing apparatus includes: a reaction tube for accommodating a substrate; an induction heating unit installed to surround an outer circumference of the reaction tube; a shielding unit installed to surround an outside of the induction heating unit; a gas supply unit for supplying at least a source gas into the reaction tube; and a controller for processing the substrate by heating an inside of the reaction tube using the induction heating unit, and supplying at least the source gas from the gas supply unit into the reaction tube. | 09-01-2011 |
20110306212 | SUBSTRATE PROCESSING APPARATUS, SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SUBSTRATE MANUFACTURING METHOD - Embodiments described herein relate to a substrate processing apparatus includes a reaction tube, a processing chamber provided inside the reaction tube to process a substrate therein, an induction target provided inside the reaction tube to surround the processing chamber and configured to heat the substrate, a heat insulator provided inside the reaction tube to surround the induction target, an induction target provided outside the reaction tube to inductively heat at least the induction target, a first gas supply unit for supplying a first gas into the processing chamber, and a second gas supply unit for supplying a second gas to a first gap provided between the induction target and the heat insulator. | 12-15-2011 |
20120156886 | SUBSTRATE PROCESSING APPARATUS, METHOD OF MANUFACTURING SUBSTRATE, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - Production efficiency of a substrate (in particular, a substrate on which a SiC epitaxial film is formed) is improved and formation of the film inside a gas supply port is suppressed. This is accomplished by a substrate processing apparatus including a reaction chamber configured to accommodate a plurality of substrates | 06-21-2012 |
20120220107 | SUBSTRATE PROCESSING APPARATUS, WAFER HOLDER, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - Provided is a substrate processing apparatus having a stack structure of wafers that can endure a high temperature without bad influence on film-forming precision. The stack structure includes a holder base ( | 08-30-2012 |
20120220108 | SUBSTRATE PROCESSING APPARATUS, AND METHOD OF MANUFACTURING SUBSTRATE - When processing such as SiC epitaxial growth is performed at an ultrahigh temperature of 1500° C. to 1700° C., a film-forming gas can be decreased to heat-resistant temperature of a manifold and film quality uniformity can be improved. A substrate processing apparatus includes a reaction chamber for processing a plurality of substrates, a boat for holding the plurality of substrates, a gas supply nozzle for supplying a film-forming gas to the plurality of substrates, an exhaust port for exhausting the film-forming gas supplied into the reaction chamber, a heat exchange part which defines a second flow path narrower than a first flow path defined by an inner wall of the reaction chamber and the boat, and a gas discharge part installed under the lowermost substrate of the plurality of substrates. | 08-30-2012 |
Patent application number | Description | Published |
20130174902 | PHOTOELECTRIC CONVERSION ELEMENT - A photoelectric conversion element comprising: a photoelectric conversion layer; and a plurality of metal nanoparticles arranged in the form of a two-dimensional array on the photoelectric conversion layer on its principal face side that is opposite to its light receiving face, wherein the plurality of metal nanoparticles are arranged with a particle density that is equal to or greater than 5.0×10 | 07-11-2013 |
20130213477 | PHOTOELECTRIC CONVERSION ELEMENT - A photoelectric conversion element is structured such that metallic particles, an isolation layer and a photoelectric conversion layer are held between a first electrode and a second electrode. The isolation layer is a hole transport layer. The photoelectric conversion layer is a bulk heterojunction layer. The metallic nanoparticles are two-dimensionally arranged between the first electrode and the isolation layer and are separated from the photoelectric conversion layer by the isolation layer by 2 nm to 15 nm. | 08-22-2013 |
20140090705 | PHOTOELECTRIC CONVERSION ELEMENT - A photoelectric conversion element comprising: a photoelectric conversion layer; and a light reflection layer including a metal film provided on one of main surface sides of the photoelectric conversion layer, wherein penetration parts penetrating from one main surface of the metal film to the other main surface are provided in a plurality of portions in the metal film. | 04-03-2014 |
20140109965 | PHOTOELECTRIC CONVERSION ELEMENT - A photoelectric conversion element includes a photoelectric conversion layer, an anti-reflection film, a light scattering layer, and a transparent thin layer. The anti-reflection film is provided on a light-receiving surface side of the photoelectric conversion layer. The light scattering layer is made of a plurality of metal nano-particles that are two-dimensionally arranged to be opposite to the light-receiving surface of the photoelectric conversion layer. The transparent thin layer is provided between the photoelectric conversion layer and the light scattering layer. A thickness d | 04-24-2014 |
Patent application number | Description | Published |
20110144279 | EPOXY GROUP-CONTAINING COPOLYMER, EPOXY (METH)ACRYLATE COPOLYMER USING THE SAME AND THEIR PRODUCTION PROCESSES - According to the present invention, a novel epoxy group-containing copolymer, including a production process thereof, and an epoxy (meth)acrylate copolymer starting from the epoxy group-containing copolymer, including a production process thereof are provided. The epoxy group-containing copolymer of the present invention contains a specific epoxy group-containing repeating unit and an olefin-based repeating unit. A novel epoxy (meth)acrylate copolymer of the present invention is produced by reacting the epoxy group-containing copolymer with (meth)acrylic acid. | 06-16-2011 |
20130035461 | FLUORINE AND EPOXY GROUP-CONTAINING COPOLYMER, AND METHOD FOR PRODUCING SAME - Provided is a fluorine- and epoxy group-containing copolymer with excellent workability at room temperature, high water-repellency, and excellent characteristics as a water vapor barrier. Also provided is an efficient method for producing said copolymer. The fluorine and epoxy group-containing copolymer is characterized by containing at least a monomer unit represented by general formula (1): {Therein, R | 02-07-2013 |
20130137795 | EPOXYSILICONE CONDENSATE, CURABLE COMPOSITION COMPRISING CONDENSATE, AND CURED PRODUCT THEREOF - There is provided an epoxy group-containing silicone condensate that yields cured products with excellent transparency, thermal resistance and gas barrier properties. An epoxysilicone condensate which is the product of hydrolytic condensation of an epoxy group-containing alkoxysilane compound represented by formula (1): | 05-30-2013 |
Patent application number | Description | Published |
20100244015 | ORGANIC SEMICONDUCTOR DEVICE, MANUFACTURING METHOD OF SAME, ORGANIC TRANSISTOR ARRAY, AND DISPLAY - A major object of the present invention is to provide an organic semiconductor device which is provided with an organic semiconductor transistor having good transistor performance and is producible with high productivity. To achieve the object, the present invention provides an organic semiconductor device comprising: a substrate; a source electrode and a drain electrode which are formed on the substrate; an insulation partitioned part which is formed on the source electrode and the drain electrode, made of an insulation material, formed such that an opening part of the insulation partitioned part is disposed above a channel region formed by the source electrode and the drain electrode and has a function as an interlayer-insulation layer; an organic semiconductor layer which is formed in the opening part of the insulation partitioned part and on the source electrode and the drain electrode, and made of an organic semiconductor material; a gate insulation layer which is formed on the organic semiconductor layer and made of an insulation resin material; and a gate electrode formed on the gate insulation layer, wherein; the insulation partitioned part has a height ranging from 0.1 μm to 1.5 μm. | 09-30-2010 |
20110053313 | MANUFACTURING METHOD OF ORGANIC SEMICONDUCTOR DEVICE - The present invention provides a manufacturing method of an organic semiconductor device comprising a step of transferring an organic semiconductor layer to a gate insulation layer by a thermal transfer at a liquid crystal phase transition temperature of a liquid crystalline organic semiconductor material, and the step uses: an organic semiconductor layer-transferring substrate comprising a parting substrate having parting properties, and the organic semiconductor layer formed on the parting substrate and containing the liquid crystalline organic semiconductor material; and a substrate for forming an organic semiconductor device comprising a substrate, a gate electrode formed on the substrate, and the gate insulation layer formed to cover the gate electrode and having alignment properties which are capable of aligning the liquid crystalline organic semiconductor material on a surface of the gate insulation layer. | 03-03-2011 |
20120070945 | ORGANIC SEMICONDUCTOR DEVICE, MANUFACTURING METHOD OF SAME, ORGANIC TRANSISTOR ARRAY, AND DISPLAY - This disclosure provides an organic semiconductor device including: a substrate; a source electrode and a drain electrode which are formed on the substrate; an insulation partitioned part which is formed on the source electrode and the drain electrode, formed such that an opening part of the insulation partitioned part is disposed above a channel region formed by the source electrode and the drain electrode; an organic semiconductor layer which is formed in the opening part of the insulation partitioned part and on the source electrode and the drain electrode; a gate insulation layer which is formed on the organic semiconductor layer and made of an insulation resin material; and a gate electrode formed on the gate insulation layer, and the insulation partitioned part has a height ranging from 0.1 μm to 1.5 μm. | 03-22-2012 |
Patent application number | Description | Published |
20090157953 | Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein - A semiconductor device having an electrically erasable and programmable nonvolatile memory, for example, a rewritable nonvolatile memory including memory cells arranged in rows and columns and disposed to facilitate both flash erasure as well as selective erasure of individual units of plural memory cells. The semiconductor device which functions as a microcomputer chip also has a processing unit and includes an input terminal for receiving an operation mode signal for switching the microcomputer between a first operation mode in which the flash memory is rewritten under control of a processing unit and a second operation mode in which the flash memory is rewritten under control of separate writing circuit externally connectable to the microcomputer. | 06-18-2009 |
20090243118 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME - Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device. | 10-01-2009 |
20100295043 | SEMICONDUCTOR DEVICE - A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in a protective film over each bonding pad in such a manner that an overlapping width of the protective film in a wire bonding region of each bonding pad becomes wider than an overlapping width of the protective film in a probe region of each bonding pad. | 11-25-2010 |
20120077310 | Manufacturing Method of Semiconductor Device - Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device. | 03-29-2012 |
20130193438 | SEMICONDUCTOR DEVICE - Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device. | 08-01-2013 |
20140361299 | SEMICONDUCTOR DEVICE - Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device. | 12-11-2014 |
Patent application number | Description | Published |
20130250390 | OPTICAL DEFLECTOR INCLUDING FOUR COUPLING BARS BETWEEN SUPPORT BODY AND FRAME - In an optical deflector including a mirror, a movable ring-shaped frame surrounding the mirror, a pair of torsion bars connected between the mirror and the movable ring-shaped frame and oppositely arranged along a rocking direction of the mirror, a support body surrounding the movable ring-shaped frame, and piezoelectric actuators for rocking the mirror through the torsion bars along the rocking direction, first, second, third and fourth coupling bars are connected between the support body and the movable ring-shaped frame. The first and third coupling bars are oppositely arranged along a first direction obtained by inclining the rocking direction by a first predetermined angle between +30° and +45°, and the second and fourth coupling bars are oppositely arranged along a second direction obtained by inclining the rocking direction by a second predetermined angle between −30° and −60°. | 09-26-2013 |
20140268271 | OPTICAL DEFLECTOR INCLUDING MEANDER-TYPE PIEZOELECTRIC ACTUATORS COUPLED BY CROSSING BARS THEREBETWEEN - In an optical deflector including a mirror, a fixed frame surrounding the mirror, and first and second piezoelectric actuators of a meander-type provided opposite to each other with respect to the mirror, for rocking the mirror around an axis on a plane of the fixed frame, the first piezoelectric actuator includes a plurality of first piezoelectric cantilevers folded at first folded portions and coupled to the fixed frame, and the second piezoelectric actuator includes a plurality of second piezoelectric cantilevers folded at second folded portions and coupled to the fixed frame. The optical deflector further includes at least one first crossing bar coupled between one of the first folded portions and one of the second folded portions symmetrically located with respect to the mirror. | 09-18-2014 |
20140355088 | OPTICAL DEFLECTOR INCLUDING SEPARATED PIEZOELECTRIC PORTIONS ON PIEZOELECTRIC ACTUATORS AND ITS DESIGNING METHOD - In an optical deflector including a mirror, a frame, torsion bars, first and second piezoelectric actuators coupled to both of the torsion bars, and first and second coupling bars, each of the first and second piezoelectric actuators is divided into first, second and third areas in accordance with a polarization polarity distribution obtained by performing a simulation upon the optical deflector where piezoelectric portions with no slits are hypothetically provided in the first and second piezoelectric actuators while a predetermined rocking operation is performed upon the mirror. First piezoelectric portions are formed in the first and third areas of the first piezoelectric actuator, and second piezoelectric portions are formed in the first and third areas of said second piezoelectric actuator. A first drive voltage applied to the first piezoelectric portions is opposite in phase to a second drive voltage applied to the second piezoelectric portions. | 12-04-2014 |
Patent application number | Description | Published |
20080320220 | Storage system, data transfer method, and program - The present invention suggests a storage system capable of realizing highly reliable data back-up. | 12-25-2008 |
20090049262 | EXTERNAL STORAGE AND DATA RECOVERY METHOD FOR EXTERNAL STORAGE AS WELL AS PROGRAM - The data is automatically recovered to a desired arbitrary point in an external storage without imposing a burden on the host computer. An application on a host computer instructs data recovery control processing of a disk control apparatus to set a recovery opportunity. It is possible to register arbitrary plural points as a recoverable point by setting a recovery flag included in journal data. In the case in which data is recovered due to occurrence of a failure or the like, the application requests a list showing recovery opportunities which have already been set. The application designates a point to which data is recovered on the basis of the recovery opportunity list. The disk control apparatus recovers the data to the designated point on the basis of a backup disk and a journal disk. | 02-19-2009 |
20090125675 | Storage apparatus and logical volume migration method - This storage apparatus includes a first logical volume migration unit for migrating the logical volume of a first storage area targeted for power source shutdown to a second storage area that is not targeted for power source shutdown based on an external command, and a second logical volume migration unit for migrating an expiration date-defined logical volume from the second storage area to a third storage area of a post-expiration migration destination when the expiration date of the expiration date-defined logical volume set with an expiration date for migrating the logical volume is reached. The first logical volume migration unit balances and migrates the expiration date-defined logical volume to the second storage area by referring to the expiration date of the expiration date-defined logical volume and taking into consideration the migration timing to the third storage area. | 05-14-2009 |
20110113193 | STORAGE SYSTEM, DATA TRANSFER METHOD, AND PROGRAM - The storage system including a first disk array apparatus for providing first volumes for storing data sent from a host system; a second disk array apparatus for providing second volumes for storing back-up data of the first volumes; and a console terminal for operating the first disk array apparatus. The console terminal is equipped with a setting unit for setting a priority for each first volume in accordance with an external command. The first disk array apparatus is equipped with: a storage unit for storing the priorities set by the priority setting unit; and a transfer unit for reading the priorities from the storage unit upon receiving the data and transferring the data stored in the first volumes to the second volumes of the second disk array apparatus in order of descending priority of the first volumes that store the data. | 05-12-2011 |
20130246650 | COMPUTER SYSTEM AND FRAME TRANSFER BANDWIDTH OPTIMIZATION METHOD - A computer system and frame transfer bandwidth optimization method capable of data transfer bandwidth control on a logical unit basis and according to the relevant storage tier in a storage apparatus are suggested. | 09-19-2013 |
Patent application number | Description | Published |
20110164171 | IMAGING DEVICE - The imaging apparatus includes a lens mount | 07-07-2011 |
20110234892 | HEAT DISSIPATING STRUCTURE FOR AN IMAGING UNIT - A heat dissipating structure for an imaging unit includes an imaging element configured to convert light into an electrical signal, a first heat dissipating plate, a second heat dissipating plate, and a heat dissipating portion. The first heat dissipating plate has a first end and a second end disposed opposite to the first end, and is positioned on the rear face side of the imaging element. The second heat dissipating plate is positioned on the rear face side of the first heat dissipating plate. The heat dissipating portion is fixedly coupled to the first end of the second heat dissipating plate. | 09-29-2011 |
20120008043 | IMAGING APPARATUS - The imaging apparatus includes a lens mount to which a lens unit is mountable, an imaging unit operable to generate an image signal, and a shutter unit that is arranged between the lens mount and the imaging unit, and is capable of limiting the light incident on the imaging unit, opening and closing at least at recording and being kept in an opened state during a recording preparation operation, and a main frame to which the lens mount, the shutter unit and the imaging unit are fixed. | 01-12-2012 |
20120251094 | SHUTTER DRIVE DEVICE, SHUTTER DEVICE, AND IMAGING DEVICE - A shutter drive device includes a base member, an actuator, a first drive member, and a second drive member. The actuator is fixed to the base member and produces a driving force to drive the shutter mechanism. The first drive member is rotatably supported by the base member and configured to be rotated by the driving force. The second drive member is supported by the base member so as to be linearly movable in a first direction and configured to transmit the driving force of the actuator to the shutter mechanism. The first drive member has a gear component to drive the second drive member in the first direction, and a cam component configured to hold the second drive member in a specific position. The second drive member has a rack gear configured to mesh with the gear component, and a cam follower configured to contact the cam component. | 10-04-2012 |
20140211083 | IMAGING UNIT - An imaging unit comprises a mount unit, an imaging element unit, a plurality of elastic members and adjustment screws, and a filler member. The imaging element unit is disposed so that a gap is present with respect to the mount unit. The elastic members are disposed in a compressed state between the mount unit and the imaging element unit. The adjustment screws are disposed so as to be coaxial with respect to each of the elastic members and are mounted to at least one of the mount unit and the imaging element unit. The filler member is disposed so as to be coaxial with respect to at least one set comprising an elastic member and an adjustment screw, and, as the adjustment screw is tightened, the filler member is sandwiched and compressed between the mount unit and the imaging element unit. | 07-31-2014 |
Patent application number | Description | Published |
20080227203 | CELL CULTURE SUPPORT AND MANUFACTURE THEREOF - An object of the present invention is to provide a cell culture support making the detachment of a cell sheet easy as well as enabling the formation of a uniform cell sheet. The present invention relates to a method for manufacturing a cell culture support having a temperature responsive polymer immobilized onto the surface thereof via covalent bonding, the method including a coating step in which a composition including a monomer that can form the polymer by polymerization by radiation irradiation, an organic solvent and, in some cases, a prepolymer formed by polymerization of the monomer is coated onto the substrate having a surface containing a material which can be covalently bonded to the temperature responsive polymer by radiation irradiation to form a film on the surface of the substrate, a radiation irradiation step in which a polymerization reaction and a binding reaction between the substrate surface and the temperature responsive polymer are allowed to proceed by irradiating radiation to the film, and a drying step to dry the film. | 09-18-2008 |
20080293139 | CELL CULTURE SUPPORT FOR FORMING STRING-SHAPED CARDIOMYOCYTE AGGREGATES - This invention is intended to provide cell aggregates that can reproduce functions of the myocardium, such as the function of beating, and thus are available for myocardial regenerative therapy, and to provide a cell culture support for producing the same. | 11-27-2008 |
20090098651 | CARDIOMYOCYTE CULTURE SUPPORT - It is an objective of this invention to provide a cardiomyocyte culture support used for obtaining cardiomyocytes having a controlled orientation of beating that are thus available for myocardial regenerative therapy, and to provide a method for producing the same. | 04-16-2009 |
20100113338 | PROPHYLACTIC OR THERAPEUTIC AGENT FOR CORNEAL/CONJUNCTIVAL DISEASE - Disclosed is a novel composition for the treatment of a corneal/conjunctival disease. A prophylactic or therapeutic agent for a corneal/conjunctival disease comprising selenoprotein P as an active ingredient, more specifically a prophylactic or therapeutic agent for a corneal/conjunctival disease such as dry eye, keratoconjunctivitis sicca, superficial punctate keratopathy, corneal erosion or corneal ulcer comprising selenoprotein P as an active ingredient, particularly a prophylactic or therapeutic agent for a corneal/conjuncrtival disease such as dry eye, keratoconjunctivitis sicca, superficial punctate keratopathy, corneal erosion or corneal ulcer accompanied by a corneal/conjunctival epithelial discorder. | 05-06-2010 |
20130192987 | BIOSENSOR AND METHOD FOR PRODUCING THE SAME - A biosensor according to the present invention includes a first base material having an insulating surface; an adhesive layer located on the insulating surface of the first base material; and an electrode system and wiring sections fixed to the first base material via the adhesive layer. The electrode system includes top electrode layers and bottom electrode layers, and the bottom electrode layers are formed of a material having a higher conductivity than that of the top electrode layers; the electrode system includes a working electrode and a counter electrode, and also includes an enzyme reaction section located on the working electrode, the enzyme reaction section containing an enzyme and an electron acceptor; and the bottom electrode layers and the wiring sections are integral with each other. | 08-01-2013 |
Patent application number | Description | Published |
20130099239 | DISPLAY DEVICE - The invention prevents disconnection of data lines that traverse two-layered gate lines via an insulating film. | 04-25-2013 |
20130188117 | LIQUID CRYSTAL DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME - In a wall electrode liquid crystal display device, planar distribution of the wall structure and the electrode is optimized to improve a yield. A liquid crystal display device includes a plurality of pixels arranged in a matrix, each of the pixels having an insulator wall structure formed at a border of pixels, a wall electrode formed at a side surface of the wall structure of the border of the pixels, a source electrode which is continuous with the wall electrode and formed of a planar electrode extending in a planar direction, a first common electrode provided between source electrodes at both sides of the pixel to form a retentive capacitance, and a second common electrode provided between wall electrodes on both sides of the pixel. A slit which becomes a border of the wall electrodes of two adjacent pixels is disposed only on a top of the wall structure. | 07-25-2013 |
20130250199 | LIQUID CRYSTAL DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME - The present invention provides a liquid crystal display device including: plural pixels disposed in a matrix shape, each pixel having insulating wall-shaped structures at the boundaries of the pixels and a small wall-shaped structure between the wall-shaped structures; wall electrodes, each having wall-shaped electrodes formed on the side faces of the wall-shaped structures, and planar electrodes that are connected to the wall-shaped electrodes and extend in the planar direction; electrodes, each having a TFT-side electrode covering the small wall-shaped structure and a storage capacitor electrode that is connected to the TFT-side electrode and extends in the planar direction of the substrate; and interlayer insulating films formed between the storage capacitor electrodes and the planar electrodes. And the interlayer insulating films of inorganic films are not formed on the upper and side faces and at the base portions of the wall-shaped structures at the boundaries of the pixels. | 09-26-2013 |
20130265534 | LIQUID CRYSTAL DISPLAY DEVICE - The liquid crystal display device includes a pixel structure provided with a large wall formed along a long side of a pixel with a rectangular plane, a small wall formed at a center of the pixel and extending in the same direction as the large wall, a wall electrode formed on a wall surface of the large wall, a plane electrode formed between the small and large walls, in which the wall electrode and the plane electrode form a pixel electrode, and a common electrode formed on a surface of the small wall. The large wall has a part with an increased thickness at an end part of the pixel. The wall electrode is bent toward the center of the pixel. This structure prevents decrease of reverse twist of liquid crystal at an end part of the pixel as well as generation of domain, thus improving the transmittance of the screen. | 10-10-2013 |
20130280661 | METHOD FOR MANUFACTURING LIQUID CRYSTAL DISPLAY DEVICE - In a method of manufacturing a liquid crystal display device in which a plurality of pixels are arranged in a matrix, each of the pixels has an insulator wall structure at a boundary of the pixels, and a wall electrode is provided at least at a side of the wall structure, the wall structure being formed by: using a chemically amplified resist as a material of the wall structure, a step of applying the chemically amplified resist; a step of exposing and developing the chemically amplified resist; a step of irradiating light on an entire surface to perform post exposure; a step of pre-calcinating the chemically amplified resist at a temperature lower than a main calcination temperature; and a step of performing main calcination at a temperature higher than a pre-calcination temperature. | 10-24-2013 |
20140055701 | LIQUID CRYSTAL DISPLAY DEVICE - In a liquid crystal display device including: TFT substrate; color filter; counter electrode; interlayer insulation film; pixel electrode; alignment film; liquid crystal layer; counter substrate; and Si semiconductor layer. The color filter, counter electrode, interlayer insulation film, pixel electrode, and alignment film being formed on the side where the TFT substrate is provided, the counter substrate being disposed in facing relation to the TFT substrate with the liquid crystal layer put between the counter substrate and TFT substrate, the Si semiconductor layer is formed between the pixel electrode and interlayer insulation film. Even when light from a backlight is absorbed by the color filter and sufficient light cannot reach the alignment film, electric charges accumulated on the alignment film can escape to the pixel electrode in an early stage by the Si semiconductor layer formed under the alignment film, thereby capable of erasing the afterimage in an early stage. | 02-27-2014 |