Patent application number | Description | Published |
20080244471 | SYSTEM AND METHOD OF CUSTOMIZING AN EXISTING PROCESSOR DESIGN HAVING AN EXISTING PROCESSOR INSTRUCTION SET ARCHITECTURE WITH INSTRUCTION EXTENSIONS - An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development. | 10-02-2008 |
20090125866 | METHOD FOR PERFORMING PATTERN DECOMPOSITION FOR A FULL CHIP DESIGN - A method for decomposing a target pattern containing features to be printed on a wafer into multiple patterns. The method includes the steps of segmenting the target pattern into a plurality of patches; identifying critical features within each patch which violate minimum spacing requirements; generating a critical group graph for each of the plurality of patches having critical features, where the critical group graph of a given patch defines a coloring scheme of the critical features within the given patch, and the critical group graph identifies critical features extending into adjacent patches to the given patch; generating a global critical group graph for the target pattern, where the global critical group graph includes the critical group graphs of each of the plurality of patches, and an identification of the features extending into adjacent patches; and coloring the target pattern based on the coloring scheme defined by the global critical group graph. | 05-14-2009 |
20090172630 | AUTOMATED PROCESSOR GENERATION SYSTEM AND METHOD FOR DESIGNING A CONFIGURABLE PROCESSOR - A system for generating processor hardware supports a language for significant extensions to the processor instruction set, where the designer specifies only the semantics of the new instructions and the system generates other logic. The extension language provides for the addition of processor state, including register files, and instructions that operate on that state. The language also provides for new data types to be added to the compiler to represent the state added. It allows separate specification of reference semantics and instruction implementation, and uses this to automate design verification. In addition, the system generates formatted instruction set documentation from the language specification. | 07-02-2009 |
20090177876 | AUTOMATED PROCESSOR GENERATION SYSTEM AND METHOD FOR DESIGNING A CONFIGURABLE PROCESSOR - A system for generating processor hardware supports a language for significant extensions to the processor instruction set, where the designer specifies only the semantics of the new instructions and the system generates other logic. The extension language provides for the addition of processor state, including register files, and instructions that operate on that state. The language also provides for new data types to be added to the compiler to represent the state added. It allows separate specification of reference semantics and instruction implementation, and uses this to automate design verification. In addition, the system generates formatted instruction set documentation from the language specification. | 07-09-2009 |
Patent application number | Description | Published |
20100179284 | POLYMERS WITH BIO-FUNCTIONAL SELF ASSEMBLING MONOLAYER ENDGROUPS FOR THERAPEUTIC APPLICATIONS AND BLOOD FILTRATION - Medical device, prosthesis, or packaging assembly made up of polymer body comprising at least one polymer having the formula R(LE)x wherein R is a polymeric core having a number average molecular weight of from 5000 to 7,000,000 daltons, and having x endgroups, x is an integer≧1, E is an endgroup which is covalently linked to polymeric core R by linkage L, L is a divalent oligomeric chain which has at least 5 repeat units and which can self-assembly with L chains on adjacent molecules of the polymer, and moieties L and/or E in the polymer(s) may be the same as or different from one another in composition and/or molecular weight. The polymer body includes plural polymer molecules located internally within the body, at least some of which internal polymer molecules have endgroups that form a surface of the body. The surface endgroups include at least one self-assembling moiety. | 07-15-2010 |
20120136087 | PHOSPHORYLCHOLINE-BASED AMPHIPHILIC SILICONES FOR MEDICAL APPLICATIONS - Amphiphilic biomimetic phosphorylcholine-containing silicone compounds for use in both topical and internal applications as components in biomedical devices. The silicone compounds, which include zwitterionic phosphorylcholine groups, may be polymerizable or non-polymerizable. Specific examples of applications include use as active functional components in ophthalmic lenses, ophthalmic lens care solutions, liquid bandages, wound dressings, and lubricious and anti-thrombogenic coatings. | 05-31-2012 |
Patent application number | Description | Published |
20090217401 | Human Monoclonal Antibodies To Programmed Death 1(PD-1) And Methods For Treating Cancer Using Anti-PD-1 Antibodies Alone or in Combination with Other Immunotherapeutics - The present invention provides isolated monoclonal antibodies, particularly human monoclonal antibodies, that specifically bind to PD-1 with high affinity. Nucleic acid molecules encoding the antibodies of the invention, expression vectors, host cells and methods for expressing the antibodies of the invention are also provided. Immunoconjugates, bispecific molecules and pharmaceutical compositions comprising the antibodies of the invention are also provided. The invention also provides methods for detecting PD-1, as well as methods for treating various diseases, including cancer and infectious diseases, using anti-PD-1 antibodies. The present invention further provides methods for using a combination immunotherapy, such as the combination of anti-CTLA-4 and anti-PD-1 antibodies, to treat hyperproliferative disease, such as cancer. The invention also provides methods for altering adverse events related to treatment with such antibodies individually. | 08-27-2009 |
20100077497 | IP-10 ANTIBODIES AND THEIR USES - The present invention provides isolated monoclonal antibodies, particularly human antibodies, that bind to IP-10 with high affinity, inhibit the binding of IP-10 to its receptor, inhibit IP-10-induced calcium flux and inhibit IP-10-induced cell migration. Nucleic acid molecules encoding the antibodies of the invention, expression vectors, host cells and methods for expressing the antibodies of the invention are also provided. Immunoconjugates, bispecific molecules and pharmaceutical compositions comprising the antibodies of the invention are also provided. The invention also provides methods for inhibiting IP-10 activity using the antibodies of the invention, including methods for treating various inflammatory and autoimmune diseases. | 03-25-2010 |
20120230998 | IP-10 ANTIBODIES AND THEIR USES - The present invention provides isolated monoclonal antibodies, particularly human antibodies, that bind to IP-10 with high affinity, inhibit the binding of IP-10 to its receptor, inhibit IP-10-induced calcium flux and inhibit IP-10-induced cell migration. Nucleic acid molecules encoding the antibodies of the invention, expression vectors, host cells and methods for expressing the antibodies of the invention are also provided. Immunoconjugates, bispecific molecules and pharmaceutical compositions comprising the antibodies of the invention are also provided. The invention also provides methods for inhibiting IP-10 activity using the antibodies of the invention, including methods for treating various inflammatory and autoimmune diseases. | 09-13-2012 |
20130133091 | Human Monoclonal Antibodies To Programmed Death 1 (PD-1) And Methods For Treating Cancer Using Anti-PD-1 Antibodies Alone Or In Combination With Other Immunotherapeutics - The present invention provides isolated monoclonal antibodies, particularly human monoclonal antibodies, that specifically bind to PD-1 with high affinity. Nucleic acid molecules encoding the antibodies of the invention, expression vectors, host cells and methods for expressing the antibodies of the invention are also provided. Immunoconjugates, bispecific molecules and pharmaceutical compositions comprising the antibodies of the invention are also provided. The invention also provides methods for detecting PD-1, as well as methods for treating various diseases, including cancer and infectious diseases, using anti-PD-1 antibodies. The present invention further provides methods for using a combination immunotherapy, such as the combination of anti-CTLA-4 and anti-PD-1 antibodies, to treat hyperproliferative disease, such as cancer. The invention also provides methods for altering adverse events related to treatment with such antibodies individually. | 05-23-2013 |
Patent application number | Description | Published |
20100191865 | COMPUTER SYSTEM AND NETWORK INTERFACESUPPORTING CLASS OF SERVICE QUEUES - A data processing system adapted for high-speed network communications, a method for managing a network interface and a network interface for such system, are provided, in which processing of packets received over the network is achieved by embedded logic at the network interface level. Incoming packets on the network interface are parsed and classified as they are stored in a buffer memory. Functional logic coupled to the buffer memory on the network interface is enabled to access any data field within a packet in a single cycle, using pointers and packet classification information produced by the parsing and classifying step. Results of operations on the data fields in the packets are available before the packets are transferred out of the buffer memory. A data processing system, a method for management of a network interface and a network interface are also provided by the present invention that include an embedded firewall at the network interface level of the system, which protects against inside and-outside attacks on the security of data processing system. Furthermore, a data processing system, a method for management of a network interface and a network interface are a provided by the present invention that support class of service management for packets incoming from the network, by applying priority rules at the network interface level of the system. | 07-29-2010 |
20110320648 | METHOD AND APPARATUS FOR REAL-TIME TRANSPORT OF MULTI-MEDIA INFORMATION IN A NETWORK - In one embodiment of a networking module, a first block receives a serial digital media signal, and provides a parallel digital media signal based on the serial digital media signal. A second block, operative with the first block, stores the parallel digital media signal in a corresponding slot in an outgoing frame, and sends the outgoing frame in response to receiving an incoming frame. | 12-29-2011 |
20130132503 | COMPUTER SYSTEM AND NETWORK INTERFACE SUPPORTING CLASS OF SERVICE QUEUES - A data processing system adapted for high-speed network communications, a method for managing a network interface and a network interface for such system, are provided, in which processing of packets received over the network is achieved by embedded logic at the network interface level. Incoming packets on the network interface are parsed and classified as they are stored in a buffer memory. Functional logic coupled to the buffer memory on the network interface is enabled to access any data field within a packet in a single cycle, using pointers and packet classification information produced by the parsing and classifying step. Results of operations on the data fields in the packets are available before the packets are transferred out of the buffer memory. A data processing system, a method for management of a network interface and a network interface are also provided by the present invention that include an embedded firewall at the network interface level of the system, which protects against inside and outside attacks on the security of data processing system. Furthermore, a data processing system, a method for management of a network interface and a network interface are a provided by the present invention that support class of service management for packets incoming from the network, by applying priority rules at the network interface level of the system. | 05-23-2013 |
20130198422 | Method and apparatus for networking musical instruments - In one embodiment of a networking module, a first block receives a serial digital media signal, and provides a parallel digital media signal based on the serial digital media signal. A second block, operative with the first block, stores the parallel digital media signal in a corresponding slot in an outgoing frame, and sends the outgoing frame in response to receiving an incoming frame. | 08-01-2013 |
Patent application number | Description | Published |
20080247241 | SENSING IN NON-VOLATILE STORAGE USING PULLDOWN TO REGULATED SOURCE VOLTAGE TO REMOVE SYSTEM NOISE - A pull down circuit pulls a bit line voltage to a regulated source voltage in a non-volatile storage device during a sense operation such as a verify operation which occurs during programming. The storage device may include NAND strings which have associated bit lines and sense components, and a common source line. When a selected storage element of a NAND string has been programmed to its intended state, the bit line is locked out during subsequent verify operations which occur for other NAND strings which are not yet locked out. The pull down device is coupled to each bit line and to the common source line, whose voltage is regulated at a positive DC level, to prevent coupling of system power bus (V | 10-09-2008 |
20090296488 | High Speed Sense Amplifier Array and Method for Nonvolatile Memory - Sensing circuits for sensing a conduction current of a memory cell among a group of non-volatile memory cells being sensed in parallel and providing the result thereof to a data bus are presented. A precharge circuit is coupled to a node for charging the node to an initial voltage. An intermediate circuit is also coupled to the node and connectable to the memory cell, whereby current from the precharge circuit can be supplied to the memory cell. The circuit also includes a comparator circuit to perform a determination the conduction current by a rate of discharge at the node; a data latch coupled to the comparator circuit to hold the result of said determination; and a transfer gate coupled to the data latch to supply a result latched therein to the data bus independently of the node. This arrangement improves sensing performance and can help to eliminate noise on the analog sensing path during sensing and reduce switching current. | 12-03-2009 |
20100309720 | Structure and Method for Shuffling Data Within Non-Volatile Memory Devices - Techniques for the reading and writing of data in multi-state non-volatile memories are described. Data is written into the memory in a binary format, read into the data registers on the memory, and “folded” within the registers, and then written back into the memory in a multi-state format. In the folding operation, binary data from a single word line is folded into a multi-state format and, when rewritten in multi-state form, is written into a only a portion of another word line. A corresponding reading technique, where the data is “unfolded” is also described. The techniques further allow for the data to be encoded with an error correction code (ECC) on the controller that takes into account its eventual multi-state storage prior to transferring the data to the memory to be written in binary form. A register structure allowing such a “folding” operation is also presented. One set of embodiments include a local internal data bus that allows data to between the registers of different read/write stacks, where the internal bus can used in the internal data folding process. | 12-09-2010 |
20110205804 | High Speed Sense Amplifier Array and Method for Non-Volatile Memory - Sensing circuits for sensing a conduction current of a memory cell among a group of non-volatile memory cells being sensed in parallel and providing the result thereof to a data bus are presented. A precharge circuit is coupled to a node for charging the node to an initial voltage. An intermediate circuit is also coupled to the node and connectable to the memory cell, whereby current from the precharge circuit can be supplied to the memory cell. The circuit also includes a comparator circuit to perform a determination the conduction current by a rate of discharge at the node; a data latch coupled to the comparator circuit to hold the result of said determination; and a transfer gate coupled to the data latch to supply a result latched therein to the data bus independently of the node. This arrangement improves sensing performance and can help to eliminate noise on the analog sensing path during sensing and reduce switching current. | 08-25-2011 |
20120113716 | Structure and Method for Shuffling Data Within Non-Volatile Memory Devices - Techniques for the reading and writing of data in multi-state non-volatile memories are described. Data is written into the memory in a binary format, read into the data registers on the memory, and “folded” within the registers, and then written back into the memory in a multi-state format. In the folding operation, binary data from a single word line is folded into a multi-state format and, when rewritten in multi-state form, is written into a only a portion of another word line. A corresponding reading technique, where the data is “unfolded” is also described. A register structure allowing such a “folding” operation is also presented. One set of embodiments include a local internal data bus that allows data to between the registers of different read/write stacks, where the internal bus can used in the internal data folding process. | 05-10-2012 |
Patent application number | Description | Published |
20110003175 | COMPOSITE PERPENDICULAR MEDIA WITH GRADED ANISOTROPY LAYERS AND EXCHANGE BREAK LAYERS - A perpendicular magnetic recording layer may include a hard granular layer, an exchange break layer formed on the hard granular layer, and a soft granular layer formed on the exchange break layer. In some embodiments, the exchange break layer may consist essentially of ruthenium. In some embodiments, the perpendicular magnetic recording layer may include n magnetic layers and n−1 exchange break layers, where n is greater than or equal to three, and where the n−1 exchange break layers alternate with the n magnetic layers in the magnetic recording layer. | 01-06-2011 |
20120135274 | NON-HCP MAGNETIC LAYER - A magnetic film or layer includes a non-hexagonal close pack (non-hcp) structure. | 05-31-2012 |
20140272470 | Energy Assisted Segregation Material - Apparatus for recording data and method for making the same. In accordance with some embodiments, a magnetic layer is supported by a substrate and comprises a magnetic magnetic material, a non-magnetic material, and an energy assisted segregation material. The segregation material enhances segregation of the non-magnetic material into grain boundaries within the layer at an elevated, moderate energy level. | 09-18-2014 |
Patent application number | Description | Published |
20090059974 | FREQUENCY-CONVERTED HIGH-POWER LASER WITH RECIRCULATING POLARIZATION CONTROL - A frequency-tripled laser-resonator has three resonator-branches. The branches are optically connected with each other by one or more polarization-selective devices. Unpolarized fundamental radiation is generated by optically pumping a gain-element in one branch of the resonator. The polarization-selective device provides that radiation in the other branches is plane-polarized, with the polarization planes of radiation entering the branches perpendicular to each other. Two optically nonlinear crystals are located in one of the branches of the resonator in which the fundamental radiation is plane-polarized and arranged to generate third-harmonic radiation. Three-branch resonators including two gain-elements having a optical relay therebetween, and a three-branch ring-laser-resonator are also disclosed. | 03-05-2009 |
20100098115 | CAVITY-DUMPED PULSED SOLID-STATE LASER WITH VARIABLE PULSE-DURATION - In a cavity-dumped, repetitively-pulsed, solid-state laser cavity dumping is protracted over a predetermined time longer than a round-trip time of the resonator of the laser. The cavity dumping is effected by a Pockels cell optical switch. During a dumping period a voltage applied to the Pockels cell falls in a predetermined time. Varying the voltage fall-time varies the duration of pulses provided by the laser, independent of the pulse-repetition frequency. | 04-22-2010 |
20100246616 | CAVITY-DUMPED PULSED SOLID-STATE LASER WITH VARIABLE PULSE-DURATION - In a cavity-dumped, repetitively-pulsed, solid-state laser cavity dumping is protracted over a predetermined time longer than a round-trip time of the resonator of the laser. The cavity dumping is effected by a Pockels cell optical switch. During a dumping period a voltage applied to the Pockels cell falls in a predetermined time. Varying the voltage fall-time varies the duration of pulses provided by the laser, independent of the pulse-repetition frequency. | 09-30-2010 |
Patent application number | Description | Published |
20110132867 | METHOD AND SYSTEM FOR IMPRINT LITHOGRAPHY - A method and apparatus of imprint lithography wherein the method includes depositing a material on a patterned surface of a conductive substrate, and pressing a transparent substrate and the conductive substrate together, wherein the pressing causes the material to conform to the patterned surface. Energy is applied to the material to form patterned material from the material. The transparent substrate and the conductive substrate are separated, wherein the patterned material adheres to the transparent substrate. | 06-09-2011 |
20120164389 | IMPRINT TEMPLATE FABRICATION AND REPAIR BASED ON DIRECTED BLOCK COPOLYMER ASSEMBLY - Imprinted apparatuses, such as Bit-Patterned Media (BPM) templates, Discrete Track Recording (DTR) templates, semiconductors, and photonic devices are disclosed. Methods of fabricating imprinted apparatuses using a combination of patterning and block copolymer (BCP) self-assembly techniques are also disclosed. | 06-28-2012 |
20130186856 | METHOD OF FABRICATING SERVO INTEGRATED TEMPLATE - The embodiments disclose a method of fabricating servo integrated templates including depositing a protective layer on servo zone resist layer patterns, patterning integrated data zone features into a substrate, depositing a protective layer on data zones and removing the servo zone protective layer and patterning integrated servo zone features into the substrate and removing the data zone protective layer creating a substrate template used in fabricating data and servo zone integrated patterned stacks. | 07-25-2013 |
20140113064 | METHOD AND SYSTEM FOR OPTICAL CALIBRATION - A system and method of calibrating optical measuring equipment includes optically measuring discrete objects of a first known predictable pattern from a calibration apparatus, wherein the first known predictable pattern is a bit pattern. A recording surface optical reader is calibrated based on the optically measuring. Using the first known predictable pattern, contamination is filtered from the results of the optically measuring. | 04-24-2014 |
Patent application number | Description | Published |
20080237029 | Oxidized Barrier Layer - A method and resultant produce of forming barrier layer based on ruthenium tantalum in a via or other vertical interconnect structure through a dielectric layer in a multi-level metallization. The RuTa layer in a RuTa/RuTaN bilayer, which may form discontinuous islands, is actively oxidized, preferably in an oxygen plasma, to thereby bridge the gaps between the islands. Alternatively, ruthenium tantalum oxide is reactive sputtered onto the RuTaN or directly onto the underlying dielectric by plasma sputtering a RuTa target in the presence of oxygen. | 10-02-2008 |
20080254613 | METHODS FOR FORMING METAL INTERCONNECT STRUCTURE FOR THIN FILM TRANSISTOR APPLICATIONS - Methods for forming a metal interconnection structure in thin-film transistor applications are provided in the present invention. In one embodiment, the method may include providing a substrate into a processing chamber, supplying a first gas mixture into the chamber to deposit a metal layer on the substrate, and supplying a second gas mixture into the chamber to deposit a barrier layer on the metal layer. In another embodiment, a metal interconnection structure may include a substrate, a first barrier layer disposed on the substrate, a metal layer disposed on the substrate in a processing chamber, a second barrier layer disposed on the metal layer formed in the processing chamber a second barrier layer disposed on the metal layer formed in the processing chamber, wherein the first barrier layer, the metal layer and the second barrier layer are configured to form a metal interconnection structure for TFT devices. | 10-16-2008 |
20100130007 | BOTTOM UP PLATING BY ORGANIC SURFACE PASSIVATION AND DIFFERENTIAL PLATING RETARDATION - Embodiments of the present invention generally relates to an apparatus and a method for processing semiconductor substrates. One embodiment provides a method provides a method for processing a substrate comprising forming a seed layer over a substrate having trench or via structures formed therein, coating a portion of the seed layer with an organic passivation film, and immersing the trench or via structures in a plating solution to deposit a conductive material over the seed layer not covered by the organic passivation film. | 05-27-2010 |
Patent application number | Description | Published |
20090197004 | METHODS FOR CLEANING PROCESS KITS AND CHAMBERS, AND FOR RUTHENIUM RECOVERY - A method is provided for recovering a metal from electronic device deposition equipment including: providing deposition equipment wherein the deposition equipment is at least partially coated with a deposited metal; blasting the deposition equipment with a grit to remove at least some of the deposited metal to form a blasted grit and a removed metal; and separating at least some of the removed metal from the blasted grit to form a recovered metal. | 08-06-2009 |
20130277203 | PROCESS KIT SHIELD AND PHYSICAL VAPOR DEPOSITION CHAMBER HAVING SAME - Embodiments of process kit shields and physical vapor deposition (PVD) chambers incorporating same are provided herein. In some embodiments, a process kit shield for use in depositing a first material in a physical vapor deposition process may include an annular body defining an opening surrounded by the body, wherein the annular body is fabricated from the first material, and an etch stop coating formed on opening-facing surfaces of the annular body, the etch stop coating is fabricated from a second material that is different from the first material, the second material having a high etch selectivity with respect to the first material. | 10-24-2013 |
20140273520 | ENHANCED PRODUCTIVITY FOR AN ETCH SYSTEM THROUGH POLYMER MANAGEMENT - Embodiments described herein generally relate to an apparatus and methods for reducing the deposition of polymers in a semiconductor processing chamber. A heater jacket and heat sources are provided and may be configured to maintain a uniform temperature profile of the processing chamber. A method of maintaining a uniform temperature profile of a dielectric ceiling of the processing chamber is also provided. | 09-18-2014 |
20150079336 | GEOMETRIES AND PATTERNS FOR SURFACE TEXTURING TO INCREASE DEPOSITION RETENTION - A processing chamber component and method for fabricating the same are provided. The processing chamber component is fabricated in the manner described herein and includes the creation of at least a macro texture on a surface of the chamber component. The macro texture is defined by a plurality of engineered features arranged in a predefined orientation on the surface of the chamber component. In some embodiments, the engineered features prevent formation of a line of sight surface defined between the features to enhance retention of films deposited on the chamber component. | 03-19-2015 |
Patent application number | Description | Published |
20090042062 | INTERLAYER DESIGN FOR MAGNETIC MEDIA - A magnetic recording medium having a substrate, an interlayer and a magnetic layer, the interlayer having at least a first intermediary layer, a second intermediary layer and a third intermediary layer, wherein the first intermediary layer or the third intermediary layer is non-magnetic or magnetic and the second intermediary layer has a hexagonal close pack crystal structure and a property of providing RKKY coupling between the first intermediary layer and the third intermediary layer when the first intermediary layer and the second intermediary layer are magnetic layers is disclosed. | 02-12-2009 |
20100021763 | EASY TO WRITE AND HARD TO DECAY MEDIA FOR HARD DISK DRIVE APPLICATIONS - A magnetic recording medium is presented, characterized by having a nonmonotonicity in the DCD curve, resulting in low dynamic coercivity when writing information to the medium, with high static coercivity and thermal stability during storage. A method is also presented for producing the magnetic recording medium of the present invention. | 01-28-2010 |
20130071693 | GRANULAR PERPENDICULAR MAGNETIC RECORDING APPARATUS - A method of manufacturing a granular perpendicular magnetic recording medium with improved corrosion resistance comprises sequential steps of providing a non-magnetic substrate including a surface; forming a soft magnetic underlayer (SUL) over the surface; post-deposition heating the SUL; forming an intermediate layer stack over the heated SUL; and forming at least one granular, magnetically hard perpendicular magnetic recording layer over the intermediate layer stack. Heating of the SUL prior to formation of the intermediate layer stack results in formation of an intermediate layer stack with a smoother surface and a granular perpendicular recording layer with increased corrosion resistance than when SUL post-deposition heating is not performed. | 03-21-2013 |
Patent application number | Description | Published |
20120003840 | IN-SITU OZONE CURE FOR RADICAL-COMPONENT CVD - Methods of forming a dielectric layer are described. The methods include the steps of mixing a silicon-containing precursor with a plasma effluent, and depositing a silicon-and-nitrogen-containing layer on a substrate. The silicon-and-nitrogen-containing layer is converted to a silicon-and-oxygen-containing layer by curing in an ozone-containing atmosphere in the same substrate processing region used for depositing the silicon-and-nitrogen-containing layer. Another silicon-and-nitrogen-containing layer may be deposited on the silicon-and-oxygen-containing layer and the stack of layers may again be cured in ozone all without removing the substrate from the substrate processing region. After an integral multiple of dep-cure cycles, the conversion of the stack of silicon-and-oxygen-containing layers may be annealed at a higher temperature in an oxygen-containing environment. | 01-05-2012 |
20120309205 | CAPPING LAYER FOR REDUCED OUTGASSING - A method of forming a silicon oxide layer is described. The method first deposits a silicon-nitrogen-and-hydrogen containing (polysilazane) film by radical-component chemical vapor deposition (CVD). The silicon-nitrogen-and-hydrogen containing film is formed by combining a radical precursor (excited in a remote plasma) with m unexcited carbon-free silicon precursor. A capping layer is formed over the silicon-nitrogen-and-hydrogen-containing film to avoid time-evolution of underlying film properties prior to conversion into silicon oxide. The capping layer is formed by combining a radical oxygen precursor (excited in a remote plasma) with an unexcited silicon-and-carbon-containing-precursor. The films are converted to silicon oxide by exposure to oxygen-containing environments. The two films may be deposited within the same substrate processing chamber and may be deposited without breaking vacuum. | 12-06-2012 |
20130217240 | FLOWABLE SILICON-CARBON-NITROGEN LAYERS FOR SEMICONDUCTOR PROCESSING - Methods are described for forming a dielectric layer on a semiconductor substrate. The methods may include providing a silicon-containing precursor and an energized nitrogen-containing precursor to a chemical vapor deposition chamber. The silicon-containing precursor and the energized nitrogen-containing precursor may be reacted in the chemical vapor deposition chamber to deposit a flowable silicon-carbon-nitrogen material on the substrate. The methods may further include treating the flowable silicon-carbon-nitrogen material to form the dielectric layer on the semiconductor substrate. | 08-22-2013 |
20130217241 | TREATMENTS FOR DECREASING ETCH RATES AFTER FLOWABLE DEPOSITION OF SILICON-CARBON-AND-NITROGEN-CONTAINING LAYERS - Methods are described for forming and curing a flowable silicon-carbon-and-nitrogen-containing layer on a semiconductor substrate. The silicon and carbon constituents may come from a silicon and carbon containing precursor while the nitrogen may come from a nitrogen-containing precursor that has been activated to speed the reaction of the nitrogen with the silicon-and-carbon-containing precursor at lower deposition chamber temperatures. The initially-flowable silicon-carbon-and-nitrogen-containing layer is treated to remove components which enabled the flowability, but are no longer needed after deposition. Removal of the components increases etch resistance in order to allow the gapfill silicon-carbon-and-nitrogen-containing layer to remain intact during subsequent processing. The treatments have been found to decrease the evolution of properties of the film upon exposure to atmosphere. | 08-22-2013 |
Patent application number | Description | Published |
20110128647 | METHOD OF DISK ALIGNMENT USING PRINTED ALIGNMENT MARKS - Processes include aligning a disc with a template at a location so that the pattern from the template is transferred to the disc in a relative orientation. The relative orientation provides that when the disc with the transferred pattern is finally assembled into a hard disc drive, an inner diameter of the spindle hole of the disc may be abutted against an outer diameter of the disc drive spindle, and the data-containing patterns on the discs will be aligned concentrically with a center of the disc drive spindle. While the data-containing patterns are aligned concentrically with the disc drive spindle, the substrate itself is allowed to be non-concentric. Still other aspects include a disc having eccentric formations including PIM and one or more of bit patterns and servo information formed on a disc surface, the eccentricity of the formations is determined based on an expected difference between the radius of the spindle hole of the disc and the radius of the spindle on which the disc will be placed during assembly, with the PIM used to determine the angular alignment of the disc with the spindle. | 06-02-2011 |
20120015471 | MULTIPLE-PATH LASER EDGE DELETE PROCESS FOR THIN-FILM SOLAR MODULES - Embodiments of the present invention provide methods for edge film stack removal for use in fabricating photovoltaic devices. In one embodiment, the method includes providing a substrate having a film stack deposited thereon, the film stack comprising a transparent conductive layer, a silicon-containing layer, and a metal back contact layer, removing the metal back contact layer and the silicon-containing layer formed on a periphery region along a side of the substrate using an electromagnetic radiation delivered at a first energy level, and removing the transparent conductive layer formed on the periphery region along the side of the substrate using electromagnetic radiation delivered at a second energy level that is higher than the first energy level. | 01-19-2012 |
20130001195 | METHOD OF STACK PATTERNING USING A ION ETCHING - The embodiments disclose a method of stack patterning, including loading a stack into a stationary stack stage, rotating one or more ion beam grid assemblies substantially concentrically aligned with the stationary stack stage to etch the stack and controlling the operation of the one or more ion beam grid assemblies to achieve substantial axial uniformity of the etched stack. | 01-03-2013 |
20130004763 | METHOD OF PATTERNING A STACK - The embodiments disclose a method of fabricating a stack, including replacing a metal layer of a stack imprint structure with an oxide layer, patterning the oxide layer stack using chemical etch processes to transfer the pattern image and cleaning etch residue from the stack imprint structure to substantially prevent contamination of the metal layers. | 01-03-2013 |
Patent application number | Description | Published |
20080204933 | Granular perpendicular magnetic recording media with multi-interlayer structure - A perpendicular magnetic recording medium comprises a layer stack formed over a surface of a non-magnetic substrate, and comprising, in overlying sequence from the surface: a magnetically soft underlayer; an interlayer structure for crystallographically orienting a layer of a perpendicular magnetic recording material formed thereon; and at least one crystallographically oriented, magnetically hard, perpendicular magnetic recording layer on the interlayer structure; wherein the interlayer structure is a triple-layer stacked structure comprising: a first interlayer of a first non-magnetic material proximal the magnetically soft underlayer and containing Ru; a second interlayer of a second non-magnetic material in overlying contact with the first interlayer and not containing Ru; and a third interlayer of a third non-magnetic material in overlying contact with the second interlayer and containing Ru. | 08-28-2008 |
20100209737 | MAGNETIC RECORDING MEDIA WITH ENHANCED WRITABILITY AND THERMAL STABILITY - Aspects are directed to recording media with enhanced magnetic properties for improved writability. Examples can be included or related to methods, systems and components that allow for improved writability while reducing defects so as to obtain uniform magnetic properties such as uniformly high anisotropy and narrow switching field distribution. Some examples include a recording medium with an exchange tuning layer inserted between the hard layer and the soft, semi-soft or thin semi-hard layer so as to maximize the writability improvement of the media. Preferably, the exchange tuning layer is granular and reduces or optimizes the vertical coupling between the hard layer and the soft, semi-soft or semi-hard layer of a magnetic recording or storing device. | 08-19-2010 |
20100221580 | Granular Perpendicular Media Interlayer For A Storage Device - An apparatus and method are provided for improving perpendicular magnetic recording media. The present invention provides media, and a method of fabricating media in a cost-effective manner, with a reduced ruthenium (Ru) content interlayer structure, while meeting media performance requirements. A perpendicular magnetic recording medium is provided comprising a non-magnetic substrate having a surface, and a layer stack situated on the substrate surface. The layer stack comprises, in overlying sequence from the substrate surface a magnetically soft underlayer; an amorphous or crystalline, non-magnetic seed layer; an interlayer structure for crystallographically orienting a layer of a perpendicular magnetic recording material situated on the underlayer; and at least one crystallographically oriented, magnetically hard, perpendicular magnetic recording layer situated on the interlayer structure. The interlayer structure is a stacked structure comprising, in overlying sequence: a chromium alloy situated on the seed layer; and an upper interlayer situated on the chromium alloy. | 09-02-2010 |
20110003175 | COMPOSITE PERPENDICULAR MEDIA WITH GRADED ANISOTROPY LAYERS AND EXCHANGE BREAK LAYERS - A perpendicular magnetic recording layer may include a hard granular layer, an exchange break layer formed on the hard granular layer, and a soft granular layer formed on the exchange break layer. In some embodiments, the exchange break layer may consist essentially of ruthenium. In some embodiments, the perpendicular magnetic recording layer may include n magnetic layers and n−1 exchange break layers, where n is greater than or equal to three, and where the n−1 exchange break layers alternate with the n magnetic layers in the magnetic recording layer. | 01-06-2011 |
20120141836 | GRANULAR PERPENDICULAR MEDIA INTERLAYER FOR A STORAGE DEVICE - An apparatus and method are provided for improving perpendicular magnetic recording media. The present invention provides media, and a method of fabricating media in a cost-effective manner, with a reduced ruthenium (Ru) content interlayer structure, while meeting media performance requirements. A perpendicular magnetic recording medium is provided comprising a non-magnetic substrate having a surface, and a layer stack situated on the substrate surface. The layer stack comprises, in overlying sequence from the substrate surface a magnetically soft underlayer; an amorphous or crystalline, non-magnetic seed layer; an interlayer structure for crystallographically orienting a layer of a perpendicular magnetic recording material situated on the underlayer; and at least one crystallographically oriented, magnetically hard, perpendicular magnetic recording layer situated on the interlayer structure. The interlayer structure is a stacked structure comprising, in overlying sequence: a chromium alloy situated on the seed layer; and an upper interlayer situated on the chromium alloy. | 06-07-2012 |
20140186658 | Interlayer comprising chromium-containing alloy - An apparatus and method are provided for improving perpendicular magnetic recording media. The present invention provides media, and a method of fabricating media in a cost-effective manner, with a reduced ruthenium (Ru) content interlayer structure, while meeting media performance requirements. A perpendicular magnetic recording medium is provided comprising a non-magnetic substrate having a surface, and a layer stack situated on the substrate surface. The layer stack comprises, in overlying sequence from the substrate surface a magnetically soft underlayer; an amorphous or crystalline, non-magnetic seed layer; an interlayer structure for crystallographically orienting a layer of a perpendicular magnetic recording material situated on the underlayer; and at least one crystallographically oriented, magnetically hard, perpendicular magnetic recording layer situated on the interlayer structure. The interlayer structure is a stacked structure comprising, in overlying sequence: a chromium alloy situated on the seed layer; and an upper interlayer situated on the chromium alloy. | 07-03-2014 |
Patent application number | Description | Published |
20080318234 | Compositions and methods for diagnosing and treating cancer - The present invention relates to compositions and methods for treating, characterizing, and diagnosing cancer. In particular, the present invention provides gene expression profiles associated with solid tumor stem cells, as well as novel stem cell cancer gene signatures useful for the diagnosis, characterization, prognosis and treatment of solid tumor stem cells. | 12-25-2008 |
20100093556 | COMPOSITIONS AND METHODS FOR TREATING AND DIAGNOSING CANCER - The present invention relates to compositions and methods for treating, characterizing, and diagnosing cancer. In particular, the present invention provides gene expression profiles and signatures associated with solid tumor stem cells, as well as novel stem cell cancer markers useful for the diagnosis, characterization, prognosis and treatment of solid tumor stem cells. More particularly, the present invention identifies two profiles of cancer stem cells useful for the diagnosis, characterization, and treatment of cancer and cancer metastases. The invention also provides a variety of reagents such as stem cell gene signatures for use in the diagnosis and management of cancer. | 04-15-2010 |
20110183866 | COMPOSITIONS AND METHODS FOR TREATING AND DIAGNOSING CANCER - The present invention relates to compositions and methods for treating, characterizing, and diagnosing cancer. In particular, the present invention provides gene expression profiles and signatures associated with solid tumor stem cells, as well as novel stem cell cancer markers useful for the diagnosis, characterization, prognosis and treatment of solid tumor stem cells. More particularly, the present invention identifies two profiles of cancer stem cells useful for the diagnosis, characterization, and treatment of cancer and cancer metastases. The invention also provides a variety of reagents such as stem cell gene signatures for use in the diagnosis and management of cancer. | 07-28-2011 |
Patent application number | Description | Published |
20090059215 | Systems and Method for Simultaneously Inspecting a Specimen with Two Distinct Channels - A system is provided herein for inspecting a specimen. In one embodiment, the system may include a dual-channel microscope, two illuminators, each coupled for illuminating a different channel of the dual-channel microscope and two detectors, each coupled to a different channel of the dual-channel microscope for acquiring images of the specimen. Means are provided for separating the channels of the dual-channel microscope, so that the two detectors can acquire the images of the specimen at substantially the same time. In one embodiment, the channels of the dual-channel microscope may be spectrally separated by configuring the two illuminators, so that they produce light in two substantially non-overlapping spectral ranges. In another embodiment, the channels of the dual-channel microscope may be spatially separated by positioning the two detectors, so that the illumination light do not overlap and the fields of view of the two detectors do not overlap within a field of view of an objective lens included within the system. | 03-05-2009 |
20100315594 | HIGH PRECISION CONTRAST RATIO DISPLAY FOR VISUAL STIMULUS - Embodiments of the present invention include approaches for controlling light valve devices to improve the range and precision of the contrast ratio and the grayscale levels of a display used for visual field tests. In one embodiment, two or more illumination devices are used to enable the display device to display a wide range of contrast stimuli at precise illumination intensities over a fixed background illumination level. In another embodiment, the gamma curves of the display elements are adjusted to allow greater variations in the brightness of the display. | 12-16-2010 |
20140268039 | SYSTEMS AND METHODS FOR VARIABLE MODE OPTICAL COHERENCE TOMOGRAPHY IMAGING - Systems and methods for improvements to optical coherence tomography systems for operating in different imaging modes are presented. In one embodiment, a system for identifying the presence and type of an adjunct lens operably connected to the OCT instrument for changing between imaging modes in the system is described. In a second embodiment, a system for dynamically autofocusing the OCT system depending on the layer of interest is presented. In a third embodiment, the overall power of the system used for imaging can be adjusted depending on the location and type of scan desired while accounting for the safety standards for recommended light exposure. | 09-18-2014 |
20150085294 | APPARATUS AND METHODS FOR DETECTING OPTICAL COMPONENTS AND THEIR MISALIGNMENT IN OPTICAL COHERENCE TOMOGRAPHIC SYSTEMS - Systems and methods are presented which allow the detection of the presence, type, and misalignment of optical components in the optical train of an optical coherence tomographic instrument to be determined from the use of OCT depth information. | 03-26-2015 |
Patent application number | Description | Published |
20110188458 | APPARATUS AND METHODS FOR SIGNAL RECEPTION BASED ON NETWORK LOAD ESTIMATIONS - Methods and apparatus for correcting quantization errors in signal reception based on estimated network loading including solutions for preserving cellular network performance in low noise, high interference environments. In one embodiment, a data channel is amplified with respect to other signals based on network load during periods of relatively low network utilization. Dynamic modification of the data channel's power level is configured to overcome quantization errors, rather than the true noise floor (which is insignificant in low noise environments). Such solutions provide both the fidelity necessary to enable high degrees of unwanted signaling rejection, while still preserving data channel quality. | 08-04-2011 |
20140112378 | ROBUST SCALABLE AND ADAPTIVE FREQUENCY ESTIMATION AND FREQUENCY TRACKING FOR WIRELESS SYSTEMS - Methods and apparatuses to determine a frequency adjustment in a mobile wireless device are disclosed. A method includes determining a coarse frequency error estimate and multiple fine frequency error estimates; selecting at least one candidate fine frequency error estimate having a frequency value closest to a corresponding frequency value for the coarse frequency error estimate; and determining a frequency adjustment based on a combination of the coarse frequency error estimate and the selected at least one candidate fine frequency error estimate. In an embodiment, the method further includes calculating a confidence metric for the coarse frequency error estimate; when the confidence metric exceeds a threshold value, determining the frequency adjustment based on the candidate fine frequency error estimate; otherwise, determining the frequency adjustment based on a fine frequency error estimate in the plurality of fine frequency error estimates closest to a most recent previous fine frequency error estimate. | 04-24-2014 |
20140185475 | Adaptive Neighboring Cell Measurement Scaling for Wireless Devices - Adaptive neighboring cell measurement scaling by a wireless user equipment (UE) device. The UE may operate alternately in active and inactive states in a periodic manner according to DRX cycle timing for each of a plurality of DRX cycles. Paging messages may be checked for while in the active state during each DRX cycle. If a paging message is received, it may be decoded using a joint detection technique. The UE may adaptively determine whether or not to perform neighboring cell measurements during at least a subset of the DRX cycles, and perform neighboring cell measurements according to the adaptive determination. The adaptive determination may be based on one or more of joint detection of paging messages, one or more previous cell measurements, or an amount of motion of the UE. | 07-03-2014 |
Patent application number | Description | Published |
20090183046 | Programmable Test Clock Generation Responsive to Clock Signal Characterization - Disclosed are, inter alia, methods, apparatus, mechanisms, and means for characterizing a clock signal within an application-specific integrated circuit (ASIC), and then, also on the ASIC, generating a testing clock signal based on the characterization of the operative clock signal for testing purposes. An ASIC includes a clock signal characterization circuit configured to characterize a clock signal within the ASIC; and a programmable testing clock signal generator configured for being programmed based on said characterization of the clock signal, and for generating a test clock signal based on its said programming. | 07-16-2009 |
20120233104 | SYSTEM AND METHOD FOR PROVIDING ADAPTIVE MANUFACTURING DIAGNOSES IN A CIRCUIT BOARD ENVIRONMENT - An example method is provided and includes collecting inputs for a circuit board under test; evaluating historical repair records using a neuron network; providing repair actions for the circuit board based on the historical repair records; and providing an output reflecting a particular component of the circuit board to be replaced or to be repaired, where the output is associated with a developed probability of successfully fixing an issue that was identified by the test. In more specific implementations, the inputs include fault syndromes and log files associated with the circuit board under test. Additionally, at least one of the inputs of the neuron network is a syndrome vector extracted from a failure log. In yet other instances, particular outputs having higher probabilities are selected as the repair actions. The neuron network can be weighted using diagnosis knowledge weights. | 09-13-2012 |
20140119144 | Technique to Operate Memory in Functional Mode Under LBIST Test - A method for testing an integrated circuit having memory comprises performing a structural test on the integrated circuit using data obtained from operating the memory in a functional mode. In another embodiment, an integrated circuit comprises a memory mode selection module, a memory module, and an output selection module. The memory mode selection module is configured to receive a functional mode signal and a test mode signal, and selectively transmit either the functional mode signal or the test mode signal based on a state of a control signal. The memory module is configured to receive the signal from the memory mode selection module and store data corresponding to signal to memory cells. The output selection module is configured to receive the data from the memory cells, and transmit the data to downstream circuitry, which may use the data to perform a structural test, such as a logic built-in self-test. | 05-01-2014 |
20140122928 | Network Processor Online Logic Test - A method of testing a multi-core network processor comprises placing the multi-core network processor in an online environment. A test is performed on a core of the multi-core network processor when the core is idle, and the core is released from the test when it is completed and resumes processing data in the online environment. In another embodiment, a network processor comprises a computer readable instructions module and a processing core. The computer readable instructions module is configured to store test instructions, and the processing core is configured to operate in an online environment and execute the test instructions to test the processing core when the processing core is idle. In yet another embodiment, an apparatus comprises a multi-core network processor that is configured to execute test instructions to perform a test on a core of the multi-core network processor when the core is idle. | 05-01-2014 |
20140122955 | PRBS TEST MEMORY INTERFACE CONSIDERING DDR BURST OPERATION - A method of testing an interconnect between an electronic component and an external memory comprises receiving a data word having data bits and translating the data word into multiple cycles. The multiple cycles are transmitted through the interconnect to the external memory one after another such that a value of the data bit being transmitted is switched for each cycle. In another embodiment, an electronic component comprises an interface, a translation unit, and a test module. The translation module is configured to receive a burst from the external memory through the interface and is configured to translate the burst into a data word. The test module is configured to receive the data word from the translation module and is configured to compare the data word to a test pattern to detect an interconnect defect. | 05-01-2014 |